CN103986798B - A kind of method and device for realizing system address map - Google Patents
A kind of method and device for realizing system address map Download PDFInfo
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- CN103986798B CN103986798B CN201410198446.XA CN201410198446A CN103986798B CN 103986798 B CN103986798 B CN 103986798B CN 201410198446 A CN201410198446 A CN 201410198446A CN 103986798 B CN103986798 B CN 103986798B
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- 238000000034 method Methods 0.000 title claims abstract description 16
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- 238000013507 mapping Methods 0.000 claims description 12
- 238000012986 modification Methods 0.000 claims description 3
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Abstract
The invention discloses a kind of method and device for realizing system address map, including：Determine that the address space type of multinode network system and the minimum particle size of the address space of each type are divided；According to the configuration requirement of all scales and system address for supporting system of multinode network system, unified fixing address width is determined；The register digit information of the address space of each type is obtained by the minimum particle size division and unified fixing address width of the address space of each type；The register digit information of the address space according to each type and the bound effective address of corresponding address space carry out system address map.The present invention divides each fixing address width and obtains register digit information by the minimum particle size of each multinode network, bound effective address according to register digit information and the corresponding address space of multinode network system carries out system address map, the flow of system address map is simplified, the operating efficiency of system is improve.
Description
Technical field
The present invention relates to chip design field, espespecially a kind of method and device for realizing address of cache.
Background technology
With continuing to develop for server application field, the application demand of high-end server has come into an important rank
Section.Complicated architecture is realized supporting high-end server system, with the spy such as high-performance, high safety, High Availabitity, highly reliable
Point.Complicated architecture is, it is necessary to control the multichannel process device (multinode of class chip controls high-end server by multiple networks
Network) system, high-end server internal system message transmissions is reached high efficient and reliable, safety and stability.
Multiple network control chips are needed in high-end server system, each network control chip realizes part in network
The agency of node (multinode).Therefore, the transmission of message is transmitted in the way of two-stage in real network：Between control chip
Message transmissions between message transmissions and control chip and node.For network control chip receive message address, it is necessary to
Determine that (including control chip is also in itself possible for the purposes and destination node of message according to the address space of system address map
Destination node).
Configurableization of high-end server system is realized, it is necessary to carry out system address map to system address, and with
It is poor that the change of high-end server system scale, the size of the address space of multinode network system address map and division are present
Not.Existing high-end server, carries out logic and sentences when realizing the method for system address map mainly by message transmissions each time
It is disconnected, by logic judgment each time, determine system address map.System address map is carried out in this way, it is desirable to according to
The system address map dividing mode design circuit for designing in advance, sentences for carrying out logic to message forwarding institute request address
It is disconnected, determine which part mapping space the address belongs to.Although adopt carry out in this way system address map do not need it is extra
Register resources, and (the same space address is continuous or does not connect to can apply to a variety of mapping space dividing modes
It is continuous).But, due to being required for carrying out logic judgment by circuit each time, it is necessary to consume substantial amounts of circuit logic resource, especially
It is that, when address space is miscellaneous, the logical resource for judging address is consumed will be very huge.In addition, message is forwarded
When, multilevel system address of cache is carried out if desired, the risk on circuit sequence may be brought；Simultaneously as being with solidification
Circuit logic is realized, under different system framework, it is impossible to realize the transplanting of node.
In sum, the curing circuit that existing system address map is used realizes, message forwarding each time be required for into
Row logic judgment, consumes substantial amounts of circuit logic resource；When address space type is complicated, circuit logic consumption phenomenon is more bright
It is aobvious, and when multilevel system mapping is carried out, also there is the risk on circuit sequence.Therefore, existing method is not particularly suited for more piece
Spot net system.
The content of the invention
In order to solve the above-mentioned technical problem, the present invention provides a kind of method and device for realizing system address map, can
Simplify system address map process, improve system operating efficiency.
In order to reach foregoing invention purpose, the invention discloses a kind of method for realizing system address map, including：
Determine that the address space type of multinode network system and the minimum particle size of the address space of each type are divided；
According to the configuration requirement of all scales and system address for supporting system of multinode network system, multinode is determined
The unified fixing address width of network；
Divided by the minimum particle size of the address space of each type and unified fixing address width obtains each type
Address space register digit information；
The register digit information of the address space according to each type and the bound of corresponding address space are effectively
Location carries out the system address map of multinode network system.
Further, according to the configuration requirement of all scales and system address for supporting system of multinode network system,
Determine that the unified fixing address width of multinode network includes：
Determine corresponding all scales for supporting system according to all scales for supporting system of multinode network system
Memory space maximum；
According to the maximum of memory space, the maximum address width of multinode network system is determined；
Maximum address width according to multinode network system combines the system address configuration requirement of each multinode network, really
Fixed unified fixing address width.
Further, divided by the minimum particle size of the address space of each type and unified fixing address width is obtained
The register digit packet of the address space of each type is included：By the unified fixing address width, each type is subtracted
Address space minimum particle size divide determined by the digit of low order address that can abandon, the difference of acquisition is used as each class
The register digit information of the address space of type.
Further, carrying out system address map includes：Carried out systematically by changing register configuration or default addresses for use
Location maps.
On the other hand, the application also provides a kind of device for realizing system address map, at least includes：Minimum particle size is divided
Unit, fixing address unit, deposit digit determining unit and address mapping unit；Wherein,
Minimum particle size division unit, for determining the address space type of multinode network system and the address of each type
The minimum particle size in space is divided；The minimum particle size of the address space of each type is divided and is sent to deposit digit determining unit；
Fixing address unit, for matching somebody with somebody according to all scales for supporting system of multinode network system and system address
Requirement is put, the unified fixing address width of multinode network is determined；The unified fixing address width for determining is sent to deposit position
Number determining unit；
Deposit digit determining unit, the minimum particle size for the address space by each type is divided and unified fixation
Address width obtains the register digit information of the address space of each type；
Address mapping unit, the register digit information and corresponding address for the address space according to each type is empty
Between bound effective address carry out the system address map of multinode network system.
Further, fixing address unit specifically for：
Determine corresponding all scales for supporting system according to all scales for supporting system of multinode network system
Memory space maximum；
According to the maximum of memory space, the maximum address width of multinode network system is determined；
Maximum address width according to multinode network system combines the system address configuration requirement of each multinode network, really
Fixed unified fixing address width.
Further, deposit digit determining unit is specifically for by the unified fixing address width, subtracting each class
The digit of the low order address that can be abandoned determined by the minimum particle size division of the address space of type, the difference of acquisition is used as each
The register digit information of the address space of type.
Further, address mapping unit is specifically for the register digit information of the address space according to each type
And the bound effective address of corresponding address space, carry out multinode network system by changing register configuration or default addresses for use
The system address map of system.
Technical scheme includes：Determine the address space type of multinode network system and the address sky of each type
Between minimum particle size divide；According to the configuration requirement of all scales and system address for supporting system of multinode network system,
Determine the unified fixing address width of multinode network；Divide and unify by the minimum particle size of the address space of each type
Fixing address width obtains the register digit information of the address space of each type；Address space according to each type is posted
The bound effective address of storage digit information and corresponding address space carries out the system address map of multinode network system.
The present invention divides each fixing address width and obtains register digit information by the minimum particle size of each multinode network, according to deposit
The bound effective address of device digit information and the corresponding address space of multinode network system carries out system address map, simplifies
The flow of system address map, improves the operating efficiency of system.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes the part of the application, this hair
Bright schematic description and description does not constitute inappropriate limitation of the present invention for explaining the present invention.In the accompanying drawings：
Fig. 1 is the flow chart of the method that the present invention realizes system address map；
Fig. 2 is the structured flowchart of the device that the present invention realizes system address map.
Specific embodiment
Fig. 1 is the flow chart of the method that the present invention realizes system address map, as shown in figure 1, including：
The most granule of the address space of step 100, the address space type for determining multinode network system and each type
Degree is divided.
It should be noted that determining the address space type of multinode network system and the address space type category of each class
In general knowledge well known to those skilled in the art, divided by minimum particle size, can with full address in explicit address space can
The digit information of the low order address to abandon.What the address space that minimum particle size divides not all type was all present, it is existing
The minimum particle size that the address space type of system relates generally to divides smaller, and the register resources that the optimization of this part can be saved have
Limit, so existing system address of cache is often it is not intended that this point.Subdivision has tens of in the multi-node system that the present invention is directed to
Individual address space type carries out system address map；Wherein, the minimum particle size of the operation of segment space can reach 16K (15 ground
Location) even more high, therefore divided by minimum particle size, the purpose of the register resources of saving system can be reached.
Step 101, the configuration requirement according to all scales and system address for supporting system of multinode network system, really
Determine the unified fixing address width of multinode network.
In this step, specifically include：
Determine corresponding all scales for supporting system according to all scales for supporting system of multinode network system
Memory space maximum；
According to the maximum of memory space, the maximum address width of multinode network system is determined；
Maximum address width according to multinode network system combines the system address configuration requirement of each multinode network, really
Fixed unified fixing address width.
It should be noted that supporting that system scale determines corresponding all to support system according to multinode network is all
The maximum of the memory space of scale is conventional techniques well known to those skilled in the art, be will not be repeated here.Multinode
The maximum address width of network system is that have memory space maximum to determine.That is, if memory space is up to 2 units, that
Only needing to 2 addresses can just distinguish, and system address 1 can represent all addresses.If memory space is 1024 units, need
1024 addresses are wanted, system address needs 10, and the rest may be inferred.
The configuration requirement of system address refers to that multinode network system is carried out data transmission using protocol massages, is used
Agreement be versatility well known to those skilled in the art agreement, be to determine for the maximum address digit that message is included,
Its address width needed with real system might not be consistent, and the system address width that it is actually needed is exactly that system address is matched somebody with somebody
Put requirement.Required according to fixing address width coupling system address configuration.The address space of such as message is entered with 40 bit registers
Row represents that being actually needed the system address for using needs 32, according to the determination of fixing address width, can use and take height merely
32 or it is low 32 as effective address.Certainly according to actually used, in order to avoid close memory access influence efficiency with many
In 32 as effective address, or according to the multiplexing intersected to partial address in actually used, such that it is able to using low
In the effective address of 32.
Step 102, divided by the minimum particle size of the address space of each type and unified fixing address width is obtained
The register digit information of the address space of each type.
In this step, specifically include：By the unified fixing address width, the address space of each type is subtracted most
The digit of the low order address that can be abandoned determined by small grain size division, the difference of acquisition is used as the address space of each type
Register digit information.
By the determination of register digit of the present invention, dividing part by minimum particle size reduces unnecessary address resource
Consumption.By the determination of register digit, the demand of can configure of total system is simplified.Due to using unified fixing address
Width, is beneficial to improve the portability and practicality of the network control chip of high-end server system.
Step 103, the register digit information according to the address space of each type and corresponding address space it is upper and lower
Boundary's effective address carries out the system address map of multinode network system.
In this step, carrying out system address map includes：Carried out systematically by changing register configuration or default addresses for use
Location maps.
It should be noted that modification register configuration is realized by register read-write, default addresses for use is by affiliated
Nodal information and default system scale, calculate value that each posts device to realize by existing address of cache mode.
Fig. 2 is the structured flowchart of the device that the present invention realizes system address map, as shown in Fig. 2 at least including：Most granule
Degree division unit, fixing address unit, deposit digit determining unit and address mapping unit；Wherein,
Minimum particle size division unit, for determining the address space type of multinode network system and the address of each type
The minimum particle size in space is divided；The minimum particle size of the address space of each type is divided and is sent to deposit digit determining unit.
Fixing address unit, for matching somebody with somebody according to all scales for supporting system of multinode network system and system address
Requirement is put, the unified fixing address width of multinode network is determined；The unified fixing address width for determining is sent to deposit position
Number determining unit.
Fixing address unit specifically for：
Determine corresponding all scales for supporting system according to all scales for supporting system of multinode network system
Memory space maximum；
According to the maximum of memory space, the maximum address width of multinode network system is determined；
Maximum address width according to multinode network system combines the system address configuration requirement of each multinode network, really
Fixed unified fixing address width.
Deposit digit determining unit, the minimum particle size for the address space by each type is divided and unified fixation
Address width obtains the register digit information of the address space of each type.
Deposit digit determining unit is specifically for by the unified fixing address width, subtracting the address of each type
The minimum particle size in space divide determined by the digit of low order address that can abandon, the difference of acquisition as each type ground
The register digit information in location space.
Address mapping unit, the register digit information and corresponding address for the address space according to each type is empty
Between bound effective address carry out the system address map of multinode network system.
Address mapping unit is specifically for, the register digit information of the address space according to each type and accordingly
The bound effective address in location space, multinode network system is carried out systematically by changing register configuration or default addresses for use
Location maps.
Clear detailed description is carried out to the present invention below in conjunction with specific embodiment, embodiment is not intended to limit the present invention
Protection domain.
Embodiment 1
First, determine that the address space type of multinode network system and the minimum particle size of the address space of each type are drawn
Point；
Here, suppose that the scope of certain address space type is the 32 ' h110C_ of h110C_110A_0000_0000 to 32 '
110A_FFFF_FFFF, by determining address space type it was determined that the minimum particle size of the address space is divided into 16.
System scale and system address configuration requirement are supported according to each multinode network is all, it is determined that it is unified regularly
Location width.Assuming that determining that system address fixed width is respectively 32 for the initial address and end address of 32, i.e. address realm
Position.
Divided by the minimum particle size of the address space of each type and unified fixing address width obtains register-bit
Number information.
Divided by fixing address width and minimum particle size, it may be determined that the signal for judging bound only needs to use just
Beginning address and end address 16 bit address high (by fixing address width subtract minimum particle size divide obtain difference).I.e. 16 '
The h110C_110A of h110C_110A and 16 '.
Storage and configuration to this space reflection information only need to the register of 16.
The bound effective address of register digit information and corresponding address space according to each multinode network is carried out
The system address map of each multinode network system.
Although the implementation method disclosed by the application is as above, described content is only to readily appreciate the application and use
Implementation method, is not limited to the application.Technical staff in any the application art, is taken off the application is not departed from
On the premise of the spirit and scope of dew, any modification can be carried out in the form and details implemented with change, but the application
Scope of patent protection, must be still defined by the scope of which is defined in the appended claims.
Claims (4)
1. a kind of method for realizing system address map, it is characterised in that including：
Determine that the address space type of multinode network system and the minimum particle size of the address space of each type are divided；
According to the configuration requirement of all scales and system address for supporting system of multinode network system, multinode network is determined
Unified fixing address width；
The ground of each type is obtained by the minimum particle size division and unified fixing address width of the address space of each type
The register digit information in location space；
The register digit information of the address space according to each type and the bound effective address of corresponding address space are entered
The system address map of row multinode network system；
Wherein, the configuration requirement according to all scales and system address for supporting system of multinode network system, it is determined that
The unified fixing address width of multinode network includes：
Determine depositing for corresponding all scales for supporting system according to all scales for supporting system of multinode network system
Store up the maximum in space；
According to the maximum of memory space, the maximum address width of multinode network system is determined；
Maximum address width according to multinode network system combines the system address configuration requirement of each multinode network, it is determined that system
One fixing address width；
The minimum particle size of the address space by each type is divided and unified fixing address width obtains each type
The register digit packet of address space include：By the unified fixing address width, the address for subtracting each type is empty
Between minimum particle size divide determined by the digit of low order address that can abandon, the difference of acquisition as each type address
The register digit information in space.
2. method according to claim 1, it is characterised in that the system address map that carries out includes：Posted by modification
Storage is configured or default addresses for use carries out system address map.
3. a kind of device for realizing system address map, it is characterised in that at least include：Minimum particle size division unit, regularly
Location unit, deposit digit determining unit and address mapping unit；Wherein,
Minimum particle size division unit, for determining the address space type of multinode network system and the address space of each type
Minimum particle size divide；The minimum particle size of the address space of each type is divided and is sent to deposit digit determining unit；
Fixing address unit, for will according to the configuration of all scales and system address for supporting system of multinode network system
Ask, determine the unified fixing address width of multinode network；The unified fixing address width for determining is sent to deposit digit true
Order unit；
Deposit digit determining unit, the minimum particle size for the address space by each type is divided and unified fixing address
Width obtains the register digit information of the address space of each type；
Address mapping unit, register digit information and corresponding address space for the address space according to each type
Bound effective address carries out the system address map of multinode network system；
Wherein, the fixing address unit specifically for：
Determine depositing for corresponding all scales for supporting system according to all scales for supporting system of multinode network system
Store up the maximum in space；
According to the maximum of memory space, the maximum address width of multinode network system is determined；
Maximum address width according to multinode network system combines the system address configuration requirement of each multinode network, it is determined that system
One fixing address width；
The deposit digit determining unit is specifically for by the unified fixing address width, subtracting the address of each type
The minimum particle size in space divide determined by the digit of low order address that can abandon, the difference of acquisition as each type ground
The register digit information in location space.
4. device according to claim 3, it is characterised in that address mapping unit is specifically for according to each type
The register digit information of address space and the bound effective address of corresponding address space, by change register configuration or
Default addresses for use carries out the system address map of multinode network system.
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| CN102508786A (en) * | 2011-11-02 | 2012-06-20 | 盛科网络（苏州）有限公司 | Chip design method for optimizing space utilization rate and chip thereof |
| CN102880552A (en) * | 2012-07-31 | 2013-01-16 | 中国人民解放军国防科学技术大学 | Hybrid address mapping method for multi-core multi-threading processor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102508786A (en) * | 2011-11-02 | 2012-06-20 | 盛科网络（苏州）有限公司 | Chip design method for optimizing space utilization rate and chip thereof |
| CN102880552A (en) * | 2012-07-31 | 2013-01-16 | 中国人民解放军国防科学技术大学 | Hybrid address mapping method for multi-core multi-threading processor |
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