CN103986116A - Primary-current detection and control module and method based on FPGA - Google Patents
Primary-current detection and control module and method based on FPGA Download PDFInfo
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- CN103986116A CN103986116A CN201310049503.3A CN201310049503A CN103986116A CN 103986116 A CN103986116 A CN 103986116A CN 201310049503 A CN201310049503 A CN 201310049503A CN 103986116 A CN103986116 A CN 103986116A
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Abstract
The invention relates to a primary-current detection and control module and method based on an FPGA. The module includes an input signal adjustment unit, an analog adder unit, a control logic circuit unit, a threshold comparison and pulse width control unit and a circuit breaker driving circuit unit. The method includes the following steps: 1) a differential current is input and then input into the analog adder unit via a differential single-end conversion unit, a full-wave rectifying unit and a filtering unit to carry out level conversion or enters an A/D unit to carry out sampling detection; 2) the A/D unit samples numerical values and communicates with a main control device through a CPCI bus so as to decide short-circuit conditions and control a circuit breaker to act; 3) the main control device sets a comparison threshold of an analog comparator through the CPCI bus and the level conversion result is compared at an analog comparison circuit and a short circuiter is directly controlled through the FPGA to act; 4) current is output from an open-circuit control unit so that monitoring is completed. The primary-current detection and control module based on the FPGA is simple in structure and low in cost and has the excellent characteristics of being speedy and high in reliability and the like.
Description
Technical field
The present invention relates to a kind of limit, source current detecting (Primary Current Monitoring is called for short PCM) module based on FPGA, for bullet train electric power system real-time inspection and control.
Background technology
Bullet train central control unit CCU(Central Control Unit) supply module, central processing unit CPU, TCN gateway, IO module, bus management module, backboard etc., partly consist of, Main Function has been train system logic control and each parts has been monitored and protection.
Limit, source current detecting (PCM) module carry, on central processing unit CPU, carries out data communication by bus.Current detection module monitoring sideline road, source, limit, source input current, return current and LC line filter electric current, when transshipping, during the dangerous situation such as electric leakage or current unbalance, output can recover DC control signal, and limit, source current detecting is mainly used in connecting/cutting off when fault limit, source current path.Yet current domestic bullet train system research and development is at the early-stage, there is no reliable and stable limit, source current detecting control module.
Summary of the invention
In order to realize the high real-time that coordinates CCU to use, limit, source current detecting and the control of high reliability, the invention provides a kind of limit, source current detecting and control module based on FPGA, this module is comprised of five parts: input signal adjustment unit, the analog adder unit for circuit input current and return current monitoring, threshold value comparison and pulse width control unit, control logic circuit unit and high-speed circuit breaker drive circuit unit.For realize with CPU module in CCU unit between communicate by letter, taked PC104 standard and the design of PC104 operating such, realize simple and control widely, adopt CPCI core bus physical interface, mechanical dimension adopts standard 3U board.
Technical scheme of the present invention is as follows: a kind of limit, source current detecting and control module based on FPGA, it is characterized in that, by input signal adjustment unit, analog adder unit, control logic circuit unit, threshold values comparison, formed with pulse width control unit and circuit breaker drive circuit unit
Described input signal adjustment unit comprises: differential conversion single-end circuit, all-wave precise rectification circuit and filter circuit;
Described control logic circuit unit comprises A/D Acquisition Circuit and FPGA board, and described A/D Acquisition Circuit is imported the data that collect FPGA into and carried out communication with cpci bus main control device;
Described threshold values comparison and pulse width control unit comprise analog comparator, D/A change-over circuit and FPGA board, and the decision-making numerical value that FPGA board feeds back by CPCI core bus arranges analog comparator comparison threshold to D/A change-over circuit, enters analog comparator;
Described analog adder unit is for monitoring circuit input current and return current;
Described circuit breaker drive circuit unit is by the HSCB circuitry cuts main circuit breaker of quicking break.
Limit, described source current detecting forms Acquisition Circuit, Gather and input electric current, line filter electric current and return current with control module by two groups of identical San road analog signal input circuits.
Described HSCB high speed circuit breaker is comprised of high-voltage MOSFET and isolation DC/DC control circuit.
Described FPGA board is constructed based on PC104 interface protocol.
Further, input signal is 6 tunnel differential current signal.
Further, the preferred LM2902 four-operational amplifier in described differential conversion single-end circuit unit, differential input end adopts diode to form.
Further, the preferred LM2902 four-operational amplifier in described all-wave precise rectification circuit unit and 1N5817 Schottky diode form, and input signal is that prime difference turns single-ended amplifying circuit, and output signal is full wave rectified signal.
Further, the described A/D Acquisition Circuit preferred AD7920 in unit, wherein the maximum sample frequency of AD7920 is 250K, resolution is 12.
Further, the preferred DA7303 of described D/A conversion circuit unit, SPI interface, adopts the power supply of REF195 a reference source.
Limit, source current detecting and a control method based on FPGA, its step comprises:
1) input one difference current is inputted analog adder unit and is carried out level translation or enter A/D collecting unit carrying out sample detecting after the single-ended conversion unit of difference, full-wave rectification unit and filter unit;
2) A/D collecting unit sampling numerical value is by cpci bus and main control device communication, and decision-making short circuit condition, controls circuit breaker action;
3) main control device arranges analog comparator comparison threshold by cpci bus, and the result after described level translation compares at analog comparator, directly controls short-circuiting device move by FPGA;
4) from circuit breaker drive circuit unit output current, complete monitoring.
Invention beneficial effect
The present invention is simple in structure, cost is low.Adopting high-performance FPGA to complete (entering scene 2 normalized current comprising two detects and two-way electric current average current detection) number Real-time Collections monitoring of 6 Lu Yuan limit electric currents letters and 2 tunnels quicks break and controls output.There is the excellent characteristics such as high speed, high reliability.The present invention can be at the CPCI of any compatible PC104 standard physical bus interface, highly versatile.
Accompanying drawing explanation
Fig. 1 is the circuit theory schematic diagram of limit, PCM source current monitoring card preferred embodiment in one embodiment of the invention;
Fig. 2 is that in one embodiment of the invention, front end differential current signal turns single-ended voltage signal circuit diagram;
Fig. 3 is full-wave rectifying circuit schematic diagram in one embodiment of the invention;
Fig. 4 is analogue filter circuit schematic diagram in one embodiment of the invention;
Fig. 5 is A/D collecting unit schematic diagram in one embodiment of the invention;
Fig. 6 is analog addition cell schematics in one embodiment of the invention;
Fig. 7 is D/A converting unit schematic diagram in one embodiment of the invention;
Fig. 8 is HSCB circuit breaker schematic diagram in one embodiment of the invention;
Embodiment
For above-mentioned purpose of the present invention, feature and advantage are become apparent more, below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
The present invention is based on limit, source current detecting and the control module of FPGA, input signal adjustment unit, analog adder unit, control logic circuit unit, threshold values comparison, consist of with pulse width control unit and circuit breaker drive circuit unit, input signal adjustment unit comprises: differential conversion single-end circuit, all-wave precise rectification circuit and filter circuit; Control logic circuit unit comprises A/D Acquisition Circuit and FPGA board, and A/D Acquisition Circuit is imported the data that collect FPGA into and carried out communication with cpci bus main control device; Threshold values comparison and pulse width control unit comprise analog comparator, D/A change-over circuit and FPG board, and the decision-making numerical value that FPGA board feeds back by CPCI core bus arranges analog comparator comparison threshold to D/A change-over circuit, enters analog comparator.
Wherein, analog adder unit is for monitoring circuit input current and return current; Circuit breaker drive circuit unit is by the HSCB circuitry cuts main circuit breaker of quicking break.Limit, source current detecting adopts with control module Acquisition Circuit Gather and input electric current, line filter electric current and the return current being comprised of two groups of identical San road analog signal input circuits.HSCB high speed circuit breaker is comprised of high-voltage MOSFET and isolation DC/DC control circuit.FPGA board is based on PC104 interface protocol.Input signal is 6 tunnel differential current signal.
The preferred LM2902 four-operational amplifier in differential conversion single-end circuit unit, differential input end adopts diode to form.The preferred LM2902 four-operational amplifier in all-wave precise rectification circuit unit and 1N5817 Schottky diode form, and input signal is that prime difference turns single-ended amplifying circuit, and output signal is full wave rectified signal.The preferred AD7920 in A/D Acquisition Circuit unit, wherein the maximum sample frequency of AD7920 is 250K, 12 bit resolutions.The preferred DA7303 of D/A conversion circuit unit, SPI interface, adopts the power supply of REF195 a reference source.
Limit, PCM source current monitoring board is used for gathering circuit input current and return current, by alternative route input current and return current value, obtains line work situation information.While there is the problems such as electric leakage when circuit, PCM circuit input current detected and return current unequal, by CPCI core bus, to CPU board card, send early warning, the high speed circuit breaker (HSCB) of PCM moves rapidly and cuts off main circuit breaker, safeguards system safe operation simultaneously; After PCM detects circuit input current and return current and surpasses secure threshold, also can to CPU, send early warning by core bus, by CPU decision-making, whether cut off main circuit breaker.
PCM board is comprised of the FPGA of two groups of identical collection control units and a slice Xilinx, and each unit You San road analog signal input circuit and HSCB high speed circuit breaker form.Three road analog input circuits gather line current, line filter electric current, return current; HSCB high speed circuit breaker consists of high-voltage MOSFET and isolation DC/DC control circuit; FPGA is used for realizing PC104 interface protocol, and signals collecting, with the control of opening circuit.
The schematic block circuit diagram of the specific embodiment of the invention as shown in Figure 1; As shown in Figure 1,6 tunnel differential current sensor signals are input to signal conditioning circuit, through difference, turn single-end conversion, all-wave precision rectifying, filter circuit processing, wherein line current and line filter current signal gather for A/D, data gather and the communication of cpci bus main control device through FPGA, when overcurrent, open circuit or can control limit, HSCB breaker circuit segment source electric current when the fault such as non-equilibrium occurs; Line current and return current signal carry out difference through analog adder; enter analog comparator; the decision-making numerical value that FPGA feeds back by cpci bus arranges analog comparator comparison threshold to D/A; be line current and return current error threshold; this threshold value is safeguard protection thresholding, and its scope is wider than the thresholding that normally opens circuit.When there is the excessive overload of electric current, gained comparison signal directly enters FPGA, can directly control HSCB breaker circuit and implement rapid cut-out function, without the decision-making of cpci bus main control device, judges.
That in one embodiment of the invention, front end differential current signal turns single-ended voltage signal circuit unit schematic diagram as shown in Figure 2; As shown in the figure, the typical difference that this circuit belongs to discharge circuit turns single-ended utilization, and preferably LM2902 four high guaily unit (or the close amplifier of parameter) is realized cheaply, and differential input end adopts diode protection.The AC analogue signal that adapts to 50HZ ± 10HZ, the enlargement ratio of 1X within the scope of ± 5V gamut.
Full-wave rectifying circuit cell schematics in one embodiment of the invention as shown in Figure 3; This circuit belongs to the all-wave precise rectification circuit that discharge circuit is built, preferably LM2902 four high guaily unit (or the close amplifier of parameter) and 1N5817 Schottky diode (or the close Schottky diode of parameter) form cheaply, input signal is that prime difference turns single-ended amplifying circuit, and output signal is full wave rectified signal.
Signal schematic diagram in analogue filter circuit unit in one embodiment of the invention as shown in Figure 4; The single order high pass filter that adopts low-cost amplifier external resistor electric capacity to form.
A/D Acquisition Circuit cell schematics in one embodiment of the invention as shown in Figure 5; ADC preferred circuit adopts AD7920 (or the close analog to digital converter of parameter), and wherein the maximum sample frequency of AD7920 is 250K, 12 bit resolutions, and power by a reference source REF195, for AD7920 provides low noise power supply, guarantee its precision.
Analog addition circuit unit schematic diagram in one embodiment of the invention as shown in Figure 6; By ADG419, realize passage and switch, amplifier realizes analog adder function.
D/A conversion circuit unit schematic diagram in one embodiment of the invention as shown in Figure 7; The preferred DA7303 of DAC, SPI interface, controls output by FPGA, adopts the power supply of REF195 a reference source, reduces output noise, and output voltage is supplied with analog comparator.
If Fig. 8 is HSCB breaker circuit figure of the present invention; HSCB high speed circuit breaker is controlled disconnection by FPGA by optocoupler, and the state by the current whether short circuit of monitoring side buffer circuit feedback or overcurrent is to FPGA, controls high-power MOS shown in high pressure move by FPGA.
Finally should be noted that: above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit; Although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the field are to be understood that: still can modify or part technical characterictic is equal to replacement the specific embodiment of the present invention; And not departing from the spirit of technical solution of the present invention, it all should be encompassed in the middle of the technical scheme scope that the present invention asks for protection.
Claims (10)
1. limit, source current detecting and the control module based on FPGA, is characterized in that, by input signal adjustment unit, analog adder unit, control logic circuit unit, threshold values comparison, formed with pulse width control unit and circuit breaker drive circuit unit,
Described input signal adjustment unit comprises: differential conversion single-end circuit, all-wave precise rectification circuit and filter circuit;
Described control logic circuit unit comprises A/D Acquisition Circuit and FPGA board, and described A/D Acquisition Circuit is imported the data that collect FPGA into and carried out communication with cpci bus main control device;
Described threshold values comparison and pulse width control unit comprise analog comparator, D/A change-over circuit and FPGA board, and the decision-making numerical value that FPGA board feeds back by CPCI core bus arranges analog comparator comparison threshold to D/A change-over circuit, enters analog comparator;
Described analog adder unit is for monitoring circuit input current and return current;
Described circuit breaker drive circuit unit is by the HSCB circuitry cuts main circuit breaker of quicking break.
2. limit, source current detecting and the control module based on FPGA as claimed in claim 1, it is characterized in that, limit, described source current detecting forms Acquisition Circuit, Gather and input electric current, line filter electric current and return current with control module by two groups of identical San road analog signal input circuits.
3. limit, source current detecting and the control module based on FPGA as claimed in claim 1, is characterized in that, described HSCB high speed circuit breaker is comprised of high-voltage MOSFET and isolation DC/DC control circuit.
4. limit, source current detecting and the control module based on FPGA as claimed in claim 1, is characterized in that, described FPGA board is constructed based on PC104 interface protocol.
5. limit, source current detecting and the control module based on FPGA as claimed in claim 1, is characterized in that, input signal is 6 tunnel differential current signal.
6. limit, source current detecting and the control module based on FPGA as claimed in claim 1, is characterized in that, the preferred LM2902 four-operational amplifier in described differential conversion single-end circuit unit, and differential input end adopts diode to form.
7. limit, source current detecting and the control module based on FPGA as claimed in claim 1, it is characterized in that, the preferred LM2902 four-operational amplifier in described all-wave precise rectification circuit unit and 1N5817 Schottky diode form, input signal is that prime difference turns single-ended amplifying circuit, and output signal is full wave rectified signal.
8. limit, source current detecting and the control module based on FPGA as claimed in claim 1, is characterized in that, the described A/D Acquisition Circuit preferred AD7920 in unit, and wherein the maximum sample frequency of AD7920 is 250K, resolution is 12.
9. limit, source current detecting and the control module based on FPGA as claimed in claim 1, is characterized in that, the preferred DA7303 of described D/A conversion circuit unit, and SPI interface, adopts the power supply of REF195 a reference source.
10. limit, source current detecting and the control method based on FPGA, its step comprises:
1) input one difference current is inputted analog adder unit and is carried out level translation or enter A/D collecting unit carrying out sample detecting after the single-ended conversion unit of difference, full-wave rectification unit and filter unit;
2) A/D collecting unit sampling numerical value is by cpci bus and main control device communication, and decision-making short circuit condition, controls circuit breaker action;
3) main control device arranges analog comparator comparison threshold by cpci bus, and the result after described level translation compares at analog comparator, directly controls short-circuiting device move by FPGA;
4) from circuit breaker drive circuit unit output current, complete monitoring.
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| CN109884382A (en) * | 2019-03-22 | 2019-06-14 | 南京邮电大学 | A kind of current signal detecting device based on FPGA |
| CN110137903A (en) * | 2019-05-09 | 2019-08-16 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of power output interface realization circuit of isomery protection |
| CN110865231A (en) * | 2019-12-09 | 2020-03-06 | 浙江中控技术股份有限公司 | Power supply voltage detection circuit for bus isolation |
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| CN114063523A (en) * | 2021-11-17 | 2022-02-18 | 广西电网有限责任公司崇左供电局 | Tripping and closing loop collector |
| CN117330828A (en) * | 2023-09-27 | 2024-01-02 | 怀化建南机器厂有限公司 | Electric energy meter with client short-circuit protection function |
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