CN103985414A - Method and circuit for overcoming Erase Stress influence of nonvolatile memory - Google Patents
Method and circuit for overcoming Erase Stress influence of nonvolatile memory Download PDFInfo
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Abstract
The embodiment of the invention discloses a method and a circuit for overcoming an Erase Stress influence of a nonvolatile memory. The method comprises the steps of selecting one of memory units executing the erase operations, which is adjacent to an unselected region, as a to-be-tested memory unit; performing threshold voltage margin detection on the to-be-tested memory unit, wherein the threshold voltage margin detection comprises two times of voltage comparison; and performing programming operation on the to-be-tested memory unit based on a result of the threshold voltage margin detection. The invention further constructs a circuit for overcoming the Erase Stress influence of the nonvolatile memory. Implementing the method has the beneficial effect that through the threshold voltage margin detection, the Erase Stress influence of the nonvolatile memory is overcome so that the memory is high in reliability and high in reading speed.
Description
Technical field
The present invention relates to flash memory technology field, relate in particular to a kind of Method and circuits that non-volatile memory erase operation affects the Erase Stress that in contiguous not favored area, storage unit is brought that overcomes.
Background technology
The programming operation of nonvolatile memory needs through " wipe-programme " two operating process.If wished, when some storage unit are programmed in nonvolatile memory, first must carry out erase operation to the sector at this storage unit place, piece or whole nonvolatile memory chip.So erase operation is one of most important operation in the application of nonvolatile memory, therefore, it is very necessary handling erase operation well and bringing corresponding impact.This importance is especially embodied in NOR Flash.When the erase operation of NOR Flash storer, at the apply-9.1V of grid G end of the choose storage unit that need to do erase operation voltage, the grid G end of the storage unit in other 63 sectors that are connected together with its substrate is 0V, voltage at source S end and apply+7V～+ 10V of substrate (source S end and substrate are connected together), drain D end is making alive not, and the duration of single erasing pulse is generally several milliseconds to a few tens of milliseconds.Erased conditions with respect to substrate to grid G end+16.1V pressure reduction, in other contiguous unchecked 63 sectors, the substrate of storage unit is considered to " the Erase Stress " to storage unit in its contiguous not favored area to grid G end+7V～+ 10V pressure reduction.
Therefore,, when a certain storage unit is wiped, can there is on the storage unit in its contiguous not favored area the impact of Erase Stress.Storage unit wipe the convergence that can weaken the threshold voltage ranges distribution of state of memory cells " 0 " and state " 1 " to the Erase Stress of the storage unit in its contiguous not favored area, the storage unit to state " 0 ", this impact is more obvious.In most cases, need to do repeatedly sector erasing to the storage unit in this sector, this also can strengthen the Erase Stress impact of sector erasing on contiguous not other 63 sectors of favored area, and the convergence that in its contiguous not other 63 sectors of favored area, storage unit threshold voltage ranges distributes is weakened widely.For the storage unit of its contiguous not favored area internal state " 0 ", can make its threshold voltage distribute and move to left, reduce the threshold voltage nargin of state " 0 ", when serious, it be can reduce and speed and reliability are read.
And high reliability and fast reading speed are the important performance indexes of storer, the convergence that this requires the state " 0 " of storage unit and the threshold voltage ranges of state " 1 " to distribute and had.
Summary of the invention
Embodiment of the present invention technical matters to be solved is, the defect of the Erase Stress impact causing for the above-mentioned erase operation of prior art, provides a kind of method that overcomes nonvolatile memory Erase Stress impact.
In order to solve the problems of the technologies described above, the embodiment of the present invention provides a kind of method that overcomes nonvolatile memory Erase Stress impact, comprises the following steps:
A storage unit conduct in the contiguous non-selected region of storage unit of S1, selection execution erase operation
Storage unit to be measured;
S2, described storage unit to be measured is carried out to the detection of threshold voltage nargin, described threshold voltage nargin detects and comprises twice voltage ratio;
S3, the result detecting based on described threshold voltage nargin are carried out programming operation to described storage unit to be measured.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, described step S2 comprises:
S21, for the first time voltage ratio, whether the threshold voltage vt h of more described storage unit to be measured is less than first and applies voltage V1;
S22, if so, end operation, if not, perform step S23;
S23, for the second time voltage ratio, whether the threshold voltage vt h of more described storage unit to be measured is greater than second and applies voltage V2;
S24, if so, end operation, if not, carry out described step S3.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, in step S21: when described storage unit to be measured is state " 0 ", described first applies voltage V1 is+5V, when described storage unit to be measured is state " 1 ", described first applies voltage V1 is+3V.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, described step S21 comprises the following steps:
S211, reference current source produce first reference current;
S212, on the word line of described storage unit to be measured, apply one described first and apply voltage V1, give on the word line of other storage unit on same bit line and apply 0V voltage, obtain first of described storage unit to be measured and measure electric current;
S213, described the first measurement electric current based on described storage unit to be measured and the comparative result of described the first reference current, the described threshold voltage vt h of more described storage unit to be measured and described first applies the size of voltage V1.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, the described storage unit in described step S1 is the storage unit of NOR Flash storer.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, in described step S213, if described first measures electric current, be greater than described the first reference current, the threshold voltage vt h of described storage unit to be measured is less than described first and applies voltage V1; If described first measures electric current, equal described the first reference current, the threshold voltage vt h of described storage unit to be measured equals described first and applies voltage V1; If described first measures electric current, be less than described the first reference current, the threshold voltage vt h of described storage unit to be measured is greater than described first and applies voltage V1.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, in step S23, when described storage unit to be measured is state " 0 ", described second applies voltage V2 is+7V, when described storage unit to be measured is state " 1 ", described second applies voltage V2 is+5V.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, described step S23 comprises the following steps:
S231, reference current source produce second reference current;
S232, on the word line of described storage unit to be measured, apply one described second and apply voltage V2, give on the word line of other storage unit on same bit line and apply 0V voltage, obtain second of described storage unit to be measured and measure electric current;
S233, described the second measurement electric current based on described storage unit to be measured and the comparative result of described the second reference current, the described threshold voltage vt h of more described storage unit to be measured and described second applies the size of voltage V2.
In a kind of method that overcomes nonvolatile memory Erase Stress impact of the present invention, in described step S233, if described second measures electric current, be greater than described the second reference current, the threshold voltage vt h of described storage unit to be measured is less than described second and applies voltage V2; If described second measures electric current, equal described the second reference current, the threshold voltage vt h of described storage unit to be measured equals described second and applies voltage V2; If described second measures electric current, be less than described the second reference current, the threshold voltage vt h of described storage unit to be measured is greater than described second and applies voltage V2.
Correspondingly, the present invention also provides a kind of circuit that overcomes nonvolatile memory Erase Stress impact, comprising:
Storage unit to be measured;
The first reference current source module, for obtaining voltage ratio the first reference current for the first time;
The first voltage applies module, for applying one first on the word line in described storage unit to be detected, applies voltage V1;
The first current comparing module, for exporting the first check results;
The second reference current source module, for obtaining voltage ratio the second reference current for the second time;
Second voltage applies module, for applying one second on the word line in described storage unit to be detected, applies voltage V2;
The second current comparing module, for exporting the second check results;
Programming module, for carrying out programming operation based on the first check results and the second check results.
In a kind of circuit that overcomes nonvolatile memory Erase Stress impact provided by the invention, described storage unit to be measured is the storage unit in NOR Flash storer.
In the present invention, also provide in a kind of circuit that overcomes nonvolatile memory Erase Stress impact, when described storage unit to be measured is state " 0 ", described the first voltage applies first of module and applies voltage V1 for+5V, and described second voltage applies second of module and applies voltage V2=+7V; When described storage unit to be measured 101 is state " 1 ", described the first voltage applies first of module and applies voltage V1 for+3V, and described second voltage applies second of module and applies voltage V2=+5V.
Implement the embodiment of the present invention, there is following beneficial effect: passing threshold voltage margin detects, the convergence that guarantees the threshold voltage ranges distribution of storage unit, effectively overcomes the impact of nonvolatile memory Erase Stress, makes storer have high reliability and fast reading speed.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.Fig. 1 is a kind of process flow diagram that overcomes the method for nonvolatile memory Erase Stress impact of the present invention;
Fig. 2 is a kind of voltage comparing embodiment process flow diagram that overcomes the method for nonvolatile memory Erase Stress impact provided by the invention;
Fig. 3 is a kind of embodiment process flow diagram that overcomes the threshold voltage detection method of nonvolatile memory Erase Stress impact provided by the invention;
Fig. 4 is the electrical block diagram of the embodiment of a kind of circuit that overcomes nonvolatile memory Erase Stress impact provided by the invention;
Fig. 5 is a kind of process flow diagram that overcomes the method improvement erase operation of nonvolatile memory Erase Stress impact that utilizes provided by the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Fig. 1 is a kind of process flow diagram that overcomes the method for nonvolatile memory Erase Stress impact of the present invention.Be specially: select a storage unit in the contiguous non-selected region of storage unit of execution erase operation, as storage unit to be measured (step S1); Then carry out step S2, described storage unit to be measured is carried out to the detection of threshold voltage nargin, detect the voltage of described storage unit to be measured whether within threshold voltage nargin, if the threshold voltage of described storage unit to be measured does not meet the requirement of threshold voltage nargin, perform step S3, described storage unit to be measured is carried out to one-time programming operation, if meet the requirement of threshold voltage nargin, end operation.
In embodiment of the present invention, be by adopting twice voltage ratio, whether the threshold voltage that judges described storage unit to be measured meets the requirement of threshold voltage nargin.Refer to Fig. 2, for the present invention is a kind of, overcome the process flow diagram of voltage comparing embodiment of the method for nonvolatile memory Erase Stress impact.Concrete operations flow process is: execution step S1, and a storage unit in the contiguous non-selected region of storage unit of erase operation is carried out in selection, as storage unit to be measured; Carry out step S2, described storage unit to be measured is carried out to threshold voltage nargin detection (S2 comprises the S21-S24 step in Fig. 1): described storage unit to be measured is carried out threshold voltage for the first time and compared flow process (S21); Whether the threshold voltage vt h of storage unit more to be measured is less than first and applies voltage V1 (S22), if end operation carries out for the second time voltage ratio (S23) if not; If the threshold voltage vt h of storage unit to be measured is greater than second and applies voltage V2 (S24), if so, end operation, if not, carries out S3 step, and described storage unit to be measured is carried out to one-time programming operation.
Preferably, in the present embodiment, choose in the sector erasing of NOR Flash storer, the threshold voltage nargin of its contiguous not favored area internal state " 0 " storage unit to be detected and is programmed for example again and be explained.
The storage unit of NOR Flash storer is divided into state " 0 " and state " 1 ".The threshold voltage vt h of state " 1 " is from+1V to+3V ,+5V between+3V+2V voltage difference is the threshold voltage nargin (Margin) of state " 1 "; The threshold voltage vt h of state " 0 " is from+7V to+9V ,+7V between+5V+pressure reduction of 2V is the threshold voltage nargin of state " 0 ".For state " 1 " and state " 0 ", larger threshold voltage nargin can guarantee reading speed faster, and better threshold voltage convergence in distribution performance makes to keep better consistance between each storage unit, is conducive to the various operations of storage unit.In order to detect sector erasing, whether the Erase Stress of storage unit in contiguous not favored area has been weakened to the convergence of the threshold voltage distribution of state " 0 ", the threshold voltage vt h nargin that makes its state " 0 " is lower than+2V, increases and carries out twice threshold voltage ratio to carrying out 63 sector storage unit in the contiguous not favored area of storage unit of sector erasing.Be greater than+the 7V of threshold voltage of normal condition " 0 ", if it is between+7V at+5V that result more out shows the threshold voltage vt h of storage unit, the threshold voltage nargin that is to say state " 0 " storage unit is lower than+2V, this storage unit is carried out to once+8.4V programming operation, the threshold voltage nargin of increase state " 0 ", the threshold voltage distribution of state " 0 " is moved to right, thereby overcome the Erase Stress impact of sector erasing on contiguous not selected areas internal state " 0 " storage unit.
Therefore, in this embodiment, for the first time voltage ratio compared with time, first to apply voltage be V1=+5V, judges the whether be less than+5V of threshold voltage vt h of described storage unit to be measured, if so, end operation.If not, described storage unit to be measured is carried out for the second time to voltage ratio, for the second time voltage ratio second apply voltage for+7V, judge the whether be greater than+7V of threshold voltage vt h of described storage unit to be measured, if so, end operation.If not, the threshold voltage of described storage unit to be measured at+5V between+7V, the threshold voltage nargin that is to say state " 0 " storage unit, lower than+2V, is carried out one-time programming operation to described storage unit to be measured, increases the threshold voltage nargin of described storage unit to be measured.Programming operation is herein+8.4V programming operation, is specially: at add+8.4V of grid G end voltage, and add+3.9V of drain D end voltage, source S end and substrate add 0V voltage, and the programming pulse time is that 1 μ s is to 2 μ s.
After sector erasing or piece are wiped, the threshold voltage nargin of its contiguous not favored area internal state " 1 " storage unit is detected and programming is identical with the operating process of state " 0 " storage unit again, difference applies voltage difference for it, be specially V1=+3V, V2=+5V, does not repeat them here.
After sector erasing or piece are wiped, the threshold voltage nargin of its contiguous not favored area internal state " 0 " storage unit is detected and programmed also referred to as the Recovery to state " 0 " again, because execution sector erasing or piece all can carry out above " detection of threshold voltage nargin " to storage unit in its contiguous not favored area after wiping at every turn, its contiguous not threshold voltage nargin of favored area internal state " 0 " storage unit can't reduce along with the increase of sector erasing or piece erasing times, make the convergence of the threshold voltage vt h scope distribution of state " 0 " storage unit obtain good assurance, thereby the good speed that is read and good reliability have been guaranteed.
In the present embodiment, for the comparative approach of voltage, by electric current, realize, as shown in Figure 3.Fig. 3 is the embodiment process flow diagram of the threshold voltage detection method of a kind of method that overcomes nonvolatile memory Erase Stress impact provided by the invention.In carrying out the process of threshold voltage nargin detection, need to carry out twice voltage ratio, the voltage swing in voltage comparison procedure is to realize by the detection method shown in Fig. 2.The voltage ratio detection method flow process for the first time of take in the present embodiment, as example is explained, is specially: execution step S211, and reference current generating circuit produces a first reference current Iref, and the first reference current Iref size is 2-3 μ A; Execution step S212 applies one first and applies voltage V1 on the word line of described storage unit to be measured, on the word line to other storage unit on same bit line, applies 0V voltage, show that first of described storage unit to be measured measured electric current I measure.
Execution step S213, the relatively size of the first measurement electric current I measure and the first reference current Iref.
Because the value of the first described reference current Iref is very little, what can be similar to thinks herein:
If first measures electric current I measure > the first reference current Iref: the threshold voltage vt h of described storage unit to be measured is less than first and applies voltage V1;
If first measures electric current I measure=the first reference current Iref: the threshold voltage vt h of described storage unit to be measured equals first and applies voltage V1;
If first measures electric current I measure1 < the first reference current Iref: the threshold voltage vt h of described storage unit to be measured is greater than first and applies voltage V1.
The current detecting that voltage detection method of the present invention is not limited to set forth in the present embodiment, also can adopt other to execute alive mode and measure, or adopts resistance, capacitance measurement method to realize, and repeats no more herein.
Fig. 4 is the electrical block diagram of the embodiment of a kind of circuit that overcomes nonvolatile memory Erase Stress impact provided by the invention.It comprises storage unit 101, is storage unit to be measured; The first reference current source module 102, for obtaining voltage ratio the first reference current for the first time; The first voltage applies module 103, for applying one first on the word line in described storage unit to be measured, applies voltage V1; The first current comparing module 104, applies the first check results of voltage V1 for exporting threshold voltage vt h and first; The second reference current source module 105, for obtaining voltage ratio the second reference current for the second time; Second voltage applies module 106, for applying one second on the word line in described storage unit to be measured, applies voltage V2; The second current comparing module 107, applies the check results of voltage V2 for exporting threshold voltage vt h and second; Programming module 108, for carrying out programming operation after twin check result.
Be specially: described the first reference current source module 102 produces first reference current in described storage unit to be measured, and described the first voltage applies module 103 and on the word line of described storage unit to be measured, applies one first and apply voltage V1, on word line to other storage unit on same bit line, apply 0V voltage, draw the first measurement electric current of described storage unit to be measured, described the first current comparing module 104 compares the size of the first measurement electric current and the first reference current, then according to the relation of voltage and electric current in voltage detection method described in Fig. 2, obtain the first check results, described the second reference current source module 105 produces second reference current in described storage unit to be measured, and described second voltage applies module 106 and on the word line of described storage unit to be measured, applies one second and apply voltage V2, on word line to other storage unit on same bit line, apply 0V voltage, draw the second measurement electric current of described storage unit to be measured, the second current comparing module 107 compares the size of the second measurement electric current and the second reference current, again according to the relation of voltage and electric current in voltage detection method described in Fig. 2, obtain the second check results, programming module 108 carries out programming operation based on the first check results and the second check results to described storage unit to be measured.It is example that the present embodiment be take to the voltage margin detection of state " 0 " storage unit, and wherein Iref is 2-3 μ A, V1=+5V, V2=+7V.In two check results, when be greater than+5V of threshold voltage and be less than+7V, programming module 108 carry out+8.4V programming operations, otherwise, end operation.
Fig. 5 is a kind of process flow diagram that overcomes the method improvement erase operation of nonvolatile memory Erase Stress impact that utilizes provided by the invention.Due to uncertain, to carry out the relative physical address that sector erasing or piece are wiped, choose to carry out the sevtor address of sector erasing may be at the initiating terminal of array, also may be in centre, also may be at end end, so, algorithm for simplification state " 0 " Recovery, sector or the piece in the present embodiment, sector erasing or piece wiped also carry out " 0 " Recovery, do not affect sector erasing or piece erase operation, do not affect " 0 " Recovery to contiguous unchecked 63 sectors or 3 pieces yet.Inside at NOR Flash storer, often the storage unit of 4 pieces is shared a P trap, that is to say a shared P trap of the storage unit of every 64 sectors, conventionally we are called contiguous storage area by the storage area of sharing a P trap, a P trap is shared in 64 sectors, conventionally these 64 sectors is called to an array.So, no matter to carry out sector that sector erasing or piece wipe or piece physical address relative position at array where, all, from the leading address of array, the last address of this array detected always.
Concrete operations are: execution step 201 chooses a sector or piece to carry out erase operation in storage chip, after completing erase operation, execution step 202, from the leading address of array, start the flow process of execution graph 1, until the last address of array, the sector that just sector erasing or piece are wiped or piece also carry out state " 0 " Recovery.
One of ordinary skill in the art will appreciate that all or part of flow process realizing in above-described embodiment method, to come the hardware that instruction is relevant to complete by computer program, described program can be stored in a computer read/write memory medium, this program, when carrying out, can comprise as the flow process of the embodiment of above-mentioned each side method.Wherein, described storage medium can be magnetic disc, CD, read-only store-memory body (Read-Only Memory, ROM) or random store-memory body (RandomAccess Memory, RAM) etc.
Above disclosed is only a kind of preferred embodiment of the present invention, certainly can not limit with this interest field of the present invention, one of ordinary skill in the art will appreciate that all or part of flow process that realizes above-described embodiment, and the equivalent variations of doing according to the claims in the present invention, still belong to the scope that invention is contained.
Claims (12)
1.-and kind overcome the method for nonvolatile memory Erase Stress impact, it is characterized in that, comprise the following steps:
A storage unit conduct in the contiguous non-selected region of storage unit of S1, selection execution erase operation
Storage unit to be measured;
S2, described storage unit to be measured is carried out to the detection of threshold voltage nargin, described threshold voltage nargin detects and comprises twice voltage ratio;
S3, the result detecting based on described threshold voltage nargin are carried out programming operation to described storage unit to be measured.
2. a kind of method that overcomes nonvolatile memory Erase Stress impact according to claim 1, is characterized in that, described step S2 comprises:
S21, for the first time voltage ratio, whether the threshold voltage vt h of more described storage unit to be measured is less than first and applies voltage V1;
S22, if so, end operation, if not, perform step S23;
S23, for the second time voltage ratio, whether the threshold voltage vt h of more described storage unit to be measured is greater than second and applies voltage V2;
S24, if so, end operation, if not, carry out described step S3.
3. a kind of method that overcomes nonvolatile memory Erase Stress impact according to claim 2, is characterized in that, the described storage unit in described step S1 is the storage unit of NOR Flash storer.
4. a kind of method that overcomes nonvolatile memory Erase Stress impact according to claim 3, it is characterized in that, in step S21, when described storage unit to be measured is state " 0 ", described first applies voltage V1 is+5V, when described storage unit to be measured is state " 1 ", described first applies voltage V1 is+3V.
5. according to a kind of method that overcomes nonvolatile memory Erase Stress impact described in any one claim in claim 2-4, it is characterized in that, described step S21 comprises the following steps:
S211, reference current source produce first reference current;
S212, on the word line of described storage unit to be measured, apply one described first and apply voltage V1, give on the word line of other storage unit on same bit line and apply 0V voltage, obtain first of described storage unit to be measured and measure electric current;
S213, described the first measurement electric current based on described storage unit to be measured and the comparative result of described the first reference current, the described threshold voltage vt h of more described storage unit to be measured and described first applies the size of voltage V1.
6. a kind of method that overcomes nonvolatile memory Erase Stress impact according to claim 5, it is characterized in that, in described step S213, if described first measures electric current, be greater than described the first reference current, the threshold voltage vt h of described storage unit to be measured is less than described first and applies voltage V1; If described first measures electric current, equal described the first reference current, the threshold voltage vt h of described storage unit to be measured equals described first and applies voltage V1; If described first measures electric current, be less than described the first reference current, the threshold voltage vt h of described storage unit to be measured is greater than described first and applies voltage V1.
7. a kind of method that overcomes nonvolatile memory Erase Stress impact according to claim 3, it is characterized in that, in step S23, when described storage unit to be measured is state " 0 ", described second applies voltage V2 is+7V, when described storage unit to be measured is state " 1 ", described second applies voltage V2 is+5V.
8. according to a kind of method that overcomes nonvolatile memory Erase Stress impact described in any one claim in claim 2-7, it is characterized in that, described step S23 comprises the following steps:
S231, reference current source produce second reference current;
S232, on the word line of described storage unit to be measured, apply one described second and apply voltage V2, give on the word line of other storage unit on same bit line and apply 0V voltage, obtain second of described storage unit to be measured and measure electric current;
S233, described the second measurement electric current based on described storage unit to be measured and the comparative result of described the second reference current, the described threshold voltage vt h of more described storage unit to be measured and described second applies the size of voltage V2.
9. a kind of method that overcomes nonvolatile memory Erase Stress impact according to claim 8, it is characterized in that, in described step S233, if described second measures electric current, be greater than described the second reference current, the threshold voltage vt h of described storage unit to be measured is less than described second and applies voltage V2; If described second measures electric current, equal described the second reference current, the threshold voltage vt h of described storage unit to be measured equals described second and applies voltage V2; If described second measures electric current, be less than described the second reference current, the threshold voltage vt h of described storage unit to be measured is greater than described second and applies voltage V2.
10. a circuit that overcomes nonvolatile memory Erase Stress impact, is characterized in that, comprising:
Storage unit to be measured (101);
The first reference current source module (102), for obtaining voltage ratio the first reference current for the first time;
The first voltage applies module (103), for applying one first on the word line in described storage unit to be detected (101), applies voltage V1;
The first current comparing module (104), for exporting the first check results;
The second reference current source module (105), for obtaining voltage ratio the second reference current for the second time;
Second voltage applies module (106), for applying one second on the word line in described storage unit to be detected (101), applies voltage V2;
The second current comparing module (107), for exporting the second check results;
Programming module (108), for carrying out programming operation based on the first check results and the second check results.
11. a kind of circuit that overcome nonvolatile memory Erase Stress impact according to claim 10, is characterized in that, described storage unit to be measured (101) is the storage unit in NOR Flash storer.
12. a kind of circuit that overcome nonvolatile memory Erase Stress impact according to claim 11, it is characterized in that, when described storage unit to be measured (101) is state " 0 ", described the first voltage applies first of module (103) and applies voltage V1 for+5V, and described second voltage applies second of module (106) and applies voltage V2=+7V; When described storage unit to be measured (101) is state " 1 ", described the first voltage applies first of module (103) and applies voltage V1 for+3V, and described second voltage applies second of module (106) and applies voltage V2=+5V.
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| CN107644666B (en) * | 2017-10-20 | 2020-09-18 | 上海华力微电子有限公司 | Self-adaptive flash memory write-in operation control method and circuit |
| CN109872756A (en) * | 2017-12-01 | 2019-06-11 | 北京兆易创新科技股份有限公司 | A kind of memory method for deleting and device |
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