CN103984160A - Array substrate, manufacturing method thereof and liquid crystal display component - Google Patents

Array substrate, manufacturing method thereof and liquid crystal display component Download PDF

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Publication number
CN103984160A
CN103984160A CN201310744501.6A CN201310744501A CN103984160A CN 103984160 A CN103984160 A CN 103984160A CN 201310744501 A CN201310744501 A CN 201310744501A CN 103984160 A CN103984160 A CN 103984160A
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electrode
insulation course
auxiliary electrode
array base
base palte
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CN103984160B (en
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叶岩溪
沈柏平
吴玲
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Tianma Microelectronics Co Ltd
Xiamen Tianma Microelectronics Co Ltd
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Tianma Microelectronics Co Ltd
Xiamen Tianma Microelectronics Co Ltd
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Abstract

The invention relates to an array substrate, a manufacturing method of the array substrate and a liquid crystal display component. The array substrate comprises a lining substrate and a plurality of pixel units which are located on the lining substrate, wherein each pixel unit comprises a first electrode, a first insulating layer and a second electrode which are sequentially stacked, the first electrode is provided with an opening, an auxiliary electrode is arranged under the first electrode, the second electrode is V-shaped, and the projection of the corner of the V shape along the direction perpendicular to the lining substrate drops in the picture of the opening. The auxiliary electrode is added under the first electrode in the array substrate, the manufacturing method of the array substrate and the liquid crystal display component, the auxiliary electrode is opposite to the corner of the V shape of the second electrode, so that the auxiliary electrode can push liquid crystal molecules located at the corner position to rotate, and the disclination and pressing uneven phenomenon is improved.

Description

Array base palte and manufacture method thereof and liquid crystal display device
Technical field
The present invention relates to technical field of liquid crystal display, particularly the liquid crystal display device of a kind of array base palte and manufacture method thereof and the described array base palte of employing.
Background technology
IPS pattern and FFS pattern are common liquid crystal display patterns, the principal feature of IPS pattern and FFS pattern is that positive and negative electrode is all arranged at same substrate, liquid crystal molecule all rotates within being parallel to the face of substrate, therefore the light in all directions all can, through the minor axis of liquid crystal molecule, be realized the object at wide visual angle.Meanwhile, because the liquid crystal molecule of IPS pattern and FFS pattern is horizontally, the homeotropic alignment that the deflection speed of liquid crystal molecule is more traditional wants fast, so the reaction velocity of the liquid crystal display device of IPS pattern and FFS pattern is faster.Because the liquid crystal display device of IPS pattern and FFS pattern has the performance of excellence like this, so be all used widely in various fields, such as industries such as household electrical appliances, medium, space flight and medical treatment.
At present, the liquid crystal display device of IPS pattern and FFS pattern has generally adopted two farmland technology (Two domain).The visual angle of two farmlands technology (Two domain) is wider than traditional single domain technology (one domain), can meet the quality requirements that user improves day by day.
Please refer to Fig. 1, the partial plan of the array base palte of the two farmlands of its employing that is prior art technology.As shown in Figure 1, on described array base palte 10, be provided with the pixel electrode 11 of a plurality of V-arrangements, described pixel electrode 11 has and is symmetrical arranged and interconnective two sides, liquid crystal molecule 50 is arranged on described pixel electrode 11, because the direction of two sides of described pixel electrode 11 is different, therefore be arranged between the liquid crystal molecule 50 on described pixel electrode 11 and can mutually compensate, thereby improve optical property with great visual angle.Meanwhile, owing to thering is self-compensating effect between liquid crystal molecule, therefore no longer need to realize optical compensation by polaroid.In the manufacture process of liquid crystal display device, can adopt more slim polaroid, to meet market for the demand of slimming.
Yet also there are some defects in two farmlands technology (Two domain), for example disclination (disclination) and press inequality (trace mura).As shown in Figure 1, the position of described a plurality of pixel electrodes 11 can be divided into A district, B district and C district, wherein, A district is positioned at the corner location of described pixel electrode 11, be the intersection of the both sides side of described pixel electrode 11, the contiguous described intersection in B district, C district is away from described intersection.Because A district is positioned at the intersection of two sides of described pixel electrode 11, two sides of described pixel electrode 11 are symmetrical for the acting force of the liquid crystal molecule 50 at this place.As shown in Figure 2, the liquid crystal molecule that is arranged in A district is subject to respectively the acting force (direction shown in figure dotted arrow) that two sides of described pixel electrode 11 apply, make a concerted effort (direction shown in solid arrow in figure) that it is suffered is mutually vertical with the major axis of described liquid crystal molecule, therefore the liquid crystal molecule at this place cannot rotate, that is to say, the liquid crystal molecule at this place can not play the effect of the polarization direction of due change light, therefore the light at this place cannot see through, and A district shows a concealed wire always.
Although two sides of described pixel electrode 11 are asymmetric for the acting force that is positioned at the liquid crystal molecule in B district, due to close intersection A, so the liquid crystal molecule at this place is also difficult to rotate.As shown in Figure 3, the liquid crystal molecule that is arranged in B district is subject to equally respectively the acting force (direction shown in figure dotted arrow) that two sides of described pixel electrode 11 apply, what it was suffered makes a concerted effort (direction shown in solid arrow in figure) except the major axis orthogonal components with described liquid crystal molecule, also there is faint horizontal component, but because the acting force of horizontal component is too faint, the liquid crystal molecule at this place rotates very difficult, therefore, in B district, there will be black area, the concealed wire in A district therefore and chap, i.e. so-called disclination (disclination) phenomenon.The liquid crystal molecule in C district is due to away from intersection A, and two sides of described pixel electrode 11 are obviously not reciprocity for the acting force of the liquid crystal molecule in C district, and the liquid crystal molecule at this place easily rotates, and therefore can normally show.
Meanwhile, the liquid crystal molecule rotation difficulty due to A district and B district, is also difficult to reply once be subject to pressing described liquid crystal molecule, so there is pressing inequality (trace mura).
Therefore, how to solve the existing disclination of liquid crystal display device of existing IPS pattern and FFS pattern and press uneven phenomenon, becoming those skilled in the art's technical matters urgently to be resolved hurrily.
Summary of the invention
In view of this, the invention provides a kind of array base palte, described array base palte comprises: underlay substrate and a plurality of pixel cell, and described a plurality of pixel cells are positioned on described underlay substrate, and described pixel cell comprises the first electrode, the first insulation course and the second electrode stacking gradually;
Wherein, described the first electrode has opening, and the below of described the first electrode is formed with an auxiliary electrode, described the second electrode be shaped as V-arrangement, the projection of the turning of described V-arrangement on vertical substrates orientation substrate drops in the figure of described opening.
Accordingly, the present invention also provides a kind of liquid crystal display device, and described liquid crystal display device comprises: color membrane substrates, liquid crystal layer and array base palte as above; Described liquid crystal layer is between described color membrane substrates and described array base palte.
Accordingly, the invention provides a kind of manufacture method of array base palte, the manufacture method of described array base palte comprises:
One underlay substrate is provided;
On described underlay substrate, form the 3rd insulation course;
On described the 3rd insulation course, form auxiliary electrode;
On described auxiliary electrode and the 3rd insulation course that do not covered by auxiliary electrode, form the second insulation course;
On described the second insulation course, form the first electrode, described the first electrode has opening;
On the opening of described the first electrode and the first electrode, form the first insulation course; And
On described the first insulation course, form a plurality of the second electrodes, described the second electrode be shaped as V-arrangement;
Wherein, the projection of the turning of described V-arrangement on vertical substrates orientation substrate drops in the figure of described opening.
In sum, in array base palte of the present invention and manufacture method thereof and liquid crystal display device, by increase by an auxiliary electrode below the first electrode, described auxiliary electrode is over against the turning of the second electrode of V-arrangement, therefore the liquid crystal molecule that described auxiliary electrode can promote to be positioned at described corner location rotates, thereby improves disclination and press uneven phenomenon.
Accompanying drawing explanation
Fig. 1 is the partial plan of the two farmlands of the employing technology array base palte of prior art;
Fig. 2 is that in the liquid crystal display device of the two farmlands of the employing of prior art technology, pixel electrode applies the schematic diagram of acting force to being positioned at the liquid crystal molecule at the turning of V-arrangement;
Fig. 3 is that in the liquid crystal display device of the two farmlands of the employing of prior art technology, pixel electrode applies the schematic diagram of acting force to the liquid crystal molecule at the turning of contiguous V-arrangement;
Fig. 4 a to Fig. 4 h is the structural representation of manufacture method of the array base palte of the embodiment of the present invention;
Fig. 5 a to Fig. 5 c is the structural representation of the auxiliary electrode of the embodiment of the present invention;
Fig. 6 is the partial plan of the array base palte of the embodiment of the present invention;
Fig. 7 is the process chart of manufacture method of the array base palte of the embodiment of the present invention;
Fig. 8 is the structural representation of the array base palte of other embodiments of the invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention being proposed to a kind of array base palte and manufacture method and liquid crystal display device thereof is described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the object of the aid illustration embodiment of the present invention lucidly.
Please refer to Fig. 4 h, the structural representation of its array base palte that is the embodiment of the present invention.As shown in Fig. 4 h, described array base palte 20 comprises: underlay substrate 21 and a plurality of pixel cell, and described a plurality of pixel cells are positioned on described underlay substrate 21, and described pixel cell comprises the first electrode 26, the first insulation course 27 and the second electrode 28 stacking gradually; Wherein, described the first electrode 26 has opening 29, the below of described the first electrode 26 is formed with an auxiliary electrode 23, described the second electrode 28 be shaped as V-arrangement, the projection of the turning of described V-arrangement in vertical substrates substrate 23 directions drops in the figure of described opening 29.
Concrete, described underlay substrate 21 is provided with a plurality of pixel cells, each pixel cell comprises the first electrode 26, the first insulation course 27 and the second electrode 28 stacking gradually, and described the second electrode 28 passes through described the first insulation course 27 mutually insulateds with described the first electrode 26.
Wherein, described the second electrode 28 be shaped as V-arrangement, or be called epaulet shape, described the second electrode 28 comprises that two interconnect and symmetrically arranged side.Visible, described the second electrode 28 be shaped as zhou duicheng tuxing, described second axis of symmetry of electrode 28 and the turning of described V-arrangement overlap.Described the first electrode 26 has opening 29, and described opening 29 is at least one via hole or a slit, and the shape of described via hole and slit is zhou duicheng tuxing.Described opening 29 runs through described the first electrode 26, in described opening 29, be filled with insulation course, the projection of the turning of described V-arrangement in vertical substrates substrate 21 directions drops in the figure of described opening 29, and the opening 29 of described the first electrode 26 faces the turning of the V-arrangement of described the second electrode 28.
Please continue to refer to Fig. 4 h, the below of described the first electrode 26 is formed with an auxiliary electrode 23, and the distance h 1 of described auxiliary electrode 23 and described the second electrode 28 is greater than the distance h 2 of described the first electrode 26 and described the second electrode 28.The projection of the figure of described opening 29 in vertical substrates substrate 21 directions drops in the figure of described auxiliary electrode 23 completely, the opening 29 that is described the first electrode 26 faces described auxiliary electrode 23, and the width of described opening 29 is less than the width of described auxiliary electrode 23.
The width range of described auxiliary electrode 23 at 2.5 μ m between 7 μ m.Preferably, the width of described auxiliary electrode 23 is 3 μ m, 4 μ m, 5 μ m or 6 μ m.
The width range of described opening 29 generally at 0.5 μ m between 2 μ m.Preferably, the width of described opening 29 is 1 μ m or 1.5 μ m.
Poor for fear of the section of causing, the thickness General Requirements of described auxiliary electrode 23 is below 1000 dusts.Preferably, the thickness of described auxiliary electrode 23 is 200 dusts, 500 dusts or 800 dusts.
The shape of described auxiliary electrode 23 is different, and corresponding auxiliary electric field is difference to some extent also.Preferably, described auxiliary electrode 23 be shaped as zhou duicheng tuxing, the axis of symmetry of described auxiliary electrode 23 is parallel with the axis of symmetry of described the second electrode 28.As shown in Figure 5 a to 5 c, the shape of described auxiliary electrode 23 can be rectangle, isosceles trapezoid, polygon or other zhou duicheng tuxings.
Incorporated by reference to reference to figure 6 and Fig. 4 h, wherein, the array base palte that Fig. 4 h is Fig. 6 is along the cut-open view of AA ' line.As shown in Fig. 6 and Fig. 4 h, the turning of the V-arrangement of described the second electrode 28 and near except being subject to the electric field action of described the second electrode 28 and the first electrode 26, also be subject to the electric field action of described auxiliary electrode 23, the high voltage that described auxiliary electrode 23 is applied to 10V left and right can make the liquid crystal molecule at this place rotate fully, thus, light can see through from this, thereby eliminates disclination phenomenon.Same, for same the pressing uneven phenomenon and also can applying auxiliary electric field to the liquid crystal molecule at this place by described auxiliary electrode 23 of existing in this place, make the liquid crystal molecule at this place accelerate to rotate, thereby promptly recover normal demonstration.
Accordingly, the present invention also provides a kind of manufacture method of array base palte.Please refer to Fig. 7, and in conjunction with Fig. 4 a to Fig. 4 h, the manufacture method of described array base palte 20 comprises the following steps:
S10 a: underlay substrate 21 is provided;
S11: form the 3rd insulation course 22 on described underlay substrate 21;
S12: form auxiliary electrode 23 on described the 3rd insulation course 22;
S13: form the second insulation course 24 at described auxiliary electrode 23 with on not by the 3rd insulation course 22 of described auxiliary electrode 23 coverings;
S14: form the first electrode 26 on described the second insulation course 24, described the first electrode 26 has opening 29;
S15: form the first insulation course 27 on the opening of described the first electrode and the first electrode;
S16: on described the first insulation course 27, form a plurality of the second electrodes 28, described the second electrode 28 be shaped as V-arrangement;
Wherein, the projection of the turning of described V-arrangement in vertical substrates substrate 21 directions drops in the figure of described opening 29.
Concrete, as shown in Fig. 4 a, first, providing a underlay substrate 21, described underlay substrate 21 generally includes transparent glass substrate and is formed at the thin film transistor (TFT) on transparent glass substrate.
Then, as shown in Figure 4 b, form the 3rd insulation course 22 on described underlay substrate 21, described the 3rd insulation course 22 covers on the surface of described underlay substrate 21.The material that described the 3rd insulation course 22 adopts is generally silicon nitride, forms described the 3rd insulation course 22 and can adopt existing technique, for example chemical vapor deposition method.
Then, as shown in Fig. 4 c, on described the 3rd insulation course 22, form auxiliary electrode 23, the width range of described auxiliary electrode 23 is at 2.5 μ m between 7 μ m, and the thickness of described auxiliary electrode 23 is generally below 1000 dusts.The material that described auxiliary electrode 23 adopts is conductive material, can be metallic conduction material, and for example copper, tungsten or various alloy, can be also transparent conductive material, for example tin indium oxide (ITO).
The main process that forms auxiliary electrode 23 on described the 3rd insulation course 22 comprises: on described the 3rd insulation course 22, deposit auxiliary electrode metal level; Described auxiliary electrode metal level is carried out to etching and form auxiliary electrode 23.Preferably, described auxiliary electrode 23 be shaped as zhou duicheng tuxing, the axis of symmetry of described auxiliary electrode 23 is parallel with the axis of symmetry of described the second electrode 28.
Afterwards, as shown in Fig. 4 d, at described auxiliary electrode 23 with on not by the 3rd insulation course 22 of described auxiliary electrode 23 coverings, form the second insulation course 24.Described the second insulation course 24 fills up the space between described auxiliary electrode 23 and covers described auxiliary electrode 23.The material that described the second insulation course 24 adopts is generally silicon dioxide, forms described the second insulation course 24 and can adopt existing technique, for example chemical vapor deposition method.
After forming described the second insulation course 24, on described the second insulation course 24, form the first electrode 26.Wherein, the material that described the first electrode 26 adopts is identical with material and process that described auxiliary electrode 23 adopts with process.The method that forms the first electrode 26 on described the second insulation course 24 comprises: step 1: as shown in Fig. 4 e, on described the second insulation course 24, deposit the first conductive layer; Step 2: as shown in Fig. 4 f, the first conductive layer forms the first electrode 26 described in etching; Step 3: described the first electrode 26 is carried out to etching and form at least one via hole as the opening 29 of described the first electrode, described opening 29 runs through described the first electrode 26 and exposes described the first electrode 26 the second insulation course 24 below, described via hole be shaped as zhou duicheng tuxing, the axis of symmetry of described via hole is all on same straight line, and the projection of the figure of described via hole in vertical substrates substrate 21 directions drops in the figure of described auxiliary electrode 23 completely.
On described the second insulation course 24, form in the method for the first electrode 26, etching via hole not in step 3, but direct etching becomes a slit as the opening 29 of described the first electrode 26, described slit be shaped as zhou duicheng tuxing, the projection of the figure of described slit in vertical substrates substrate 21 directions drops in the figure of described auxiliary electrode 23 completely.
Then, on the opening 29 of described the first electrode 26 and the first electrode 26, form the first insulation course 27.The material that described the first insulation course 27 adopts is generally silicon nitride, forms described the first insulation course 27 and can adopt existing technique, for example chemical vapor deposition method.As shown in Fig. 4 g, after forming the first insulation course 27, described the first insulation course 27 fills up described opening 29 and covers described the first electrode 26.
Finally, on described the first insulation course 27, form a plurality of the second electrodes 28.Wherein, the material that described the second electrode 28 adopts is identical with material and process that described the first electrode 26 adopts with process.As shown in Fig. 6 and Fig. 4 h, described the second electrode 28 be shaped as V-arrangement, the projection of the turning of described V-arrangement in vertical substrates substrate 21 directions drops in the figure of described opening 29, between described the second electrode 28 and the first electrode 26, pass through described the first insulation course 27 mutually insulateds, described the second electrode 28 and the first electrode 26 are all positioned at the top of described auxiliary electrode 23, and the distance of described auxiliary electrode 23 and described the second electrode 28 is greater than the distance of described the first electrode 26 and described the second electrode 28.
So far, formed described array base palte 20.In the first electrode 26 of described array base palte 20, be formed with opening 29, the second electrode 28 of described array base palte 20 be shaped as V-arrangement, under the turning of described V-arrangement and opening 29, be provided with auxiliary electrode 23, the electric field that described auxiliary electrode 23 produces can act on the corner location of described V-arrangement and near liquid crystal molecule thereof by described opening 29.
In embodiments of the present invention, described auxiliary electrode 23 is between the 3rd insulation course 22 and the second insulation course 24, described the 3rd insulation course 22 and the second insulation course 24 are respectively silicon nitride layer and silicon dioxide layer, after forming the second insulation course 24, before forming the first electrode 26, can also on described the second insulation course 24, form planarization layer, the material that described planarization layer adopts is organic film.
In other embodiments of the invention, the material that described the 3rd insulation course 22 and the second insulation course 24 adopt can be organic film, described the 3rd insulation course 22 and the second insulation course 24 synthesize planarization layer, also form the 4th insulation course between described planarization layer and described underlay substrate 21.The material that described the 4th insulation course adopts is silicon nitride or silicon dioxide.
Please refer to Fig. 8, the structural representation of its array base palte that is other embodiments of the invention.As shown in Figure 8, described auxiliary electrode 23 is between described the 3rd insulation course 22 and the second insulation course 24, the material that described the 3rd insulation course 22 and the second insulation course 24 adopt is organic film, described the 3rd insulation course 22 and the second insulation course 24 synthesize planarization layer 25, described auxiliary electrode 23 is by described planarization layer 25 and described the first electrode 26 isolation, between described the 3rd insulation course 22 and described underlay substrate 21, also comprise the 4th insulation course 30 being formed on described underlay substrate 21, the material that described the 4th insulation course 30 adopts is silicon nitride, the compound substance of silicon dioxide or silicon nitride and silicon dioxide.
In other embodiments of the invention, the content in the manufacture process of described array base palte 20 and aforesaid processing step S10 to S16 is basic identical, and this is no longer going to repeat them, and particular content and corresponding parameter refer to aforesaid step S10 to S16.Difference is, the material that described the 3rd insulation course 22 and the second insulation course 24 adopt is organic film, described the 3rd insulation course 22 and the synthetic planarization layer 25 of the second insulation course 24, simultaneously, before forming the 3rd insulation course 22, on described underlay substrate 21, also formed the 4th insulation course 30, the material that described the 4th insulation course 30 adopts is the compound substance of silicon nitride, silicon dioxide or silicon nitride and silicon dioxide.
The present invention also provides a kind of liquid crystal display device, and described liquid crystal display device comprises: color membrane substrates, liquid crystal layer and array base palte as above 20; Described liquid crystal layer is between described color membrane substrates and described array base palte 20.
To sum up, in array base palte of the present invention and manufacture method thereof and liquid crystal display device, by form opening in the first electrode of described array base palte, below described the first electrode, increase by an auxiliary electrode, described auxiliary electrode is over against the turning of the second electrode of V-arrangement, the electric field that described auxiliary electrode produces can by described opening act on described V-arrangement turning and near, so described auxiliary electrode can promote to be positioned at described corner location and near liquid crystal molecule rotates, thereby improve, adopt the IPS pattern of two farmlands technology and the existing disclination of liquid crystal display device of FFS pattern and press uneven phenomenon.
Foregoing description is only the description to preferred embodiment of the present invention, the not any restriction to the scope of the invention, and any change, modification that the those of ordinary skill in field of the present invention is done according to above-mentioned disclosure, all belong to the protection domain of claims.

Claims (12)

1. an array base palte, is characterized in that, comprising: underlay substrate and a plurality of pixel cell, and described a plurality of pixel cells are positioned on described underlay substrate, and described pixel cell comprises the first electrode, the first insulation course and the second electrode stacking gradually;
Wherein, described the first electrode has opening, and the below of described the first electrode is formed with an auxiliary electrode, described the second electrode be shaped as V-arrangement, the projection of the turning of described V-arrangement on vertical substrates orientation substrate drops in the figure of described opening.
2. array base palte as claimed in claim 1, is characterized in that, the distance of described auxiliary electrode and described the second electrode is greater than the distance of described the first electrode and described the second electrode.
3. array base palte as claimed in claim 1, is characterized in that, the projection of the figure of described opening on vertical substrates orientation substrate drops in the figure of described auxiliary electrode completely.
4. array base palte as claimed in claim 1, is characterized in that, described opening is at least one via hole, described via hole be shaped as zhou duicheng tuxing.
5. array base palte as claimed in claim 1, is characterized in that, described opening is a slit, described slit be shaped as zhou duicheng tuxing.
6. array base palte as claimed in claim 1, is characterized in that, described auxiliary electrode be shaped as zhou duicheng tuxing, the thickness of described auxiliary electrode is less than or equal to 1000 dusts, the width range of described auxiliary electrode at 2.5 μ m between 7 μ m.
7. a liquid crystal display device, is characterized in that, comprising: color membrane substrates, liquid crystal layer and the array base palte as described in any one in claim 1 to 6; Described liquid crystal layer is between described color membrane substrates and described array base palte.
8. a manufacture method for array base palte, is characterized in that, comprising:
One underlay substrate is provided;
On described underlay substrate, form the 3rd insulation course;
On described the 3rd insulation course, form auxiliary electrode;
On described auxiliary electrode and the 3rd insulation course that do not covered by auxiliary electrode, form the second insulation course;
On described the second insulation course, form the first electrode, described the first electrode has opening;
On the opening of described the first electrode and the first electrode, form the first insulation course; And
On described the first insulation course, form a plurality of the second electrodes, described the second electrode be shaped as V-arrangement;
Wherein, the projection of the turning of described V-arrangement on vertical substrates orientation substrate drops in the figure of described opening.
9. the manufacture method of array base palte as claimed in claim 8, is characterized in that, the method that forms auxiliary electrode on described the 3rd insulation course comprises:
On described the 3rd insulation course, deposit auxiliary electrode metal level;
Described auxiliary electrode metal level is carried out to etching and forms auxiliary electrode, described auxiliary electrode be shaped as zhou duicheng tuxing.
10. the manufacture method of array base palte as claimed in claim 9, is characterized in that, the method that forms the first electrode on described the second insulation course comprises:
On described the second insulation course, deposit the first conductive layer;
Described in etching, the first conductive layer forms the first electrode;
Described the first electrode is carried out to etching and form at least one via hole, described at least one via hole is as the opening of described the first electrode, described via hole be shaped as zhou duicheng tuxing, the axis of symmetry of described via hole is all on same straight line, and the projection of the figure of described via hole on vertical substrates orientation substrate drops in the figure of described auxiliary electrode completely.
The manufacture method of 11. array base paltes as claimed in claim 9, is characterized in that, the method that forms the first electrode on described the second insulation course comprises:
On described the second insulation course, deposit the first conductive layer;
Described in etching, the first conductive layer forms the first electrode;
Described the first electrode is carried out to the slit that etching forms an axisymmetric shape, and described slit is as the opening of described the first electrode, and the projection of the figure of described slit on vertical substrates orientation substrate drops in the figure of described auxiliary electrode completely.
The manufacture method of 12. array base paltes as claimed in claim 8, is characterized in that, after underlay substrate is provided, before forming the 3rd insulation course, also comprises: on described underlay substrate, form the 4th insulation course.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106200154A (en) * 2016-08-31 2016-12-07 厦门天马微电子有限公司 The manufacture method of array base palte, display floater and array base palte
JP2018116229A (en) * 2017-01-20 2018-07-26 株式会社ジャパンディスプレイ Display device
CN109375814A (en) * 2018-11-09 2019-02-22 惠州市华星光电技术有限公司 Touch control method and touch control device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1637545A (en) * 2003-12-26 2005-07-13 Lg.菲利浦Lcd株式会社 In-plane switching mode liquid crystal display device
CN101740581A (en) * 2008-11-26 2010-06-16 奇美电子股份有限公司 Thin film transistor array substrate as well as application and manufacturing method thereof
JP2010271739A (en) * 1999-06-30 2010-12-02 Samsung Electronics Co Ltd Liquid crystal display device
US20120249930A1 (en) * 2011-03-29 2012-10-04 Toshiba Mobile Display Co., Ltd. Liquid crystal display device
CN102722043A (en) * 2011-03-30 2012-10-10 瀚宇彩晶股份有限公司 Vertical alignment liquid crystal display device
CN202837758U (en) * 2012-10-22 2013-03-27 京东方科技集团股份有限公司 Array base plate, display panel and display device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010271739A (en) * 1999-06-30 2010-12-02 Samsung Electronics Co Ltd Liquid crystal display device
CN1637545A (en) * 2003-12-26 2005-07-13 Lg.菲利浦Lcd株式会社 In-plane switching mode liquid crystal display device
CN101740581A (en) * 2008-11-26 2010-06-16 奇美电子股份有限公司 Thin film transistor array substrate as well as application and manufacturing method thereof
US20120249930A1 (en) * 2011-03-29 2012-10-04 Toshiba Mobile Display Co., Ltd. Liquid crystal display device
CN102722043A (en) * 2011-03-30 2012-10-10 瀚宇彩晶股份有限公司 Vertical alignment liquid crystal display device
CN202837758U (en) * 2012-10-22 2013-03-27 京东方科技集团股份有限公司 Array base plate, display panel and display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106200154A (en) * 2016-08-31 2016-12-07 厦门天马微电子有限公司 The manufacture method of array base palte, display floater and array base palte
JP2018116229A (en) * 2017-01-20 2018-07-26 株式会社ジャパンディスプレイ Display device
CN109375814A (en) * 2018-11-09 2019-02-22 惠州市华星光电技术有限公司 Touch control method and touch control device
CN109375814B (en) * 2018-11-09 2022-03-08 惠州市华星光电技术有限公司 Touch method and touch device

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