CN103957019A - Gain control device and method of digital receiver - Google Patents
Gain control device and method of digital receiver Download PDFInfo
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Abstract
The invention discloses a gain control device of a digital receiver. The gain control device comprises an analog-to-digital converter (110) used for receiving baseband signals, an external AGC (120) connected with the output end of the analog-to-digital converter (110) and an internal AGC (130) connected with one output end of the external AGC (120). The external AGC (120) further outputs medium-frequency VGA control signals to the outside and the signal output end of the internal AGC (130) is connected with a demodulator. The invention further discloses a gain control method of the digital receiver. The two-level adjustment method with an internal automatic gain controller and an external automatic gain controller used is adopted in the gain control method. The gain control device and method of the digital receiver can effectively resist the influences of direct currents and adjacent-channel signals.
Description
Technical field
The invention belongs to the signal processing of digital receiver in wireless communication system, be specifically related to a kind of gain control and method of digital receiver.
Background technology
Wireless frequency spectrum resource is limited, and the nearby frequency bands being positioned at outside guard band generally can be by other carrier occupancy.Under normal circumstances, adjacent frequency signal should be eliminated in analog-to-digital conversion (ADC) before substantially by analog filter.Patent CN101132183A is putting exactly before this, and a kind of method of avoiding the automatic gain control (AGC) that gain amplifier is saturated is provided.Be to put before this equally, patent CN1774080A utilizes the method for inside and outside AGC to expand effective input range of receiver.
But can not utilize analog filter to eliminate in the scene of adjacent frequency signal at some, such as multiple signals time, receive, or useful signal is narrow band signal and cannot reduce analog filter bandwidth time, adjacent frequency signal will follow useful signal to enter digital receiver, and the method for patent CN1774080A is no longer applicable.
Only use outside AGC to control intermediate frequency variable gain amplifier (VGA), obviously cannot tackle the impact of adjacent frequency signal.If this is because AGC is placed on after ADC, after the variation of adjacent frequency signal power can cause filtering to be selected, the power of useful signal constantly changes, and reduces the performance of demodulator.If after AGC is placed on to filtering and selects, although now the power of useful signal can keep constant, adjacent frequency signal very easily causes ADC to be conditioned entering saturation condition.
Summary of the invention
The present invention is directed to and cannot, by the situation of analog filter filtering adjacent frequency signal, propose a kind of gain control and method of the digital receiver that can eliminate direct current and adjacent frequency effect of signals, the power of useful signal is finally adjusted to demodulator standard value.
To achieve these goals, the present invention takes following technical scheme:
A gain control for digital receiver, it comprises the analog to digital converter, outside AGC, the inner AGC that connect in turn, and the signal input part of analog to digital converter receives analog baseband signal, and the signal output part of inner AGC is connected with demodulator.
Wherein:
Described outside AGC comprise in turn connect go DC Module and intermediate frequency VGA control module;
Described inner AGC comprises the signal selection module and the digital AGC module that connect in turn;
Go the signal output part of DC Module and the signal input part of signal selection module to be connected; Intermediate frequency VGA control module is outwards exported intermediate frequency VGA control signal.
More specifically, described in, go DC Module comprise direct current computing unit, the IIR unit connecting successively and go to direct current unit:
Described direct current computing unit: calculate input signal mean value for segmentation;
Described IIR unit: for carrying out infinite impulse response filter or directly output;
The described direct current unit that goes: for the output valve of IIR unit is deducted from input signal;
More specifically, described intermediate frequency VGA control module comprise with above-mentioned go to error detection unit, the loop filtering unit being connected with error detection unit that direct current unit is connected and be connected to error detection unit and aforementioned IIR unit between burst detected unit:
Described error detection unit: for detection of gain error;
Described loop filtering unit: for the above-mentioned gain error value of integration, output intermediate frequency VGA control signal;
Described burst detected unit: for gain error value is judged, generation burst arrival mark is gone to control IIR unit and whether carried out infinite impulse response filter.
More specifically, described signal selection module comprises interference cancellation unit, the matched filtering unit that is connected with interference cancellation unit and the useful signal to interference cancellation unit output carry out frequency deviation estimation and estimated value is fed back to the frequency acquisition unit of interference cancellation unit:
Described interference cancellation unit: for the adjacent frequency signal of the outside AGC output signal of filtering, and according to the result of useful signal frequency location and Frequency Synchronization unit, by useful signal frequency spectrum shift to base band;
Described matched filtering unit: for the useful signal of above-mentioned interference cancellation unit output is carried out to matched filtering;
Described frequency acquisition unit: for the useful signal of above-mentioned interference cancellation unit output is carried out to frequency deviation estimation;
More specifically, described digital AGC module comprises AGC error detection unit, the loop filtering unit that is connected with AGC error detection unit, receives the ratio amplifying unit of loop filtering unit feedback:
Described AGC error detection unit: for detection of gain error;
Described loop filtering unit: for the above-mentioned gain error value of integration, output digital AGC gain correction value;
Described ratio amplifying unit: for the useful signal of above-mentioned gain correction value and the output of above-mentioned matched filtering unit is multiplied each other, revise useful signal gain.
The present invention also comprises a kind of gain control method of digital receiver, and it has adopted the two-stage method of adjustment of inside and outside AGC, the steps include:
Step 1: analog baseband signal is converted to the digital baseband signal that comprises direct current and adjacent frequency composition by analog to digital converter;
Step 2: digital baseband signal is inputted to outside AGC and remove direct current composition and produce intermediate frequency VGA control signal;
Step 3: the signal of removing direct current composition is inputted to inner AGC filtering adjacent frequency signal, correct useful signal frequency deviation and adjust useful signal gain.
More specifically, the concrete steps of removing direct current composition in step 2 and producing intermediate frequency VGA control signal are:
Step 201: the mean value of input digital baseband signal is calculated in segmentation;
Step 202: the D. C. value calculating in step 201 is carried out to infinite impulse response filter or directly output;
Step 203: digital baseband signal deducts the output valve in step 202;
Step 204: to step 203 output signal calculated gains, and output gain improper value;
Step 205: gain error value is judged, generate burst and arrive and identify and feed back to step 202;
Step 206: gain error value is carried out to integration, output intermediate frequency VGA control signal.
The concrete steps of more specifically, correcting useful signal frequency deviation in step 3 and adjusting useful signal gain are:
Step 301: the signal of removing direct current in input step 2, filtering adjacent frequency signal wherein, and according to the result of useful signal frequency location and Frequency Synchronization unit, by useful signal frequency spectrum shift to base band;
Step 302: the useful signal that step 301 is exported carries out frequency deviation estimation, and estimated value is fed back to step 301;
Step 303: the useful signal that step 301 is exported carries out matched filtering;
Step 304: the gain correction value that the signal that step 303 is exported and step 306 are fed back multiplies each other, the useful signal of output gain correction;
Step 305: the calculated signals gain that step 304 is exported, and output gain improper value;
Step 306: gain error value is carried out to integration, and output gain correction value feeds back to step 304.
Beneficial effect: gain control and the method for the digital receiver that the present invention proposes, the impact that can effectively resist direct current and adjacent frequency signal.First, the two-stage method of adjustment of inside and outside AGC can ensure in gain control process, even if there is high-power adjacent frequency signal, ADC also can finally not be conditioned and enter saturation condition, although now entered the power reduction of the useful signal of ADC, finally still can be adjusted to demodulator standard value.Secondly, outside AGC utilizes burst to arrive mark, and the D. C. value that segmentation is calculated whether control by smothing filtering, the adjusting time of gain control process while having reduced burst pattern.Again, the signal level enlarging function of inner AGC can expand effective range of receiving of faint level signal.Finally, inner AGC is set and selects different signals, single outside AGC adds the compound mode of multiple inner AGC, can receive the multiple signals of different frequency simultaneously, has reduced the hardware complexity that multiple signals receive.
Brief description of the drawings
Accompanying drawing is not construed as limiting the invention the present invention for further explaining.In the accompanying drawings:
Fig. 1 is the structured flowchart of the gain control of the digital receiver that proposes of the present invention.
Fig. 2 is the structured flowchart of the outside AGC in Fig. 1.
Fig. 3 is the structured flowchart of the inside AGC in Fig. 1.
Fig. 4 is the signal spectrum schematic diagram according to the embodiment of the present invention.
Fig. 4 A is the signal spectrum schematic diagram (when the bandwidth of analog filter is suitable with the bandwidth of useful signal) of the input of analog to digital converter.
Fig. 4 B is signal spectrum schematic diagram when larger the bandwidth of the analog filter () of the input of analog to digital converter.
Fig. 4 C is the signal spectrum schematic diagram of the output of signal selection module.
Fig. 4 D is the signal spectrum schematic diagram of the output of digital AGC module.
Description of symbols in figure:
The gain control of 100-digital receiver;
110-analog to digital converter; The outside AGC of 120-; The inner AGC of 130-;
141-removes DC Module; 142-intermediate frequency VGA control module;
121-direct current computing unit; 122-IIR unit; 123-goes to direct current unit; 124-AGC error detection unit;
125-loop filtering unit; 126-burst arrives detecting unit;
151-signal selection module; 152-digital AGC module;
131-interference cancellation unit; 132-frequency acquisition unit; 133-matched filtering unit; 134-AGC error detection unit; 135-loop filtering unit; 136-ratio amplifying unit;
201-useful signal; 202-adjacent frequency signal.
Embodiment
Below in conjunction with embodiment, the invention will be further described, but protection scope of the present invention is not limited to this:
The present invention has adopted the two-stage method of adjustment of outside AGC120 and inner AGC130, the impact of gain being controlled in order to resist direct current and adjacent frequency signal.As shown in Figure 1, the gain control 100 of digital receiver of the present invention comprises following part: the analog to digital converter 110 that analog signal is converted to digital signal; Input the above-mentioned digital baseband signal that comprises direct current and adjacent frequency composition after analog-to-digital conversion, carry out DC processing and produce the outside AGC120 of intermediate frequency VGA controlling value; Input the above-mentioned signal of having removed direct current, carry out filtering adjacent frequency signal, correct useful signal frequency deviation and adjust the inside AGC130 that useful signal gains.
The effect of outside AGC120 is by controlling intermediate frequency VGA, the amplitude of the analog signal of analog to digital converter 110 inputs being adjusted to the position that approaches maximum dynamic range.Outside AGC120, immediately following after analog to digital converter 110, controls intermediate frequency VGA according to whole power of analog to digital converter 110 output signals, between analog to digital converter 110 and outside AGC120, can not do filtering processing to adjacent frequency signal; Otherwise only control intermediate frequency VGA according to the power of useful signal, analog to digital converter 110 very easily enters saturation condition.Consider that again direct current signal is disadvantageous to outside AGC120, or even fatal, therefore comprised DC processing in outside AGC120.
After inner AGC130 is positioned at outside AGC120, its effect is that the power of useful signal is adjusted to demodulator standard value.Consider in outside AGC120 signal after treatment and may have the interference such as adjacent frequency signal, therefore comprised the processing such as filtering selection and ratio amplification to useful signal in inner AGC130.
As shown in Figure 2, outside AGC120 comprises following part: the digital baseband signal of input after analog-to-digital conversion, and that carries out DC processing removes DC Module 141; Detect the above-mentioned power that removes signal after direct current, produce the intermediate frequency VGA control module 142 of intermediate frequency VGA controlling value.
The above-mentioned DC Module 141 that goes comprises following part: the direct current computing unit 121 of input signal mean value is calculated in segmentation; The IIR unit 122 that above-mentioned D. C. value is carried out infinite impulse response filter (IIR) or directly exported; What the output valve of IIR unit 122 was deducted from input signal goes to direct current unit 123.
Above-mentioned intermediate frequency VGA control module 142 comprises following part: the AGC error detection unit 124 that detects gain error; The above-mentioned gain error value of integration, the loop filtering unit 125 of output intermediate frequency VGA controlling value; And the burst that above-mentioned gain error value is judged arrives detecting unit 126.
If consider in the analog input of analog to digital converter 110 and occur burst, outside AGC120 has little time response, will inevitably cause the unexpected increase of analog to digital converter 110 output signal powers, outside AGC120 obviously can arrive using the unexpected variation of this signal power as burst mark.No matter this burst is useful signal or adjacent frequency signal, all likely causes the sudden change of direct current signal size.Whether outside AGC method of the present invention, utilizes the burst that intermediate frequency VGA control module 142 produces to arrive mark, to removing the D. C. value that in DC Module 141,121 segmentations of direct current computing unit are calculated, control through the smothing filtering of IIR unit 122.
As shown in Figure 3, inner AGC130 comprises following part: input the above-mentioned signal of having removed direct current, carry out filtering adjacent frequency signal and correct the signal selection module 151 of useful signal frequency deviation; Input the useful signal of above-mentioned correcting frequency offset, adjust the digital AGC module 152 of useful signal gain.
Above-mentioned signal selection module 151 comprises following part: input the above-mentioned signal of having removed direct current, carry out filtering adjacent frequency signal wherein, and according to the result of useful signal frequency location and Frequency Synchronization unit, the interference cancellation unit 131 by useful signal frequency spectrum shift to base band; The frequency acquisition unit 132 that the useful signal of above-mentioned interference cancellation unit output is carried out to frequency deviation estimation; The matched filtering unit 133 that the useful signal of above-mentioned interference cancellation unit output is carried out to filtering.
Above-mentioned digital AGC module 152 comprises following part: the AGC error detection unit 134 that detects gain error; The above-mentioned gain error value of integration, the loop filtering unit 135 of output digital AGC gain correction value; The useful signal of above-mentioned gain correction value and above-mentioned matched filtering output is multiplied each other, revise the ratio amplifying unit 136 of useful signal gain.
Inner AGC method of the present invention, by Digital Signal Processing (DSP), after basic filtering out of band signal, only detects the power of useful signal, and the power of useful signal is finally adjusted to demodulator standard value.
Fig. 4 is the signal spectrum schematic diagram according to the embodiment of the present invention.
If the bandwidth of the bandwidth of analog filter and useful signal 201 is suitable, as shown in Figure 4 A, the spectrum diagram of the input of analog to digital converter 110.Adjacent frequency signal 202 can be by basic filtering, only has useful signal 201 to enter the input of analog to digital converter 110.By the adjusting of outside AGC120, the amplitude of useful signal will approach analog to digital converter 110 maximum dynamic ranges, the corresponding demodulator standard value of its power.
If the bandwidth of analog filter is larger, as shown in Figure 4 B, the spectrum diagram of the input of analog to digital converter 110, adjacent frequency signal 202 will follow useful signal 201 to enter the input of analog to digital converter 110.By the adjusting of outside AGC120, the amplitude of the two composite signal will approach analog to digital converter 110 maximum dynamic ranges.Due to the existence of adjacent frequency signal 202, now the power of useful signal 201 is less than power corresponding to demodulator standard value.It should be noted that, the frequency spectrum of direct current signal does not draw in Fig. 4.
Obviously,, if useful signal is faint level signal, even the gain maximum of intermediate frequency VGA, the power that enters the useful signal of analog to digital converter 110 also may be less than normal, do not reach power corresponding to demodulator standard value.
After DC processing in outside AGC120 completes, signal spectrum is similar to Fig. 4 A, 4B, does not separately draw.
The spectrum diagram of the output of signal selection module 151 as shown in Figure 4 C, signal selection module 151 completes filtering adjacent frequency signal, after the processing of frequency spectrum shift and matched filtering, the power of the useful signal 201 of the output of signal selection module 151 is generally less than demodulator standard value.
The spectrum diagram of the output of digital AGC module 152 as shown in Figure 4 D, the useful signal that signal selection module 151 is exported amplifies after processing through the ratio of digital AGC module 152 again, and the power of the useful signal 201 of the output of digital AGC module 152 is just finally adjusted to demodulator standard value.
Claims (6)
1. the gain control of a digital receiver, it is characterized in that it comprises the analog to digital converter (110), outside AGC (120), the inner AGC (130) that connect in turn, the signal input part of analog to digital converter (110) receives analog baseband signal, and the signal output part of inner AGC (130) is connected with demodulator;
Wherein:
Described outside AGC (120) comprise in turn connect go DC Module (141) and intermediate frequency VGA control module (142);
Described inner AGC (130) comprises the signal selection module (151) and the digital AGC module (152) that connect in turn;
Go the signal output part of DC Module (141) to be connected with the signal input part of signal selection module (151); Intermediate frequency VGA control module (142) is outwards exported intermediate frequency VGA control signal.
2. the gain control of a kind of digital receiver according to claim 1, is characterized in that:
The described DC Module (141) that goes comprises direct current computing unit (121), IIR unit (122) that connect successively and goes to direct current unit (123):
Described direct current computing unit (121): calculate input signal mean value for segmentation;
Described IIR unit (122): for carrying out infinite impulse response filter or directly output;
The described direct current unit (123) that goes: for the output valve of IIR unit is deducted from input signal;
Described intermediate frequency VGA control module (142) comprise with above-mentioned go to error detection unit (124), the loop filtering unit (125) being connected with error detection unit (124) that direct current unit (123) is connected and be connected to error detection unit (124) and aforementioned IIR unit (122) between burst detected unit (126):
Described error detection unit (124): for detection of gain error;
Described loop filtering unit (125): for the above-mentioned gain error value of integration, output intermediate frequency VGA control signal;
Described burst detected unit (126): for above-mentioned gain error value is judged, generation burst arrival mark is gone to control IIR unit (122) and whether carried out infinite impulse response filter.
3. the gain control of a kind of digital receiver according to claim 1, is characterized in that:
The matched filtering unit (133) that described signal selection module (151) comprises interference cancellation unit (131), be connected with interference cancellation unit (131) and the useful signal of interference cancellation unit (131) output is carried out frequency deviation estimation and estimated value fed back to the frequency acquisition unit (132) of interference cancellation unit (131):
Described interference cancellation unit: for the adjacent frequency signal of the outside AGC output signal of filtering, and according to the result of useful signal frequency location and Frequency Synchronization unit, by useful signal frequency spectrum shift to base band;
Described matched filtering unit: for the useful signal of above-mentioned interference cancellation unit output is carried out to matched filtering;
Described frequency acquisition unit: for the useful signal of above-mentioned interference cancellation unit output is carried out to frequency deviation estimation;
Loop filtering unit (135) that described digital AGC module (152) comprises AGC error detection unit (134), be connected with AGC error detection unit (134), receive the ratio amplifying unit (136) of loop filtering unit (135) feedback:
Described AGC error detection unit: for detection of gain error;
Described loop filtering unit: for the above-mentioned gain error value of integration, output digital AGC gain correction value;
Described ratio amplifying unit: for the useful signal of above-mentioned gain correction value and the output of above-mentioned matched filtering unit is multiplied each other, revise useful signal gain.
4. a gain control method for digital receiver, is characterized in that adopting the two-stage method of adjustment of inside and outside automatic gain controller, the steps include:
Step 1: analog baseband signal is converted to the digital baseband signal that comprises direct current and adjacent frequency composition by analog to digital converter (110);
Step 2: digital baseband signal is inputted to outside AGC (120) and remove direct current composition and produce intermediate frequency VGA control signal;
Step 3: the signal of removing direct current composition is inputted to inner AGC (130) filtering adjacent frequency signal, correct useful signal frequency deviation and adjust useful signal gain.
5. the gain control method of a kind of digital receiver according to claim 4, is characterized in that the concrete steps of removing direct current composition in step 2 and producing intermediate frequency VGA control signal are:
Step 201: the mean value of input digital baseband signal is calculated in segmentation;
Step 202: the D. C. value calculating in step 201 is carried out to infinite impulse response filter or directly output;
Step 203: digital baseband signal deducts the output valve in step 202;
Step 204: the calculated signals gain that step 203 is exported, and output gain improper value;
Step 205: gain error value is judged, generate burst and arrive and identify and feed back to step 202;
Step 206: gain error value is carried out to integration, output intermediate frequency VGA control signal.
6. the gain control method of a kind of digital receiver according to claim 4, the concrete steps that it is characterized in that correcting useful signal frequency deviation in step 3 and adjust useful signal gain are:
Step 301: the signal of removing direct current in input step 2, filtering adjacent frequency signal wherein, and according to the result of useful signal frequency location and Frequency Synchronization unit, by useful signal frequency spectrum shift to base band;
Step 302: the useful signal that step 301 is exported carries out frequency deviation estimation, and estimated value is fed back to step 301;
Step 303: the useful signal that step 301 is exported carries out matched filtering;
Step 304: the gain correction value that the signal that step 303 is exported and step 306 are fed back multiplies each other, the useful signal of output gain correction;
Step 305: the calculated signals gain that step 304 is exported, and output gain improper value;
Step 306: gain error value is carried out to integration, and output gain correction value feeds back to step 304.
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| CN201410163514.9A CN103957019B (en) | 2014-04-22 | 2014-04-22 | The gain control of digital receiver and method |
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Cited By (5)
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| CN104244384A (en) * | 2014-08-25 | 2014-12-24 | 饶品魁 | Transmitting power regulation method and device |
| CN104754721A (en) * | 2015-03-31 | 2015-07-01 | 成都国恒空间技术工程有限公司 | Automatic gain control method and automatic gain control device in time division multiplexing mode |
| CN105007245A (en) * | 2015-07-28 | 2015-10-28 | 上海翎沃电子科技有限公司 | Method for changing emission spectrum shape of transmission system |
| CN107919881A (en) * | 2017-12-27 | 2018-04-17 | 中国人民解放军陆军工程大学 | A kind of automatic growth control receiver |
| CN114142881A (en) * | 2022-02-07 | 2022-03-04 | 上海擎昆信息科技有限公司 | Method and system for removing direct current |
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| CN101378263A (en) * | 2007-08-31 | 2009-03-04 | 京信通信系统（中国）有限公司 | Multi-carrier digital receiver based on digital intermediate frequency and multi-carrier digital receive method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104244384A (en) * | 2014-08-25 | 2014-12-24 | 饶品魁 | Transmitting power regulation method and device |
| CN104754721A (en) * | 2015-03-31 | 2015-07-01 | 成都国恒空间技术工程有限公司 | Automatic gain control method and automatic gain control device in time division multiplexing mode |
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| CN107919881A (en) * | 2017-12-27 | 2018-04-17 | 中国人民解放军陆军工程大学 | A kind of automatic growth control receiver |
| CN107919881B (en) * | 2017-12-27 | 2019-03-01 | 中国人民解放军陆军工程大学 | A kind of automatic growth control receiver |
| CN114142881A (en) * | 2022-02-07 | 2022-03-04 | 上海擎昆信息科技有限公司 | Method and system for removing direct current |
| CN114142881B (en) * | 2022-02-07 | 2022-06-21 | 上海擎昆信息科技有限公司 | Method and system for removing direct current |
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| CN103957019B (en) | 2016-08-24 |
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