CN103873409A - Modulator generating pi/4-DQPSK modulation signals, signal generator and method - Google Patents
Modulator generating pi/4-DQPSK modulation signals, signal generator and method Download PDFInfo
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- CN103873409A CN103873409A CN201210537368.2A CN201210537368A CN103873409A CN 103873409 A CN103873409 A CN 103873409A CN 201210537368 A CN201210537368 A CN 201210537368A CN 103873409 A CN103873409 A CN 103873409A
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Abstract
The invention provides a modulator generating pi/4-DQPSK modulation signals, a signal generator and a method. After sending baseband signals to a modulation module by a controller, the modulation module generates directly deltaP, calculation is further carried out to obtain Pk, high three positions of the M-position carrier phase code are directly controller, digital pi/4-DQPSK modulation signals are directly generated by adopting the DDS technology, modulation signals of the final form are generated via digital to analog conversion, and a method of generating digital pi/4-DQPSK modulation signals is creatively invented. The method does not need to adopt a multiplier, and compared with the existing method of generating analog pi/4-DQPSK modulation signals, the structure is simple, the hardware resources are few, and system resources are saved.
Description
Technical field
The present invention relates to digital processing field, particularly a kind of modulator, signal generator and method that produces PI/4-DQPSK modulation signal.
Background technology
In wireless channel situation, directly transmission of digital baseband signal, need to be by continuous wave modulation technology frequency translation, digital baseband signal is transformed into the digital band signal that is applicable to transmission, transmits by carrier modulation mode.Modulation matches characteristics of signals and the characteristic of channel, thus more effectively more reliable transmission information.PI/4-DQPSK (π/4shift Differential Quadrature Phase Shift Keying, four phase RPSK relative phase shift keyings are shifted in π/4) is the correction form of QPSK, is a kind of linear narrow-band digital modulation technique.You (Baker) first propose PI/4-DQPSK Bake by Bell Laboratory in 1962, this improved modulation system by carrier phase Transform Limited in ± π/4, ± 3 π/4.Because the phase place of do not exist in carrier wave ± π changes, thereby greatly reduce envelope fluctuation, reduced systematic function to the nonlinear susceptibility of signal.
PI/4-DQPSK modulation and demodulation algorithm can be realized with software or hardware.In hardware is realized, using application-specific integrated circuit (ASIC) (ASIC) and programmable logic device (FPGA and CPLD) is two kinds of conventional modes.The two-dimentional logic array module formula of FPGA is based on look-up table (LUT, Look-Up-Table) structure, the LUT wherein comprising and the quantity of trigger are very many, if design a complicated sequential logic, using so FPGA to be exactly one well selects, in the control of the processing to baseband signal and whole system, the not only volume of reduction circuit greatly of FPGA, improve the stability of circuit, and advanced developing instrument shortens the design debug cycle of whole system greatly, thereby, in prior art, conventionally adopt fpga chip as the primary processor of realizing PI/4-DQPSK modulation /demodulation.
Fig. 1 has provided the planisphere that represents PI/4-DQPSK modulating signal phase state transitions.As Fig. 1, wherein there are 8 phase places, be respectively 4 phase places (stain) that indicate "●" symbol, and 4 phase places (white point) that indicate "○" symbol, the phase hit that the line between two phase places expresses possibility.The phase shift of PI/4-DQPSK is followed the order of stain, the transfer of white point phase alternation, during as for phase shift, will choose which phase place, see source phase place and object phase place, makes in a word its phase path change minimum.For example in fact, if arrive stain phase place (1,0) from 180 ° of stain phase place (1,0) phase shifts, can first arrive white point phase place from 135 ° of stain phase place (1,0) phase shifts
again from
45 ° of phase shifts are to stain phase place (1,0).So the maximum phase saltus step that PI/4-DQPSK may occur is ± 135 °, the saltus step of there will not be ± π, therefore PI/4-DQPSK have that spectral characteristic is good, the availability of frequency spectrum is high, anti-Doppler frequency displacement, can irrelevant demodulation etc. outstanding advantages.
As shown in Figure 2, in prior art, produce the process of PI/4-DQPSK modulation signal as follows:
The serial binary baseband signal bk of input is first divided into the two-way that speed reduces by half: Xk and Yk by serial/parallel change-over circuit, and according to the planisphere shown in Fig. 1, Xk and Yk are mapped as I by differential phase coding module
kand Q
k; Two filtration module filtering I
kand Q
kin high fdrequency component, export respectively I ' k and Q ' k, so as to be applicable to transmission; Filtered two paths of signals multiplies each other with two-way quadrature carrier cos ω ct, the sin ω ct of digital controlled oscillator (NCO) output respectively, completes frequency spectrum shift; By adder, two-way product is added again, has just produced the PI/4-DQPSK modulation signal { Sk} of discrete form.
This class modulator has following deficiency:
In circuit, need two multipliers, multiplier can take the multiplier resources in FPGA, and it is also relatively high to have the FPGA price of multiplier; Multiplier system power consumption is large, affects the timing performance of FPGA, the raising of restriction carrier frequency;
Need two filters, filter also can consume a large amount of FPGA resources;
If adopt Direct Digital frequency synthesis technique (DDS), the capital that programmed logical module, internal storage are used is a lot.
Thereby, need especially a kind of relatively simple in structure, modulator approach that cost is low, low in energy consumption and corresponding modulator and signal generator.
Summary of the invention
Main purpose of the present invention is to solve problems of the prior art, a kind of modulator, signal generator and method that produces PI/4-DQPSK modulation signal is provided, by controlling the phase place in DDS building-up process, thereby reach the object of signal modulation, make modulated process no longer need multiplier, no longer need complicated structure, reduced cost, reduce power consumption, saved hardware cost and resource.
The object of the invention is to be achieved by following technical proposals:
The invention provides a kind of method that produces PI/4-DQPSK modulation signal, comprising:
Baseband signal is carried out to serial/parallel conversion, obtain parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
According to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Calculate the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Generate carrier phase code;
By described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Read address according to described modulation signal and read corresponding carriers shape information, thereby generate PI/4-DQPSK modulation signal.
By the embodiment of the present invention, can be according to the I after the serial/parallel conversion of baseband signal
k, Q
kcode, directly generates phase modulation word increment Delta P, and then generates PI/4-DQPSK modulation signal, and whole generative process needn't complete by multiplier, has saved hardware resource, has simplified the production process of modulation signal, has reduced cost, has saved resource.
Another embodiment of the present invention provides a kind of modulator that produces PI/4-DQPSK modulation signal, comprising:
Serial/parallel modular converter, for baseband signal is carried out to serial/parallel conversion, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
Phase code module, for according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Phase modulation word computing module, for calculating the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Carrier phase code generation module, for generating carrier phase code;
Modulation adder, for by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Carrier waveform memory, for storing carrier waveform information; This carrier waveform memory is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal.
By the embodiment of the present invention, by phase code module, the I directly baseband signal being generated
kand Q
kbe encoded to Δ P, and by modulation adder, by P
kdirectly be added in carrier phase code, thereby generate PI/4-DQPSK modulation signal, whole generative process needn't complete by multiplier, has saved hardware resource, has simplified the production process of modulation signal, has reduced cost, has saved resource.
Another embodiment of the present invention provides a kind of method that produces PI/4-DQPSK modulation signal, it is characterized in that, comprising:
CPU reads original carrier wave table and the file to be modulated in nonvolatile storage and obtains modulation parameter by Man Machine Interface, and this original carrier wave table, file to be modulated and modulation parameter are sent to control unit; Wherein, described modulation parameter comprises: carrier frequency control word and base band frequency control word;
This original carrier wave table is write the carrier waveform memory in modulating wave module by described control unit;
This file to be modulated is write the modulation file memory in this control unit by described control unit;
Described carrier frequency control word is sent to described modulation module by described control unit;
Described control unit reads the file to be modulated in described modulation file memory according to described base band frequency control word, and converts this file to be modulated to baseband signal, is sent to described modulation module;
This baseband signal is carried out serial/parallel conversion by described modulation module, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
Described modulation module is according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Described modulation module calculates the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Described modulation module adds up described carrier frequency control word to generate carrier phase code;
Described modulation module is by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Described modulation module is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal;
Digital to analog converter converts described PI/4-DQPSK modulation signal to PI/4-DQPSK modulated-analog signal output.
Pass through the embodiment of the present invention, after baseband signal is sent to modulation module by controller, modulation module generates Δ P and then direct control phase word, generating digital PI/4-DQPSK modulation signal, generate again the modulation signal of final form through digital-to-analogue conversion, creationaryly invent a kind of method that produces digitlization PI/4-DQPSK modulation signal, the method needn't adopt multiplier, the method of the PI/4-DQPSK modulation signal more simulated than existing generation is simple in structure, hardware resource is few, and has saved system resource.
Another embodiment of the present invention provides a kind of signal generator that produces PI/4-DQPSK modulation signal, it is characterized in that, comprising:
Nonvolatile storage, for storing initial carrier wave wave table and file to be modulated;
Man Machine Interface, for obtaining modulation parameter;
CPU, for reading original carrier wave table and the file to be modulated of nonvolatile storage; Obtain modulation parameter by Man Machine Interface; This original carrier wave table, file to be modulated and modulation parameter are sent to control unit; Wherein, described modulation parameter comprises: carrier frequency control word and base band frequency control word;
Control unit; This control unit is for writing the carrier waveform memory in modulating wave module by this original carrier wave table; Described carrier frequency control word is sent to described modulation module; File to be modulated described in reading according to described base band frequency control word, and convert this file to be modulated to baseband signal, be sent to described modulation module; Also comprise modulation file memory, for file to be modulated described in storing;
Modulation module, comprising: serial/parallel modular converter, phase code module, phase modulation word computing module, carrier phase code generation module, modulation adder and carrier waveform memory;
Described serial/parallel modular converter, for baseband signal is carried out to serial/parallel conversion, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
Described phase code module, for according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Described phase modulation word computing module, for calculating the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Described carrier phase code generation module, for generating carrier phase code;
Described modulation adder, for by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Described carrier waveform memory, for storing carrier waveform information; This carrier waveform memory is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal.
Digital to analog converter, for converting described PI/4-DQPSK modulation signal to PI/4-DQPSK modulated-analog signal output.
Pass through the embodiment of the present invention, after baseband signal is sent to modulation module by controller, modulation module generates Δ P and then direct control phase code, generating digital PI/4-DQPSK modulation signal, generate again the modulation signal of final form through digital-to-analogue conversion, creationaryly invent a kind of method that produces digitlization PI/4-DQPSK modulation signal, the method needn't adopt multiplier, the method of the PI/4-DQPSK modulation signal more simulated than existing generation is simple in structure, hardware resource is few, and has saved system resource.
Accompanying drawing explanation
Accompanying drawing described herein is used to provide a further understanding of the present invention, forms the application's a part, does not form limitation of the invention.In the accompanying drawings:
Fig. 1 is the planisphere of PI/4-DQPSK modulating signal phase state transitions;
Fig. 2 is the flow chart that produces the method for PI/4-DQPSK modulation signal;
Fig. 3 is a kind of flow chart of the method that produces PI/4-DQPSK modulation signal;
Fig. 4 is a kind of structure chart of the modulator that produces PI/4-DQPSK modulation signal;
Fig. 5 is the workflow diagram of phase modulation word computing module;
Fig. 6 is the workflow diagram of carrier phase code generation module;
Fig. 7 is a kind of flow chart of the method that produces PI/4-DQPSK modulation signal;
Fig. 8 is a kind of structure chart of the signal generator that produces PI/4-DQPSK modulation signal.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with execution mode and accompanying drawing, the present invention is described in further details.At this, exemplary embodiment of the present invention and explanation thereof are used for explaining the present invention, but not as a limitation of the invention.
Embodiment mono-:
As shown in Figure 3, the embodiment of the present invention one provides a kind of method that produces PI/4-DQPSK modulation signal, comprising:
Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment; Wherein, I
k, Q
kbeing respectively 1 bit width, is 2 bit widths altogether, is therefore called parallel code stream.
The embodiment of the present invention one provides the method for the digitized PI/4-DQPSK modulation signal of a kind of direct generation, by the I after the serial/parallel conversion of baseband signal
k, Q
kcode directly generates phase modulation word increment Delta P, the phase code in DDS process is controlled, and then generated PI/4-DQPSK modulation signal, generative process no longer needs multiplier, has saved hardware resource, has simplified the production process of modulation signal, reduce cost, saved resource.
Embodiment bis-:
In above-described embodiment one, the process that step 302 is calculated Δ P describes by following instantiation:
When PI/4-DQPSK modulation, the carrier transmission signal in K-1 moment is designated as S
k-1:
S
k-1=Acos (w
ct-θ
k-1); Wherein, θ
k-1for absolute carrier phase,
The carrier transmission signal S in K moment
k:
S
k=Acos (w
ct-(θ
k-1+ Δ θ)); Wherein, Δ θ is carrier phase, by S
klaunch, obtain:
S
k=I
kcos(w
ct)+Q
ksin(w
ct)；
Wherein,
I
k=I
k-1cos Δ θ-Q
k-1sin Δ θ; Formula (1)
Q
k=Q
k-1cos Δ θ-I
k-1sin Δ θ; Formula (2)
Note, θ
k=θ
k-1+ Δ θ; Adopt the dibit (I of Gray coding
kq
k) with the relation of carrier phase:
| I k | Q k | Δθ |
| 0 | 0 | 45° |
| 0 | 1 | 135° |
| 1 | 0 | -135° |
| 1 | 1 | 45° |
And known according to above-mentioned formula (1) and formula (2), I
kand Q
knot only with input data relevant, and with previous moment I
k-1and Q
k-1relevant.
If initial I
0=1, Q
0=0, θ
0=0 (k=0).In the time of k=1, possible input has 00,01,10,11 four kinds of situations, if be input as " 00 ", and Δ θ=π/4, corresponding phase place output θ
1=π/4, in like manner can be input as " 01 ", and " 10 ", output phase corresponding when " 11 " is respectively: 3 π/4,5 π/4,7 π/4}, that is, in the k=1 moment, the phase place that may export has 4 kinds of situations: { π/4,3 π/4,5 π/4,7 π/4}.When the k=2 moment,, according to the derivation in k=1 moment, can know that the possible output phase in k=2 moment is pi/2, and π, 3 pi/2s, 0}, in the time of k=3, finds that the probable value of the phase place of this moment signal output got back to again the situation in k=1 moment.
Known according to above-mentioned analysis, in each moment, phase shift is all the integral multiple of π/4, and has 8 phase places, accordingly, represents the phase modulation word of 8 phase places, i.e. P={1,2,3,4,5,6,7,0} in this programme with P;
Phase modulation word increment while representing at every turn to modulate with Δ p, by following formula:
Δ p=Δ θ/(π/4), wherein-135 ° and-45 ° are respectively according to 225 ° and 315 ° of calculating;
The corresponding relation that can obtain Δ p and Δ θ, can represent by following table:
| {I k,Q k} | Δθ | ΔP |
| {0，0} | 45° | 001 |
| {0，1} | 135° | 011 |
| {1，0} | -135° | 101 |
| {1，1} | -45° | 111 |
In conjunction with above-mentioned situation, in the k=1 moment, the phase place that may export has 4 kinds of situations: π/4,3 π/4,5 π/4,7 π/4}, the value that Δ p is corresponding be respectively 1,3,5,7}, corresponding, P
kvalue be 1,3,5,7}, P
k+1value be 2,4,6,0}.
Wherein, P
kfor the phase modulation word in k moment.
The embodiment of the present invention two, by analyzing the corresponding relation that has directly obtained Δ P and Δ θ, thereby can, by the baseband signal of input is changed and calculated, directly obtain phase modulation word increment, and then control phase word, generates modulation signal.Can directly control carrier phase by this scheme, no longer need the multiplier in conventional modulated signal production process, greatly simplify the process producing, and can directly produce digitized modulation signal.
Embodiment tri-:
In above-described embodiment one, step 305 generates modulation signal and reads the process of address and describe by following instantiation:
Directly frequency synthesis DDS is from a kind of new frequency synthesis technique of the directly synthetic required waveform of phase place concept, is based upon on sampling thheorem basis, and DDS chip mainly comprises system clock source, phase accumulator and wave memorizer, and its principle is as follows:
First waveform needs being produced is sampled, and will after sampled value digitlization, deposit memory in as look-up table, then by the reading out data of tabling look-up, being converted to analog quantity through D/A converter, the waveform of preservation is synthesized again.The reference clock source of system is a crystal oscillator with high stability normally, for each part provides synchronised clock.Phase accumulator, in the time of each pulse reference clock input, accumulates once frequency word, and it exports the phase increment of a step-length of corresponding increase.Because the output of phase accumulator is connected in the address wire of wave memorizer, therefore the change of its output is equivalent to table look-up.So just can the waveform sampling value being stored in wave memorizer be found out by tabling look-up, output to D/A converter, convert analog output to through D/A converter.
At the rising edge of each system clock, phase accumulator carries out accumulating operation to the binary radix band signal of frequency control word K, and accumulation result is N position carrier phase code.In wave memorizer, stored a complete cycle, 2M carrier amplitude information altogether.Wave memorizer directly with the high M position in the carrier phase code of N position as reading address (conventionally N much larger than M), and outgoing carrier Wave data.Above-mentioned each M position mutually code corresponding a phase point of carrier wave in wave memorizer.
In the present embodiment, P
kfor the phase modulation word in k moment, this phase modulation word is three bit codes, the Senior Three position in these three phase modulation words and M position carrier phase code is added to all the other invariant positions in this M position carrier phase code.Carrier phase code after addition is designated as reads address addr.
This carrier phase code addr is M position, and wherein Senior Three position changes, and low M-3 position does not change.
Low N-M position in the carrier phase code of above-mentioned N position and this programme are irrelevant.
This city embodiment, by having adopted DDS technology, thinks combination with the computational process of phase-modulation word, can directly generate modulation signal by digital form, no longer needs multiplier, has saved hardware resource, has improved combined coefficient.
Embodiment tetra-:
As shown in Figure 4, the present embodiment provides a kind of modulator that produces PI/4-DQPSK modulation signal, comprising: serial/parallel modular converter 401, phase code module 402, phase modulation word computing module 403, carrier phase code generation module 404, modulation adder 405 and carrier waveform memory 406;
Serial/parallel modular converter 401, for baseband signal is carried out to serial/parallel conversion, obtains parallel code stream I
k, Q
k;
Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment; Wherein, I
k, Q
kbeing respectively 1 bit width, is 2 bit widths altogether, is therefore called parallel code stream.
Phase code module 402, for according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
This phase code module is calculated and is searched and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
| {I k,Q k} | Δθ | ΔP |
| {0，0} | 45° | 001 |
| {0，1} | 135° | 011 |
| {1，0} | -135° | 101 |
| {1，1} | -45° | 111 |
Wherein, Δ θ is under PI/4-DQPSK modulation system, parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
Phase modulation word computing module 403, for calculating the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
As Fig. 5, comprising: delayer 501 and phase place adder 502;
Described delayer, for the output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder, for according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1 is the phase modulation word in k-1 moment, and Δ P is described phase modulation word increment.
Carrier phase code generation module 404, for generating carrier phase code;
As shown in Figure 6, by phase accumulator, K is added up, generate N position code mutually, but finally only export high M position code mutually.Phase accumulator, in the time of each pulse reference clock input (rising edge clock), accumulates once frequency word, and it exports the phase increment of a step-length of corresponding increase.
The output of phase accumulator is connected in the address wire of wave memorizer by modulation adder.
Modulation adder is by described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address addr.
After this scheme sends to modulation module by controller by baseband signal, modulation module directly generates Δ P and then calculates P
kdirectly control the high 3 of M position carrier phase code, adopt the direct generating digital PI/4-DQPSK of DDS technology modulation signal, generate again the modulation signal of final form through digital-to-analogue conversion, creationaryly invent a kind of method that produces digitlization PI/4-DQPSK modulation signal, the method needn't adopt multiplier, the method of the PI/4-DQPSK modulation signal more simulated than existing generation is simple in structure, and hardware resource is few, and has saved system resource.
Embodiment five,
As shown in Figure 7, the embodiment of the present invention provides a kind of method that produces PI/4-DQPSK modulation signal, comprising:
Wherein, described modulation parameter comprises: carrier frequency control word and base band frequency control word;
Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment; I
k, Q
kbeing respectively 1 bit width, is 2 bit widths altogether, is therefore called parallel code stream.
Be specially:
Calculate and search and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
| {I k,Q k} | Δθ | ΔP |
| {0，0} | 45° | 001 |
| {0，1} | 135° | 011 |
| {1，0} | -135° | 101 |
| {1，1} | -45° | 111 |
Wherein, Δ θ is under PI/4-DQPSK modulation system, parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
The output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder is according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1for the phase modulation word in k-1 moment, Δ P is described phase modulation word increment.
Phase accumulator carries out accumulation calculating to carrier frequency control word K, generates N position phase code, removes the carrier phase code of front M position as output.The carrier amplitude information of wherein, storing in carrier waveform memory is 2M.
Be specially:
By described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address addr.
By the embodiment of the present invention six, file to be modulated is changed into serial baseband signal by control unit, and modulation module directly calculates phase modulation word P by this baseband signal
kand then adopt DDS method directly to generate PI/4-DQPSK modulation signal, again by exporting after digital-to-analogue conversion, reduce the multiplier in traditional modulated-analog signal generative process, and then creationaryly invent a kind of method that produces digitlization PI/4-DQPSK modulation signal, the method of the PI/4-DQPSK modulation signal more simulated than existing generation is simple in structure, and hardware resource is few, and has saved system resource.
Embodiment six:
As Fig. 8, the embodiment of the present invention provides a kind of signal generator that produces PI/4-DQPSK modulation signal, comprising:
Described serial/parallel modular converter 8061, for baseband signal is carried out to serial/parallel conversion, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment; I
k, Q
kbeing respectively 1 bit width, is 2 bit widths altogether, is therefore called parallel code stream.
Described phase code module 8062, for according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Phase code module is calculated and is searched and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
| {I k,Q k} | Δθ | ΔP |
| {0，0} | 45° | 001 |
| {0，1} | 135° | 011 |
| {1，0} | -135° | 101 |
| {1，1} | -45° | 111 |
Wherein, Δ θ is under PI/4-DQPSK modulation system, parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
Described phase modulation word computing module 8063, for calculating the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Phase modulation word computing module, comprising: delayer and phase place adder;
Described delayer, for the output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder, for according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1for the phase modulation word in k-1 moment, Δ P is described phase modulation word increment.
Described carrier phase code generation module 8064, for generating carrier phase code;
By phase accumulator, K is added up, generate N position code mutually, but finally only export high M position code mutually.Phase accumulator, in the time of each pulse reference clock input (rising edge clock), accumulates once frequency word, and it exports the phase increment of a step-length of corresponding increase.
The output of phase accumulator is connected in the address wire of wave memorizer by modulation adder.
Described modulation adder 8065, for by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Modulation adder is by described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address addr.
Described carrier waveform memory 8066, for storing carrier waveform information; This carrier waveform memory is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal.
Digital to analog converter 807, for converting described PI/4-DQPSK modulation signal to PI/4-DQPSK modulated-analog signal output.
After this scheme sends to modulation module by controller by baseband signal, modulation module directly generates Δ P and then calculates P
kdirectly control the high 3 of M position carrier phase code, adopt the direct generating digital PI/4-DQPSK of DDS technology modulation signal, generate again the modulation signal of final form through digital-to-analogue conversion, creationaryly invent a kind of method that produces digitlization PI/4-DQPSK modulation signal, the method needn't adopt multiplier, the method of the PI/4-DQPSK modulation signal more simulated than existing generation is simple in structure, and hardware resource is few, and has saved system resource.
The software module that the method for describing in conjunction with embodiment disclosed herein or the step of algorithm can use hardware, processor to carry out, or the combination of the two is implemented.Software module can be placed in the storage medium of any other form known in random asccess memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field.
Above-described embodiment; object of the present invention, technical scheme and beneficial effect are further described; institute is understood that; this is only the specific embodiment of the present invention above; the protection range being not intended to limit the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (16)
1. a method that produces PI/4-DQPSK modulation signal, is characterized in that, comprising:
Baseband signal is carried out to serial/parallel conversion, obtain parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
According to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Calculate the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Generate carrier phase code;
By described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Read address according to described modulation signal and read corresponding carriers shape information, thereby generate PI/4-DQPSK modulation signal.
2. the method that produces as claimed in claim 1 PI/4-DQPSK modulation signal, is characterized in that, described according to described parallel code stream I
k, Q
kcalculating corresponding phase modulation word increment Delta P is specially:
Calculate and search and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
Wherein, Δ θ is parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
3. the method that produces as claimed in claim 1 PI/4-DQPSK modulation signal, is characterized in that, describedly calculates the phase modulation word P in this k moment according to described phase modulation word increment Delta P
kspecifically comprise:
The output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder is according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1for the phase modulation word in k-1 moment, Δ P is described phase modulation word increment.
4. the method that produces as claimed in claim 1 PI/4-DQPSK modulation signal, is characterized in that, described by described phase modulation word P
kbe added with carrier phase code, generation modulation signal is read address and is specially:
By described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address.
5. a modulator that produces PI/4-DQPSK modulation signal, is characterized in that, comprising: serial/parallel modular converter, phase code module, phase modulation word computing module, carrier phase code generation module, modulation adder and carrier waveform memory;
Described serial/parallel modular converter, for baseband signal is carried out to serial/parallel conversion, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
Described phase code module, for according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Described phase modulation word computing module, for calculating the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Described carrier phase code generation module, for generating carrier phase code;
Described modulation adder, for by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Described carrier waveform memory, for storing carrier waveform information; This carrier waveform memory is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal.
6. the modulator that produces as claimed in claim 5 PI/4-DQPSK modulation signal, is characterized in that: described phase code module is calculated and searched and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
Wherein, Δ θ is parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
7. the modulator that produces as claimed in claim 5 PI/4-DQPSK modulation signal, is characterized in that: described phase modulation word computing module, comprising: delayer and phase place adder;
Described delayer, for the output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder, for according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1 is the phase modulation word in k-1 moment, and Δ P is described phase modulation word increment.
8. the modulator that produces as claimed in claim 5 PI/4-DQPSK modulation signal, is characterized in that: described modulation adder is by described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address.
9. a method that produces PI/4-DQPSK modulation signal, is characterized in that, comprising:
CPU reads original carrier wave table and the file to be modulated in nonvolatile storage and obtains modulation parameter by Man Machine Interface, and this original carrier wave table, file to be modulated and modulation parameter are sent to control unit; Wherein, described modulation parameter comprises: carrier frequency control word and base band frequency control word;
This original carrier wave table is write the carrier waveform memory in modulating wave module by described control unit;
This file to be modulated is write modulation file memory by described control unit;
Described carrier frequency control word is sent to described modulation module by described control unit;
Described control unit reads the file to be modulated in described modulation file memory according to described base band frequency control word, and converts this file to be modulated to baseband signal, is sent to described modulation module;
This baseband signal is carried out serial/parallel conversion by described modulation module, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
Described modulation module is according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Described modulation module calculates the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Described modulation module adds up described carrier frequency control word to generate carrier phase code;
Described modulation module is by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Described modulation module is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal;
Digital to analog converter converts described PI/4-DQPSK modulation signal to PI/4-DQPSK modulated-analog signal output.
10. the method that produces as claimed in claim 9 PI/4-DQPSK modulation signal, is characterized in that, described according to described parallel code stream I
k, Q
kcalculating corresponding phase modulation word increment Delta P is specially:
Calculate and search and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
Wherein, Δ θ is parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
11. produce the method for PI/4-DQPSK modulation signal as claimed in claim 9, it is characterized in that, describedly calculate the phase modulation word P in this k moment according to described phase modulation word increment Delta P
kspecifically comprise:
The output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder is according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1for the phase modulation word in k-1 moment, Δ P is described phase modulation word increment.
12. produce the method for PI/4-DQPSK modulation signal as claimed in claim 9, it is characterized in that, described by described phase modulation word P
kbe added with carrier phase code, generation modulation signal is read address and is specially:
By described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address.
13. 1 kinds produce the signal generator of PI/4-DQPSK modulation signal, it is characterized in that, comprising:
Nonvolatile storage, for storing initial carrier wave wave table and file to be modulated;
Man Machine Interface, for obtaining modulation parameter;
CPU, for reading original carrier wave table and the file to be modulated of nonvolatile storage; Obtain modulation parameter by Man Machine Interface; This original carrier wave table, file to be modulated and modulation parameter are sent to control unit; Wherein, described modulation parameter comprises: carrier frequency control word and base band frequency control word;
Control unit; This control unit is for writing the carrier waveform memory in modulating wave module by this original carrier wave table; Described carrier frequency control word is sent to described modulation module; Will described in file to be modulated write modulation file memory and read according to described base band frequency control word described in file to be modulated, and convert this file to be modulated to baseband signal, be sent to described modulation module; Also comprise modulation file memory, for file to be modulated described in storing;
Modulation module, comprising: serial/parallel modular converter, phase code module, phase modulation word computing module, carrier phase code generation module, modulation adder and carrier waveform memory;
Described serial/parallel modular converter, for baseband signal is carried out to serial/parallel conversion, obtains parallel code stream I
k, Q
k; Wherein, I
k, Q
krepresent the code word of parallel code stream of k moment;
Described phase code module, for according to described parallel code stream I
k, Q
kcalculate corresponding phase modulation word increment Delta P;
Described phase modulation word computing module, for calculating the phase modulation word P in this k moment according to described phase modulation word increment Delta P
k;
Described carrier phase code generation module, for generating carrier phase code;
Described modulation adder, for by described phase modulation word P
kbe added with carrier phase code, generate modulation signal and read address;
Described carrier waveform memory, for storing carrier waveform information; This carrier waveform memory is read address according to described modulation signal and is read corresponding carriers shape information, thereby generates PI/4-DQPSK modulation signal;
Digital to analog converter, for converting described PI/4-DQPSK modulation signal to PI/4-DQPSK modulated-analog signal output.
14. produce the signal generator of PI/4-DQPSK modulation signal as claimed in claim 13, it is characterized in that: described phase code module is calculated and searched and described parallel code stream I according to following table
k, Q
kcorresponding phase modulation word increment Delta P;
Wherein, Δ θ is parallel code stream I
k, Q
kcorresponding carrier phase; Δ P is parallel code stream I
k, Q
kcorresponding phase modulation word increment.
15. produce the signal generator of PI/4-DQPSK modulation signal as claimed in claim 13, it is characterized in that: described phase modulation word computing module, comprising: delayer and phase place adder;
Described delayer, for the output signal of phase retardation adder, and by the signal input phase adder after postponing;
Described phase place adder, for according to calculating formula P
k=P
k-1+ Δ P calculates phase modulation word P
k; Wherein, P
kfor the phase modulation word in k moment, P
k-1for the phase modulation word in k-1 moment, Δ P is described phase modulation word increment.
16. produce the signal generator of PI/4-DQPSK modulation signal as claimed in claim 13, it is characterized in that: described modulation adder is by described phase modulation word P
kbe added with a high position corresponding in carrier phase code, generate modulation signal and read address.
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| WO2017016443A1 (en) * | 2015-07-25 | 2017-02-02 | 华为技术有限公司 | Digital modulation method, demodulation method, related apparatus and system |
| CN108881099A (en) * | 2018-06-20 | 2018-11-23 | 北京理工大学 | A kind of the generation system and generation method of signal of communication |
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| WO2017016443A1 (en) * | 2015-07-25 | 2017-02-02 | 华为技术有限公司 | Digital modulation method, demodulation method, related apparatus and system |
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| CN106713213B (en) * | 2015-07-25 | 2018-09-28 | 华为技术有限公司 | A kind of Ditital modulation method, demodulation method, relevant apparatus and system |
| CN108881099A (en) * | 2018-06-20 | 2018-11-23 | 北京理工大学 | A kind of the generation system and generation method of signal of communication |
| CN108881099B (en) * | 2018-06-20 | 2019-08-09 | 北京理工大学 | A kind of the generation system and generation method of signal of communication |
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| CN103873409B (en) | 2019-01-08 |
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