CN103869548B - Manufacture method of liquid crystal display and products thereof - Google Patents
Manufacture method of liquid crystal display and products thereof Download PDFInfo
- Publication number
- CN103869548B CN103869548B CN201210528636.4A CN201210528636A CN103869548B CN 103869548 B CN103869548 B CN 103869548B CN 201210528636 A CN201210528636 A CN 201210528636A CN 103869548 B CN103869548 B CN 103869548B
- Authority
- CN
- China
- Prior art keywords
- groove
- cylindricality
- chock insulator
- insulator matter
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses the manufacture method of a kind of liquid crystal display, including: formed and be provided with the main chock insulator matter of cylindricality and the color membrane substrates of cylindricality pair chock insulator matter；Formed and be provided with the first corresponding groove of chock insulator matter main with described cylindricality and the array base palte of second groove corresponding with described cylindricality pair chock insulator matter；By involutory with described array base palte for described color membrane substrates, form liquid crystal display；Wherein, it is respectively equipped with gap between the main chock insulator matter of described cylindricality and described first groove and between described cylindricality pair chock insulator matter and described second groove, the main chock insulator matter of described cylindricality is identical with the height of described cylindricality pair chock insulator matter, and the degree of depth of described second groove is more than the degree of depth of described first groove.The invention also discloses a kind of liquid crystal display using the method to make.Manufacture method of liquid crystal display of the present invention and products thereof, can not only maintain box thick, moreover it is possible to prevent sliding, reduce production cost.
Description
Technical field
The present invention relates to manufacture method of a kind of liquid crystal display and products thereof.
Background technology
In order to maintain Thin Film Transistor-LCD (Thin Film Transistor Liquid
CrystalDisplay, is called for short TFT-LCD) color membrane substrates and array base palte between box thick, generally in the manufacture of TFT-LCD
During add spherical chock insulator matter (Ball Spacer, be called for short BS) or column shaped spacer (PostSpacer is called for short PS) to protect
Hold box thick consistent.Using spherical chock insulator matter to manufacture liquid crystal display is to be dispersed in color membrane substrates or battle array by spray pattern
On row substrate, spherical chock insulator matter may be sprayed to pixel region by mistake, therefore, causes liquid crystal aligning around spherical chock insulator matter poor
Produce light leak, cause contrast to decline.And use column shaped spacer to manufacture liquid crystal display, it is possible to by column shaped spacer accurately
Control on color membrane substrates, it is possible to be effectively improved contrast, thus reach to control the thick dual function with raising contrast of box.
Column shaped spacer generally includes the main chock insulator matter of cylindricality and cylindricality pair chock insulator matter, the main dottle pin of prior art many employings cylindricality
Thing and cylindricality pair chock insulator matter with the use of mode, and the main chock insulator matter of cylindricality is higher than cylindricality pair chock insulator matter.Wherein, cylindricality master every
Underbed and color membrane substrates, array base palte offset to play and control the effect that box is thick；Cylindricality pair chock insulator matter under normal circumstances with array
Substrate is not in contact with, and when upper and lower base plate pressure experienced is excessive, cylindricality pair chock insulator matter functions to, and assists the main dottle pin of cylindricality
Thing supports color membrane substrates and array base palte.
But, use conventional exposure mode (Normal Mask) to can be only formed a kind of PS, the most all of PS is the most identical.
In order to form the PS of differing heights, the main chock insulator matter of the highest cylindricality and lower slightly cylindricality pair chock insulator matter, the most commonly used half
Exposure mode (Half-tone mask) is carried out, and adds production cost.
Summary of the invention
In view of this, present invention is primarily targeted at manufacture method that a kind of liquid crystal display is provided and products thereof, no
It is only capable of maintenance box thick, moreover it is possible to prevent sliding, reduces production cost.
For reaching above-mentioned purpose, the invention provides the manufacture method of a kind of liquid crystal display, including:
Formed and be provided with the main chock insulator matter of cylindricality and the color membrane substrates of cylindricality pair chock insulator matter；
Formed be provided with the first corresponding groove of chock insulator matter main with described cylindricality and with described cylindricality pair chock insulator matter phase
The array base palte of the second corresponding groove；
By involutory with described array base palte for described color membrane substrates, form liquid crystal display；
Wherein, between the main chock insulator matter of described cylindricality and described first groove and described cylindricality pair chock insulator matter and described second
Being respectively equipped with gap between groove, the main chock insulator matter of described cylindricality is identical with the height of described cylindricality pair chock insulator matter, described second recessed
The degree of depth of groove is more than the degree of depth of described first groove.
Further, after forming described array base palte, the method also includes: at described the first of described array base palte
Transparency conducting layer is formed at groove location.
Further, being formed after indium tin oxide layer at described first groove location, the method also includes: to described the
Two grooves carry out organic membrane ashing, make the degree of depth degree of depth more than described first groove of described second groove.
Further, described formation is provided with the color membrane substrates of the main chock insulator matter of cylindricality and cylindricality pair chock insulator matter and includes:
Black matrix is formed on one substrate；The substrate being formed with described black matrix is formed colour element resin bed；And be formed
The main chock insulator matter of described cylindricality that on the substrate of described colour element resin bed, rational height is identical and described cylindricality pair chock insulator matter, shape
Become described color membrane substrates.
Further, described formation be provided with the first corresponding groove of chock insulator matter main with described cylindricality and with described post
The array base palte of the second groove that shape pair chock insulator matter is corresponding includes: form grid and grid line, gate insulator on second substrate
Layer, active layer, source electrode, drain electrode, organic film and protective layer；And arrange on described protective layer and described organic film
Described first groove and described second groove, form described array base palte.
For reaching above-mentioned purpose, present invention also offers a kind of liquid crystal display, including: the color membrane substrates being oppositely arranged and
Array base palte, and it is filled in the liquid crystal between described color membrane substrates and described array base palte；
Wherein, described color membrane substrates is provided with the main chock insulator matter of cylindricality and cylindricality pair chock insulator matter, the main chock insulator matter of described cylindricality
Identical with the height of described cylindricality pair chock insulator matter；Be provided with on described array base palte that chock insulator matter main with described cylindricality is corresponding
One groove and second groove corresponding with described cylindricality pair chock insulator matter；The main chock insulator matter of described cylindricality and described first groove it
Between and described cylindricality pair chock insulator matter and described second groove between be respectively equipped with gap, the degree of depth of described second groove be more than institute
State the degree of depth of the first groove.
Further, described array base palte is additionally provided with the transparency conducting layer being positioned at described first groove location.
Further, described color membrane substrates includes: first substrate, black matrix and the colour element resin bed stacked successively；
Also include the main chock insulator matter of described cylindricality that is positioned on described colour element resin bed and described cylindricality pair chock insulator matter.
Further, described array base palte includes: second substrate, grid and the grid line, the gate insulator that stack successively, have
Active layer, source electrode, drain electrode, organic film and protective layer；Also include the institute being positioned on described protective layer and described organic film
State the first groove and described second groove.
Further, described second groove is 0.1-2.0um with the depth difference of described first groove.
Compared with prior art, manufacture method of liquid crystal display of the present invention and products thereof in use, cylindricality master every
Ambient pressure can be resisted in the gap between gap and cylindricality pair chock insulator matter and the second groove between underbed and the first groove
To maintain box thick.Additionally, the main chock insulator matter of cylindricality and the first fit depressions, cylindricality pair chock insulator matter and the second fit depressions, energy
Enough prevent upper and lower base plate sliding.Finally, conventional exposure mode is used to form the main chock insulator matter of cylindricality and cylindricality pair chock insulator matter, fall
Low production cost.
Accompanying drawing explanation
Fig. 1 is the manufacture method flow chart of the liquid crystal display of the present invention；
Fig. 2 is the method flow diagram forming color membrane substrates of the present invention；
Fig. 3 is the process chart forming color membrane substrates of the present invention；
Fig. 4 is the method flow diagram forming array base palte of the present invention；
Fig. 5 is the process chart forming array base palte of the present invention；
Fig. 6 a-6e is formation the first groove and the substep cross-sectional schematic of the second groove of the present invention；
Fig. 7 is the decomposition texture cross-sectional schematic of the liquid crystal display of the present invention；
Fig. 8 is another decomposition texture cross-sectional schematic of the liquid crystal display of the present invention.
Description of reference numerals:
1 first substrate 2 black matrix
The 3 colour element resin bed 4 main chock insulator matters of cylindricality
5 cylindricality pair chock insulator matter 6 second substrates
7 grids and grid line 8 gate insulator
9 active layer 10 source electrodes
11 organic film 12 protective layers
13 transparency conducting layer 14 first grooves
15 second grooves
Detailed description of the invention
The technical content and a detailed description for the present invention, are described as follows in conjunction with accompanying drawing.
As shown in Fig. 1, Fig. 7-Fig. 8, the invention provides the manufacture method of a kind of liquid crystal display, comprise the following steps:
Step S10: formed and be provided with the main chock insulator matter of cylindricality and the color membrane substrates of cylindricality pair chock insulator matter；
Wherein, the main chock insulator matter of cylindricality 4 is identical with the height of cylindricality pair chock insulator matter 5, and the preferably main chock insulator matter of cylindricality 4 and cylindricality is secondary
The shape of chock insulator matter 5 is the most identical；The shape of cross section of the main chock insulator matter of cylindricality 4 and cylindricality pair chock insulator matter 5 can be circular, oval
Or polygon etc..
Step S20: formed and be provided with the first corresponding groove of chock insulator matter main with described cylindricality and secondary with described cylindricality
The array base palte of the second groove that chock insulator matter is corresponding；
Wherein, divide between the main chock insulator matter of cylindricality 4 and the first groove 14 and between cylindricality pair chock insulator matter 5 and the second groove 15
It is not provided with gap；Further, the degree of depth of the second groove 15 is more than the degree of depth of the first groove 14, and the span of depth difference can be
0.1-2.0um。
Step S30: form indium tin oxide (ITO) layer at described first groove location of described array base palte；
Wherein, the substrate complete step S20 forms transparency conducting layer layer with photoresist, by mask plate to this photoetching
Glue-line is exposed, develops, and forms transparency conducting layer, carry out afterwards on protective layer the 12, first groove 14 and the second groove 15
Etching, stripping, only retain the transparency conducting layer being positioned at the first groove 14 position, as shown in Fig. 5 and Fig. 6 c-6d.
Preferably, this electrically conducting transparent layer material is identical with transparent electrode material.
It is further preferable that this transparency conducting layer and transparency electrode use a patterning processes to be formed.
Additionally, after completing step S30, can use organic membrane cineration technics that the second groove 15 is located further
Reason, in order to make the degree of depth degree of depth more than the first groove 14 of the second groove 15.The process that implements of organic membrane cineration technics will
It is described in more detail below.
Step S40: by involutory with described array base palte for described color membrane substrates, forms liquid crystal display.
After coating sealed plastic box and dispenser method, described color membrane substrates is carried out involutory with described array base palte, form liquid
Crystal display.
The liquid crystal display using said method to make specifically includes that the color membrane substrates and array base palte being oppositely arranged, with
And it is filled in the liquid crystal between described color membrane substrates and described array base palte；Wherein, described color membrane substrates is provided with cylindricality master
Chock insulator matter 4 and cylindricality pair chock insulator matter 5, the main chock insulator matter of cylindricality 4 is identical with the height of cylindricality pair chock insulator matter 5；On described array base palte
It is provided with the first corresponding groove 14 of chock insulator matter 4 main with cylindricality and second groove 15 corresponding with cylindricality pair chock insulator matter 5；
It is respectively equipped with gap between the main chock insulator matter of cylindricality 4 and the first groove 14 and between cylindricality pair chock insulator matter 5 and the second groove 15, the
The degree of depth of two grooves 15 is more than the degree of depth of the first groove, and the span of depth difference can be 0.1-2.0um.Additionally, described array
The indium tin oxide layer 13 being positioned at the first groove 14 position it is additionally provided with on substrate.
As shown in Fig. 2, Fig. 3 and Fig. 7-Fig. 8, step S10 forming color membrane substrates specifically includes:
Step S101: form black matrix on the first substrate；
Wherein, coating black matrix is with photoresist on first substrate 1, is exposed this photoresist by mask plate, shows
Shadow, forms black matrix 2.
Step S102: form colour element resin bed on the substrate being formed with described black matrix；
Wherein, the substrate complete step S101 coats colour element resin bed with photoresist, by mask plate to this
Photoresist is exposed, develops, and forms colour element resin bed 3.
Step S103: the described cylindricality master that rational height is identical on the substrate being formed with described colour element resin bed every
Underbed and described cylindricality pair chock insulator matter, form described color membrane substrates.
Wherein, the substrate complete step S102 coats the master/slave chock insulator matter of cylindricality with photoresist, by mask plate to this
Photoresist is exposed, develops, and preferably can also heat, and ultimately forms the main chock insulator matter of cylindricality 4 and cylindricality pair chock insulator matter 5.
Use the described color membrane substrates made of said method specifically include that stack successively first substrate 1, black matrix 2 and
Colour element resin bed 3, i.e. black matrix 2 and colour element resin bed 3 set gradually on first substrate 1；Described color membrane substrates
Also include the main chock insulator matter of cylindricality 4 and the cylindricality pair chock insulator matter 5 being positioned on colour element resin bed 3.
As shown in Fig. 4-Fig. 8, step S20 forming array base palte specifically includes:
Step S201: formed on second substrate grid and grid line, gate insulator, active layer, source electrode, drain electrode,
Organic film and protective layer；
Wherein, second substrate 6 makes grid and grid line 7, gate insulator 8, active layer 9, source the most successively
Electrode 10, drain electrode (not shown), organic film 11；On organic film 11, deposit transparent insulating layer afterwards, form protective layer
12.Wherein, preferably transparent insulation material is allyl resin or phenylpropyl alcohol cyclobutane.The process that implements such as Fig. 5 institute of each operation
Show, be not described in detail at this.
Step S202: described first groove and described second groove are set on described protective layer and described organic film,
Form array base palte.
Wherein, on the substrate completing step S201, it is initially formed the two or more that the degree of depth of through protective layer 12 is identical
Hole (as shown in Figure 6 a), then use organic membrane cineration technics to process the organic film 11 that exposes, make the degree of depth in described hole add
Deeply (as shown in Figure 6 b).Secondly, using the method in abovementioned steps S30, a part of described hole is used as the first groove 14, shape in it
Become to have indium tin oxide layer 13 (as shown in Fig. 6 c-6d).Finally, hole described in another part can use organic membrane cineration technics to enter
One step processes so that it is the degree of depth continues to strengthen, and forms the second groove 15 (as shown in fig 6e)；Specifically, organic membrane cineration technics is
Carry out developing and exposing by the organic film 11 not forming the described hole of indium tin oxide layer 13, form the degree of depth more than the first groove
Second groove 15 of 14.
Additionally, the shape of cross section of the first groove 14 and the second groove 15 chock insulator matter 4 main with cylindricality respectively and cylindricality secondary every
The shape of cross section of underbed 5 is corresponding；The width (diameter of section) of the first groove 14 and the second groove 15 is not less than the most corresponding
The main chock insulator matter of cylindricality 4 and the width of cylindricality pair chock insulator matter 5 one end, in order to keep the first groove 14 and the main chock insulator matter of cylindricality respectively
Gap between 4 and between the second groove 15 and cylindricality pair chock insulator matter 5.The quantity of the first groove 14 and the second groove 15 is respectively
The quantity of chock insulator matter 4 main with cylindricality and cylindricality pair chock insulator matter 5 is corresponding, in order to assembling.
The described array base palte using said method to make specifically includes that second substrate 6, grid and the grid line stacked successively
7, gate insulator 8, active layer 9, source electrode 10, drain electrode (not shown), organic film 11 and protective layer 12；I.e. grid and grid
Line 7, gate insulator 8, active layer 9, source electrode 10, drain electrode, organic film 11, protective layer 12 are successively set on second substrate
On 6；Described array base palte also includes the first groove 14 and the second groove 15 being positioned on protective layer 12 and organic film 11.
Manufacture method of liquid crystal display and products thereof that the present invention provides in use, when by ambient pressure or heat
When process, gap between the main chock insulator matter of cylindricality 4 and the first groove 14 and cylindricality pair chock insulator matter 5 and the second groove 15
Between gap can resist ambient pressure to maintain box thick；Additionally, the first groove 14 and the second groove 15 respectively with cylindricality master
Chock insulator matter 4 and cylindricality pair chock insulator matter 5 match, be possible to prevent described color membrane substrates and described array base palte generation parallel misalignment or
Sliding so that the local stress produced when ambient pressure or heat treatment is timely released, and effectively improves display
Uneven phenomenon, improves product quality.Finally, manufacture method of liquid crystal display of the present invention and products thereof is applicable to cylindricality
The situation that main chock insulator matter 4 is the most identical with cylindricality pair chock insulator matter 5, production cost is relatively low.
The above, only presently preferred embodiments of the present invention, it is not intended to limit protection scope of the present invention.
Claims (7)
1. the manufacture method of a liquid crystal display, it is characterised in that including:
Formed and be provided with the main chock insulator matter of cylindricality and the color membrane substrates of cylindricality pair chock insulator matter；
Formed and be provided with the first corresponding groove of chock insulator matter main with described cylindricality and corresponding with described cylindricality pair chock insulator matter
The array base palte of the second groove；Wherein, at described first groove location of described array base palte, transparency conducting layer is formed；Right
Described second groove carries out organic membrane ashing, makes the degree of depth degree of depth more than described first groove of described second groove；
By involutory with described array base palte for described color membrane substrates, form liquid crystal display；
Wherein, between the main chock insulator matter of described cylindricality and described first groove and described cylindricality pair chock insulator matter and described second groove
Between be respectively equipped with gap, the main chock insulator matter of described cylindricality is identical with the height of described cylindricality pair chock insulator matter, described second groove
The degree of depth is more than the degree of depth of described first groove.
2. the manufacture method of liquid crystal display as claimed in claim 1, it is characterised in that described formation be provided with cylindricality master every
The color membrane substrates of underbed and cylindricality pair chock insulator matter includes:
Form black matrix on the first substrate；
The substrate being formed with described black matrix is formed colour element resin bed；And
Rational height is identical on the substrate being formed with described colour element resin bed the main chock insulator matter of described cylindricality and described post
Shape pair chock insulator matter, forms described color membrane substrates.
3. the manufacture method of liquid crystal display as claimed in claim 1, it is characterised in that described formation is provided with and described post
The first groove that the main chock insulator matter of shape is corresponding and the array base palte bag of second groove corresponding with described cylindricality pair chock insulator matter
Include:
Second substrate is formed grid and grid line, gate insulator, active layer, source electrode, drain electrode, organic film and protection
Layer；And
Described protective layer and described organic film arrange described first groove and described second groove, forms described array base
Plate.
4. a liquid crystal display, it is characterised in that including: the color membrane substrates being oppositely arranged and array base palte, and be filled in
Liquid crystal between described color membrane substrates and described array base palte；
Wherein, described color membrane substrates is provided with the main chock insulator matter of cylindricality and cylindricality pair chock insulator matter, the main chock insulator matter of described cylindricality and institute
The height stating cylindricality pair chock insulator matter is identical；Corresponding first recessed of chock insulator matter main with described cylindricality it is provided with on described array base palte
Groove and second groove corresponding with described cylindricality pair chock insulator matter；Be additionally provided with on described array base palte be positioned at described first recessed
Transparency conducting layer at groove location, between the main chock insulator matter of described cylindricality and described first groove and described cylindricality pair chock insulator matter with
It is respectively equipped with gap between described second groove, carries out the degree of depth of described second groove after organic membrane ashing more than described first
The degree of depth of groove.
5. liquid crystal display as claimed in claim 4, it is characterised in that described color membrane substrates includes: first stacked successively
Substrate, black matrix and colour element resin bed；Also include the main chock insulator matter of described cylindricality being positioned on described colour element resin bed
And described cylindricality pair chock insulator matter.
6. liquid crystal display as claimed in claim 4, it is characterised in that described array base palte includes: second stacked successively
Substrate, grid and grid line, gate insulator, active layer, source electrode, drain electrode, organic film and protective layer；Also include being positioned at institute
State described first groove on protective layer and described organic film and described second groove.
7. the liquid crystal display as according to any one of claim 4 to 6, it is characterised in that described second groove and described the
The depth difference of one groove is 0.1-2.0um.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210528636.4A CN103869548B (en) | 2012-12-10 | 2012-12-10 | Manufacture method of liquid crystal display and products thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210528636.4A CN103869548B (en) | 2012-12-10 | 2012-12-10 | Manufacture method of liquid crystal display and products thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103869548A CN103869548A (en) | 2014-06-18 |
| CN103869548B true CN103869548B (en) | 2016-08-24 |
Family
ID=50908252
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210528636.4A Active CN103869548B (en) | 2012-12-10 | 2012-12-10 | Manufacture method of liquid crystal display and products thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103869548B (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104216161B (en) * | 2014-08-22 | 2018-06-05 | 京东方科技集团股份有限公司 | A kind of display device |
| CN104298010A (en) * | 2014-08-28 | 2015-01-21 | 合肥京东方光电科技有限公司 | Display substrate, display substrate manufacturing method and display device |
| CN105445990A (en) * | 2014-09-26 | 2016-03-30 | 南京瀚宇彩欣科技有限责任公司 | Display panel and manufacturing method thereof |
| CN204101855U (en) * | 2014-10-27 | 2015-01-14 | 京东方科技集团股份有限公司 | Array base palte, display panel and display device |
| CN104375331B (en) * | 2014-11-21 | 2017-11-10 | 厦门天马微电子有限公司 | A kind of liquid crystal display device and preparation method thereof |
| CN105353567B (en) * | 2015-12-02 | 2019-01-15 | 深圳市华星光电技术有限公司 | Using the VA type liquid crystal display panel and preparation method thereof of no black matrix" technology |
| CN105549250B (en) | 2016-02-26 | 2017-11-10 | 京东方科技集团股份有限公司 | A kind of array base palte, display panel and its corresponding preparation method and display device |
| CN105974629B (en) * | 2016-07-08 | 2020-04-10 | 武汉华星光电技术有限公司 | Touch liquid crystal panel and liquid crystal display |
| CN107229162A (en) * | 2017-03-09 | 2017-10-03 | 京东方科技集团股份有限公司 | The preparation method and display device of a kind of display panel, display panel |
| CN111766733A (en) * | 2020-07-31 | 2020-10-13 | 京东方科技集团股份有限公司 | Transparent display panel, preparation method thereof and display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006227459A (en) * | 2005-02-21 | 2006-08-31 | Hitachi Displays Ltd | Liquid crystal display device |
| KR100740041B1 (en) * | 2005-06-30 | 2007-07-16 | 엘지.필립스 엘시디 주식회사 | Liquid crystal panel having dual column spacer, and method for manufacturing the same |
| JP2007171715A (en) * | 2005-12-26 | 2007-07-05 | Epson Imaging Devices Corp | Liquid crystal device and electronic apparatus |
| JP2009069391A (en) * | 2007-09-12 | 2009-04-02 | Hitachi Displays Ltd | Liquid crystal display device |
| JP2009258241A (en) * | 2008-04-14 | 2009-11-05 | Toshiba Mobile Display Co Ltd | Liquid crystal display |
-
2012
- 2012-12-10 CN CN201210528636.4A patent/CN103869548B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103869548A (en) | 2014-06-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103869548B (en) | Manufacture method of liquid crystal display and products thereof | |
| CN202472188U (en) | Liquid crystal display device | |
| US9640589B2 (en) | Organic electroluminescent display panel and display device | |
| US9589834B2 (en) | Array substrate and manufacturing method thereof, and display device | |
| US9696594B2 (en) | Display substrate and fabricating method thereof, and display device | |
| US9448445B2 (en) | Electrode structure and manufacturing method thereof, array substrate and manufacturing method thereof, and display device | |
| JP6854882B2 (en) | Liquid crystal display panel and liquid crystal display device | |
| CN103219336B (en) | A kind of preparation method of array base palte, display device and array base palte | |
| US10007157B2 (en) | Color-filter-on-array substrate and method of manufacturing thereof | |
| KR101835545B1 (en) | Liquid crystal display device and Method for manufacturing the same | |
| US20170141132A1 (en) | Pixel Unit and Method for Producing the Same, Array Substrate and Display Apparatus | |
| TWI516833B (en) | Liquid crystal display device and method of manufacturing the same | |
| CN102983135B (en) | The preparation method of a kind of array base palte, display unit and array base palte | |
| CN101546076A (en) | TFT-LCD array substrate and color film substrate and manufacturing method thereof | |
| CN104865754A (en) | Display panel and manufacturing method thereof as well as display device | |
| WO2018196438A1 (en) | Display panel and manufacturing method therefor, and display device | |
| US20110263057A1 (en) | Active Array Substrate, Liquid Crystal Display Panel, and Manufacturing Method Thereof | |
| CN103500731B (en) | OLED (organic light-emitting diode) backboard and manufacturing method for same | |
| CN104298009A (en) | Spacer, display panel, display device and manufacturing method of display panel | |
| CN105058771B (en) | The method for manufacturing liquid crystal display device | |
| US9799683B2 (en) | Array substrate, preparation method thereof and display device | |
| US20160342078A1 (en) | Mask plate | |
| CN103165525A (en) | Preparation method of thin film transistor (TFT) array substrate and preparation method of electro-static discharge (ESD) protective circuit on TFT array substrate | |
| CN101126876B (en) | Thin-film transistor LCD pixel structure and its making method | |
| US20210302795A1 (en) | Display panel and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |