CN103856061B - The gamut soft-switching process of input series and output parallel phase-shifted full-bridge converter - Google Patents

Abstract

The invention relates to a full-range soft switching method for an input series output parallel phase-shifting full-bridge converter, and belongs to the technical field of isolated DC converters. The method of the present invention connects a series connection between the midpoint of the upper tube and the lower tube of the leading bridge arm of the first phase-shifting full-bridge conversion module and the midpoint of the upper tube and the lower tube of the lagging bridge arm of the second phase-shifting full-bridge conversion module. LC network, another series connection is connected between the midpoint of the upper tube and the lower tube of the lagging bridge arm of the first phase-shifting full-bridge conversion module and the midpoint of the lagging bridge arm upper tube and lower tube of the second phase-shifting full-bridge conversion module The LC network realizes the zero-voltage turn-on of each MOSFET; it can automatically adapt to different input voltages, output voltages and loads. According to the present invention, the full-range soft switching of the phase-shifted full-bridge converter can be realized, and the efficiency of the whole converter can be improved; it is suitable for conversion occasions from high-voltage input to low-voltage output, and satisfies wide input voltage range, wide output voltage range, and wide load variation .

Description

Full-range soft-switching method for input-series-output parallel phase-shifted full-bridge converter

technical field

The invention relates to a full-range soft switching method for an input series output parallel phase-shifting full-bridge converter, and belongs to the technical field of isolated DC-DC converters.

Background technique

High voltage input and low voltage output are widely used in industry. In order to overcome the limitation of device selection, solutions for high-voltage input and low-voltage output can be roughly divided into: (1) device series connection; (2) multi-level technology; (3) converter series topology. Due to the simple topology, the device series technology is applied by ABB in HVDC transmission. In order to achieve equal sharing of the voltage of each device, it still poses a great challenge to the design of the control system. Multi-level technology can be adapted to high-voltage input occasions, but in practical applications, three-point leveling and five-level applications are still the main ones. With the increase of the number of levels, the complexity of the control strategy increases sharply, making it less reliable. Due to the complexity of the first two technologies, the converter input series technology has attracted people's attention. The converter input series technology makes each converter bear a part of the input voltage. In 2006, the article "Common-Duty-RatioControlofInput-SeriesConnectedModularDC-DCConvertersWithActiveInputVoltageandLoad-CurrentSharing" was published in IEEETransactiononIndustryApplication [Industrial Application Journal], using a common duty cycle to achieve stable operation of the input series output parallel converter. In 2009, "Control Strategy for Input-Series–Output-Parallel Converters" was published in IEEE Transaction on Industrial Electronics [Industrial Electronics], which adopted an active voltage equalization control strategy to achieve equal power sharing of input series output parallel phase-shifting full-bridge DC-DC converters. The research on the input series output parallel converter has been very extensive, but most of them are limited to the research on the control strategy, and the soft switching technology of the input series output parallel converter is seldom studied.

Contents of the invention

The purpose of the present invention is to solve the problem that the lagging bridge arm is not easy to realize zero-voltage turn-on (ZVS) at light load in the phase-shifted full-bridge converter with the input connected in series and the output connected in parallel. A general method for realizing full-range soft-on of phase-shifted full-bridge converters connected in parallel.

The full range means that the input voltage, output voltage and load of the phase-shifted full-bridge converter can all be changed, and the zero voltage switching (ZVS) of the switching tubes of the leading arm and the lagging arm can be realized within the changing range.

The full-range soft switching method of the input series output parallel phase-shifted full-bridge converter specifically includes the following steps:

Step 1, in the phase-shifted full-bridge converter including the first phase-shifted full-bridge conversion module and the second phase-shifted full-bridge conversion module, the input voltages of the two modules are connected in series, and the output voltages of the two modules are connected in parallel.

The first phase-shifting full-bridge conversion module and the second phase-shifting full-bridge conversion module include eight switching tubes, which are the upper and lower tubes of the lagging bridge arm of the first phase-shifting full-bridge conversion module, and the first phase-shifting full-bridge conversion The upper and lower tubes of the leading bridge arm of the module, the upper and lower tubes of the lagging bridge arm of the second phase-shifting full-bridge conversion module, and the upper and lower tubes of the leading bridge arm of the second phase-shifting full-bridge conversion module.

Find the midpoint where the upper tube and the lower tube of the leading bridge arm of the first phase-shifting full-bridge conversion module are connected.

Step 2, finding the midpoint where the upper tube and the lower tube of the lagging bridge arm of the second phase-shifting full-bridge conversion module are connected. The transformation ratio of the isolation transformer included in the second phase-shifting full-bridge conversion module is the same as that of the first phase-shifting full-bridge conversion module.

Step three, the midpoint of the upper tube and the lower tube of the leading bridge arm of the first phase-shifting full-bridge conversion module obtained in step one and the midpoint of the upper tube and lower tube of the lagging bridge arm of the second phase-shifting full-bridge conversion module obtained in step two A series LC network is connected between the midpoints, the series LC network is composed of an inductor and a capacitor connected in series, and the positions of the inductor and capacitor can be interchanged.

Step 4, find the midpoint of the connection between the upper tube and the lower tube of the lagging bridge arm of the first phase-shifting full-bridge conversion module.

Step five, find the midpoint where the upper tube and the lower tube of the leading bridge arm of the second phase-shifting full-bridge conversion module are connected.

Step six, the midpoint of the upper tube and the lower tube of the lagging bridge arm of the first phase-shifting full-bridge conversion module obtained in step four and the middle point of the upper tube and lower tube of the lagging bridge arm of the second phase-shifting full-bridge conversion module obtained in step five Another series LC network is connected between the points, and the inductance and capacitance of the LC network are the same as the inductance and capacitance of the LC network in step 3.

After adding two series LC networks, the eight switching tubes of the first phase-shifting full-bridge conversion module and the second phase-shifting full-bridge conversion module satisfy the following sequential logic:

The gate-level driving signals of the upper tube of the leading bridge arm of the first phase-shifting full-bridge conversion module and the lower tube of the leading bridge arm of the second phase-shifting full-bridge conversion module are the same; The gate-level driving signals of the upper tube of the leading bridge arm of the second phase-shifting full-bridge conversion module are the same; the above two groups of driving signals are defined as the driving signals of the leading bridge arm, which are pulse width modulation (PWM) signals with a duty cycle of 0.5, and Complementary, there is a dead zone between the two sets of driving signals.

The gate-level drive signals of the upper tube of the lagging bridge arm of the first phase-shifting full-bridge conversion module and the lower tube of the lagging bridge arm of the second phase-shifting full-bridge converting module are the same; The gate-level driving signals of the transistor and the upper transistor of the lagging bridge arm of the second phase-shifting full-bridge conversion module are the same; the above two groups of driving signals are defined as lagging bridge arm driving signals, which are also PWM signals with a duty cycle of 0.5, and are complementary , there is a dead zone between the two sets of driving signals.

Step 7, define the time between the rising edge of the drive signal of the upper tube of the leading bridge arm of the first phase-shifting full-bridge conversion module and the rising edge of the driving signal of the lower tube of the lagging bridge arm of the first phase-shifting full-bridge conversion module as the phase shift angle size. By adjusting the size of the phase-shift angle, the output voltage of the phase-shift full-bridge converter is controlled:

The size of the phase shift angle determines the action time of the voltage at both ends of the two series LC networks and the magnitude of the current amplitude in the two LC networks. When the phase shift angle increases, the output voltage decreases, and the current amplitude in the series LC network increases; on the contrary, the phase shift angle decreases, the output voltage increases, and the current amplitude in the series LC network decreases.

When the output is a constant voltage, the increase of the input voltage leads to the increase of the phase shift angle, so that the current amplitude in the series LC network increases, and the zero voltage turn-on (ZVS) of each MOSFET is realized. When the output voltage is constant and the load decreases, the phase shift angle increases, and the current amplitude in the LC network increases at this time, realizing zero-voltage turn-on (ZVS) of the MOSFET. ZVS can also be achieved when the phase-shifted full-bridge is light-loaded. When the output voltage changes and the output resistance is constant, when the output voltage is large, the phase shift angle decreases, and the current in the series LC network decreases. At this time, the converter realizes the zero-voltage turn-on (ZVS) of the MOSFET through the leakage inductance current of the transformer. . As the output voltage decreases, the output power also decreases, the phase shift angle increases, and the current amplitude of the series LC network increases. At this time, the soft switching of the MOSFET is realized by the current in the LC network.

Beneficial effect

The method of the invention can automatically adapt to different input voltages, output voltages and loads. The phase-shifted full-bridge converter obtained by the method of the invention can realize full-range soft switching, thereby improving the efficiency of the whole converter. It is suitable for conversion occasions from high-voltage input to low-voltage output, and can meet the conditions of wide input voltage range, wide output voltage range, and wide load change.

Description of drawings

Fig. 1 is the topological structure diagram of the input serial output parallel phase-shifting full-bridge converter that adds two LC networks in the specific embodiment;

Fig. 2 is the typical waveform of drive signal, transformer output voltage and current waveform, voltage and current at both ends of the LC network in the specific embodiment, wherein (a) when the output voltage is large or the input voltage is small, and the load power is large, the shift The voltage and current waveforms with small phase angles, (b) When the output voltage is small or the input voltage is large, and the output power is small, the phase shift angles are large voltage and current waveforms.

detailed description

The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

According to the method flow of the content of the invention, this specific embodiment proposes an input series output parallel phase shift full-bridge converter, including eight identical MOSFETs (metal oxide semiconductor field effect transistors) Q ₁ , Q ₂ , Q ₃ , Q ₄ , Q ₅ , Q ₆ , Q ₇ , Q ₈ , two identical LC networks (L _r1 and C _r1 , L _r2 and C _r2 ), two identical input capacitors C _d1 and C _d2 , two transformers T _r1 and T _r2 , two output filter inductors L _f1 and L _f2 , filter capacitor C _o and four rectifier diodes D ₁ , D ₂ , D ₃ , D ₄ .

The LC network consists of an inductor and a resistor connected in series. Q ₁ -Q ₈ are switching tubes. The two input capacitors C _d1 and C _d2 act as a voltage divider. The secondary side of the transformer is a rectification circuit (full-wave rectification with a mid-point tap for the transformer, or full-bridge rectification with one winding).

The connection relationship of the above components is: two input capacitors C _d1 and C _d2 are connected in parallel with the input voltage after they are connected in series. Each capacitor withstands a voltage equivalent to 1/2 of the input voltage. C _d1 is connected in parallel with the first phase-shifting full-bridge conversion module, and C _d2 is connected in parallel with the second phase-shifting full-bridge conversion module.

The composition and connection relationship of the first phase-shifting full-bridge conversion module is: the source of MOSFETQ ₁ is connected to the drain of MOSFETQ ₂ , the source of MOSFETQ ₃ is connected to the drain of MOSFETQ ₄ , Q ₁ , Q ₂ and Q ₃ , Q ₄ connected in parallel; the anode of the input voltage V _in is respectively connected to the drain of MOSFETQ ₁ and the drain of MOSFETQ ₃ , and the source of MOSFETQ ₂ and the source of MOSFETQ ₄ are connected to the low potential side of C _d1 . _The source of Q1 and the source of _Q3 are respectively connected to the two ends of the primary side of the transformer _Tr1 . The secondary side of the transformer T _r1 is two windings, the upper end of the two windings is the end of the same name; the end of the same name of the _first winding is connected to the anode of the diode D1, the end of the opposite name is connected to the end of the second winding of the same name, this connection The point is the midpoint tap of the secondary winding of the transformer T _r1 . The opposite end of the secondary winding of the transformer T _r1 is connected to the anode of the diode D ₂ . The cathodes of the diodes D1 and D2 are connected, and at the same time connected to one end of the inductor L _f1 .

The composition and connection relationship of the second phase-shifting full-bridge conversion module is: the source of MOSFETQ ₅ is connected to the drain of MOSFETQ ₆ , the source of _{MOSFETQ 7} is connected to the drain of _{MOSFETQ 8} , _Q5 , _Q6 and Q7, Q8 connected in parallel; the drain of MOSFETQ ₅ is connected to the drain of MOSFETQ ₇ and connected to the high potential side of C _d2 ; the source of MOSFETQ ₂ is connected to the source of MOSFETQ ₄ and connected to the negative pole of the input voltage V _in . _The source of _Q5 and the source of Q7 are respectively connected to the two ends of the primary side of the transformer _Tr2 . Transformer _Tr2 has the same transformation ratio as transformer _Tr1 . The secondary side of the transformer _Tr2 is two windings, the upper ends of the two windings are terminals with the same name, the same-named terminal of the first winding is connected to the anode of the diode _D3 , and the different-named terminal is the midpoint tap of the secondary winding of the transformer _Tr2 , and connect to the terminal of the same name of the second winding. The opposite end of the secondary winding of the transformer _Tr2 is connected to the anode of the diode D4 _{. The} cathodes of diodes _D3 and D4 are connected and connected to one end of inductor _Lf2 .

The other end of L _f1 and L _f2 is the positive pole of the output voltage, which is respectively connected to the filter capacitor C _o and the load resistor R _o . The filter capacitor C _o and the load resistance R _o are connected in parallel, and the other ends of C _o and R _o are respectively connected to the midpoint tap of the secondary winding of the transformer _Tr1 and the midpoint tap of the secondary winding of the transformer _Tr2 , which is the negative pole of the output voltage.

The capacitor C _r2 and the inductor L _r2 form a series LC network, the input terminal is connected to the source of MOSFETQ ₁ , and the output terminal is connected to the source of MOSFETQ ₇ .

The capacitor C _r1 and the inductor L _r1 form another series LC network, the input terminal is connected to the source of MOSFETQ ₃ , and the output terminal is connected to the source of MOSFETQ ₅ .

The capacitance value of the capacitor C _r1 is the same as that of the capacitor C _r2 ; the inductance value of the inductor L _r1 is the same as that of the inductor L _r2 . The positions of the inductors and capacitors can be interchanged.

In this embodiment, the topological structure of the input series output parallel phase-shifted full-bridge converter with two LC networks is shown in Fig. 1, and the rectification is illustrated by taking full-wave rectification as an example (full-bridge rectification can still be used). C _d1 and C _d2 are input voltage dividing capacitors, Q ₁ -Q ₈ are MOSFETs; C _j1 -C _j8 are junction capacitances of MOSFETs; T _r1 and T _r2 are isolation transformers; D ₁ -D ₄ are rectifier diodes, L _f1 and L _f2 is the output filter inductance. C _o is the output filter capacitor; R _o is the load resistance. L _r1 and L _r2 are the inductances of the series LC network, and C _r1 and C _r2 are the capacitances of the series LC network.

Figure 2 shows the driving logic waveforms of MOSFETQ ₁ -Q ₈ in the circuit, the transformer output voltage and current, the voltage at both ends of the series LC network and the current waveform flowing through the LC network. Among them, Figure 2(a) is a case of high duty cycle when the output voltage is large or input voltage is small, and the load power is large, and Figure 2(b) is small duty cycle when the output voltage is small or input voltage is large, and the output power is small. empty ratio situation.

The driving signals of the respective MOSFETs Q ₁ -Q ₈ satisfy the following relationship:

The driving signals of MOSFETQ ₁ and MOSFETQ ₆ are the same; the driving signals of MOSFETQ ₂ and MOSFETQ ₅ are the same; the above two groups of driving signals are PWM signals with a duty ratio of 0.5 and are complementary. This group of driving signals is defined as leading bridge arm driving signals. MOSFETQ ₁ and MOSFETQ ₂ form the leading bridge arm of the first phase-shifting full-bridge conversion module; MOSFETQ ₅ and MOSFETQ ₆ form the leading bridge arm of the second phase-shifting full-bridge conversion module.

The driving signals of MOSFETQ ₃ and MOSFETQ ₈ are the same; the driving signals of MOSFETQ ₄ and MOSFETQ ₇ are the same; the above two groups of driving signals are also PWM signals with a duty ratio of 0.5 and are complementary. This group of driving signals is defined as the lagging bridge arm driving signals. MOSFETQ ₃ and MOSFETQ ₄ form the lagging bridge arm of the first phase-shifting full-bridge conversion module; MOSFETQ ₇ and MOSFETQ ₈ form the lagging bridge arm of the second phase-shifting full-bridge converting module.

In Fig. 2, t ₀ to t ₈ are half-period working modes.

In the interval [t ₁ , t ₂ ], the lagging bridge arms Q ₃ and Q ₈ are turned off simultaneously. At this time, i _p1 and i _r1 resonate with C _j3 and C _j4 at the same time, and i _p2 and i _r2 resonate with C _j7 and C _j8 at the same time. At _t2 , the voltages of C _j3 and C _j8 are charged to V _in / ₂ , and the voltages of C _j4 and C _j7 are discharged to 0, at this time the body diodes of _Q4 and Q7 are turned on. When t ₃ , Q ₄ and Q ₇ zero-voltage turn-on (ZVS).

In the interval [t ₅ , t ₆ ], the leading bridge arm switches Q ₁ and Q ₆ are turned off, i _p1 and i _r2 resonate with C _j1 and C _j2 at the same time, and i _p2 and i _r1 resonate with C _j5 and C _j6 at the same time. _At t6, the voltages of C _j1 and C _j6 are charged to V _in /2, and the voltages of C _j2 and C _j5 are discharged to 0, at this time the body diodes of _Q2 and _Q5 are turned on. When t ₇ , _Q2 and _Q5 zero-voltage turn-on (ZVS). The mode of the switching tube in the other half cycle is similar to that in the first half cycle.

As shown in Fig. 2, the time between the rising edge of MOSFETQ ₁ and MOSFETQ ₆ driving signal to the rising edge of MOSFETQ ₄ and MOSFETQ ₇ driving signal is defined as the phase shift angle. The output voltage of the converter is controlled by the phase shift of the leading bridge arm drive signal and the lagging bridge arm drive signal; the phase shift angle also determines the action time of the voltage at both ends of the two LC networks, thus determining the two LC networks. The size of the current amplitude.

As the phase shift angle increases, the output voltage decreases; on the contrary, as the phase shift angle decreases, the output voltage increases. It can be seen from Figure 2 that as the phase shift angle increases, the current amplitude in the series LC network increases. On the contrary, the phase shift angle decreases, and the current amplitude in the series LC network decreases. When the output is a constant voltage, the increase of the input voltage leads to the increase of the phase shift angle, so that the current amplitude in the LC network increases, and the zero voltage turn-on (ZVS) of each MOSFET is easier to achieve. When the output voltage is constant and the load decreases, the phase shift angle will also increase. At this time, the current amplitude in the series LC network increases, which is also conducive to the zero voltage turn-on (ZVS) of the MOSFET. It is difficult to realize soft switching when the phase-shifting full bridge is light-loaded, so this invention can ensure that ZVS can also be realized when the phase-shifting full-bridge is light-loaded. When the output voltage changes and the output resistance is constant, when the output voltage increases, the phase shift angle decreases, and the current in the series LC network decreases. However, at this time, the converter can still realize the zero-voltage turn-on (ZVS) of the MOSFET through the leakage inductance current of the transformer. As the output voltage decreases, the output power also decreases, the phase shift angle increases, and the current amplitude of the series LC network increases. At this time, the soft switching of the MOSFET is realized by the current in the LC network. Therefore, the present invention can automatically adapt to different input voltages, output voltages and loads. The phase-shifted full-bridge converter obtained by the method of the invention can realize full-range soft switching.

Claims (4)

1. the gamut soft-switching process of input series and output parallel phase-shifted full-bridge converter, is characterized in that: specifically comprise the steps:

Step one, in the phase-shifted full-bridge converter comprising the first phase-shifting full-bridge conversion module and the second phase-shifting full-bridge conversion module, the input voltage series connection of the first phase-shifting full-bridge conversion module and the second phase-shifting full-bridge conversion module, output voltage is in parallel;

First phase-shifting full-bridge conversion module and the second phase-shifting full-bridge conversion module comprise eight switching tubes, pipe, lower pipe on the lagging leg being respectively the first phase-shifting full-bridge conversion module, pipe, lower pipe on the leading-bridge of the first phase-shifting full-bridge conversion module, pipe, lower pipe on the lagging leg of the second phase-shifting full-bridge conversion module, pipe, lower pipe on the leading-bridge of the second phase-shifting full-bridge conversion module;

Look for the mid point that the leading-bridge top tube and down tube of the first phase-shifting full-bridge conversion module connect;

Step 2, finds the mid point that the lagging leg top tube and down tube of the second phase-shifting full-bridge conversion module connect; The no-load voltage ratio of the isolating transformer that the second phase-shifting full-bridge conversion module comprises and the identical of the first phase-shifting full-bridge conversion module;

Step 3, an access series LC network between the mid point of the second phase-shifting full-bridge conversion module lagging leg top tube and down tube that the mid point of the leading-bridge top tube and down tube of the first phase-shifting full-bridge conversion module obtained in step one and step 2 obtain, described series LC network is formed by an inductance and a capacitances in series;

Step 4, finds the mid point that the first phase-shifting full-bridge conversion module lagging leg top tube and down tube connect;

Step 5, finds the mid point that the second phase-shifting full-bridge conversion module leading-bridge top tube and down tube connect;

Step 6, access another series LC network between the mid point of the leading-bridge top tube and down tube of the second phase-shifting full-bridge conversion module that the mid point of the first phase-shifting full-bridge conversion module lagging leg top tube and down tube obtained in step 4 and step 5 obtain, the inductance value of LC net inductive is identical with the capacitance of electric capacity with the inductance value of the LC net inductive in step 3 with the capacitance of electric capacity;

After adding two series LC network, eight switching tubes of the first phase-shifting full-bridge conversion module and the second phase-shifting full-bridge conversion module meet following sequential logic:

On the leading-bridge of the first phase-shifting full-bridge conversion module, pipe is identical with the gate drive signals of pipe under the second phase-shifting full-bridge conversion module leading-bridge; Under the leading-bridge of the first phase-shifting full-bridge conversion module, pipe is identical with the gate drive signals of pipe on the second phase-shifting full-bridge conversion module leading-bridge; On the leading-bridge of the first phase-shifting full-bridge conversion module pipe and the second phase-shifting full-bridge conversion module leading-bridge under pipe, the first phase-shifting full-bridge conversion module leading-bridge under pipe and the second phase-shifting full-bridge conversion module leading-bridge on pipe be leading-bridge drive singal, be respectively the pulse width modulating signal that duty ratio is 0.5, and complementary, there is dead band between two groups of drive singal;

On the lagging leg of the first phase-shifting full-bridge conversion module, pipe is identical with the gate drive signals of the lower pipe of the second phase-shifting full-bridge conversion module lagging leg; The lower pipe of the lagging leg of the first phase-shifting full-bridge conversion module is identical with the gate drive signals of the upper pipe of the second phase-shifting full-bridge conversion module lagging leg; On the lagging leg of the first phase-shifting full-bridge conversion module, pipe and the lower pipe of the second phase-shifting full-bridge conversion module lagging leg, the lower pipe of the lagging leg of the first phase-shifting full-bridge conversion module and the upper pipe of the second phase-shifting full-bridge conversion module lagging leg are lagging leg drive singal, be respectively the pulse width modulating signal that duty ratio is 0.5, and complementary, there is dead band between two groups of drive singal;

Step 7, on the first phase-shifting full-bridge conversion module leading-bridge pipe drive singal rising edge to pipe drive singal under the first phase-shifting full-bridge conversion module lagging leg rising edge between time be the size of phase shifting angle; Regulate phase shifting angle size, control the output voltage of phase-shifted full-bridge converter:

When exporting as constant voltage, input voltage raises and causes phase shifting angle to increase, and the current amplitude in series LC network increases, and the no-voltage realizing each phase-shifting full-bridge conversion module is open-minded; When output voltage is constant and load reduces, phase shifting angle increases, and the current amplitude in LC network increases, and the no-voltage realizing phase-shifted full-bridge converter is open-minded; During phase-shifted full-bridge converter underloading, also no-voltage can be realized open-minded; In output voltage change and the constant situation of output resistance, when output voltage is large, phase shifting angle reduces, and the electric current in series LC network reduces, and the no-voltage that transposition full-bridge converter realizes phase-shifted full-bridge converter by transformer leakage inductance electric current is open-minded; Along with output voltage reduces, power output also reduces, and phase shifting angle increases, and the current amplitude of series LC network increases, and realizes the Sofe Switch of phase-shifted full-bridge converter.

2. the gamut soft-switching process of input series and output parallel phase-shifted full-bridge converter according to claim 1, it is characterized in that: the input voltage of phase-shifted full-bridge converter, output voltage and load all can change, and the no-voltage realizing leading-bridge and lagging leg switching tube in excursion is open-minded.

3. the gamut soft-switching process of input series and output parallel phase-shifted full-bridge converter according to claim 1, is characterized in that: the position of inductance and electric capacity can exchange.

4. the gamut soft-switching process of input series and output parallel phase-shifted full-bridge converter according to claim 1, is characterized in that: the size of phase shifting angle determines the size of current amplitude in action time of two series LC network both end voltage and two LC networks.