CN103856014A - Sampling BOOST circuit with output protection - Google Patents
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- CN103856014A CN103856014A CN201210514607.2A CN201210514607A CN103856014A CN 103856014 A CN103856014 A CN 103856014A CN 201210514607 A CN201210514607 A CN 201210514607A CN 103856014 A CN103856014 A CN 103856014A
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Abstract
The invention provides a sampling BOOST circuit with output protection. The sampling BOOST circuit mainly solves the problems that an existing low-voltage new-energy power converter is high in power consumption, low in efficiency and poor in reliability. The sampling BOOST circuit with output protection has follow currents, namely PA is high electrical level, PB is low electrical level, so that P1, P2, P3 and P4 can generate trigger signals after or logic operation, M3 and M4 are connected, and due to the fact that the M3 and the M4 are small in resistance, power consumption generated in the follow current process is small. Moreover, boost output can lower line loss, for example, Ui=10 (V), after boost, Uo=50 (V), and the line loss is only one fifth that in the prior art according to the formula that P=U2/R. The sampling BOOST circuit can guarantee that when short circuit of the load happens, the BOOST output can be automatically adjusted, current-limiting output is achieved, and low power consumption is also guaranteed.
Description
Technical field
The present invention relates to a kind of BOOST circuit with output protection, belong to power supply switch technology field.
Background technology
In recent years, the renewable new energy resources system of the AC low-tensions such as photovoltaic generation, wind power generation, storage battery power supply, DC low-voltage power supply is widely used, and the power supplying efficiency, power supply quality, the power supply reliability that improve low pressure new energy system are imperative.
The basic employing of current power supply conversion known in this field:
1, exchange (AC) input, adopting full-wave rectifier is direct current (DC) power supply input AC (AC) power rectifier, then carries out DC/DC and be converted to direct current (DC) output.This kind of scheme solved the transfer problem of high-line input voltage AC power and small-power power.But in the time of the input of low-voltage AC power supply and large power supply conversion, because the voltage drop of AC/DC rectification circuit is higher, and produce very high power consumption, make power supply changeover device conversion efficiency very low.
2, direct current (DC) input, directly carries out DC/DC and is converted to direct current (DC) output.This kind of scheme solved permanent plant powerup issue.But dependability is lower, especially at mobility equipment, often need to reconnect the equipment of input power, once occur that electric power polarity connects anti-situation, will produce input short accident.Therefore the higher equipment of ask for something reliability, adds the directed rectification circuit of direct current at transducer input.In the time of the straight power supply input of low-voltage and large power supply conversion, higher because direct current is identified the voltage drop of directed rectification circuit, and produce very high power consumption, make power supply changeover device conversion efficiency very low.
3, for improve low-voltage power supply efficiency, reduce line current generally adopt boost type (BOOST) direct current (DC) supply power mode.Boost type (BOOST) direct current (DC) power supply produces short trouble when output, output voltage during lower than input voltage BOOST circuit function lost efficacy, input power is directly to load short circuits, it is very large that difficulty is controlled in large electric current (high-power) system short-circuit protection.
Describe as example being input as low pressure new forms of energy power supply take conventional rectification (identification directed) circuit, input voltage Ui=10V (AC, DC), input current Ii=20A, input power Pi=10 × 20=200W, rectification (identification is directed) circuit pressure drop Ud=2V, rectification (identification is directed) circuit consumption is: Pd=2 × 20=40W, power output Po=200-40=160W, its rectification (identification is directed) efficiency is: E=160/200=0.8, conventional rectification as can be seen here (identification is directed) circuit is in the time being input as low pressure new forms of energy power supply, power consumption is very large, and efficiency is very low.
Summary of the invention
The invention provides a kind of sampling BOOST circuit with output protection, mainly solved that existing low pressure new forms of energy power supply changeover device power consumption is high, efficiency is low, the problem of poor reliability.
Concrete technical solution of the present invention is as follows:
Should, with the sampling BOOST circuit of output protection, comprise load, the input of described load is connected with the output of input power by output protection circuit, energy storage filter circuit, reverse isolation circuit, VMOS control circuit, afterflow inductance successively; The output of described energy storage filter circuit is connected with the input of width modulation type pulse control circuit by output current sample circuit, the output of described input power is connected with the input of width modulation type pulse control circuit by input current sample circuit, the output of width modulation type pulse control circuit by driving signal synthesis circuit to be connected with the input of VMOS switching circuit with VMOS switch driving circuit, drives the input of signal synthesis circuit to be connected with the output of VMOS switching circuit by afterflow voltage sampling circuit successively; Described width modulation type pulse control circuit, driving signal synthesis circuit, VMOS switch driving circuit and afterflow voltage sampling circuit composition control circuit;
Described afterflow inductance is arranged on the symmetrical inductance of differential mode on input power output negative terminal; Described driving signal synthesis circuit is that standard two is inputted or gate control chip, and this control chip comprises four couples of input A1, A2, B1, B2, C1, C2, D1, D2 and corresponding four output terminals A o, Bo, Co, Do, wherein input A1, B1, C1, D1 is connected with two outputs of width modulation type pulse control circuit, input A2, B2, C2, D2 is connected with two outputs of afterflow voltage sampling circuit, and output terminals A o, Bo, Co, Do are connected with the input of VMOS switch driving circuit;
Described output current sample circuit comprises current sensor CS2, capacitor C 9 and diode D5, a current sensor CS2 and diode D5 branch road in series, capacitor C 9 and this branch circuit parallel connection; Described afterflow voltage sampling circuit comprises by voltage stabilizing didoe Z3, filter capacitor C11, divider resistance R3, the output sample circuit of R4 composition and by voltage stabilizing didoe Z4, filter capacitor C12, divider resistance R1, the input sampling circuit of R5 composition, the output of described output sample circuit is the node between R4 and R3, this node is connected with an interface that drives signal synthesis circuit input, the output of input sampling circuit is the node between R1 and R5, and this node is connected with another interface that drives signal synthesis circuit input; Described reverse isolation circuit adopts common cathode diode;
Described output protection circuit comprises reference voltage source, comparator A, comparator B, triode N1 and voltage-stabiliser tube Z5; The input termination BOOST VD of this output safety control circuit, the load of output termination, on the major loop at described input and output place, series connection is provided with VMOS pipe M5 and current-limiting resistance R24, wherein, the base stage of VMOS pipe M5 is connected to the negative terminal of described output through triode N1, the base stage of triode N1 is connected to described reference voltage source; Described output is parallel with a filter capacitor and a feedback branch, is in series with successively divider resistance R14 and RC circuit on this feedback branch;
The normal phase input end of comparator A accesses this feedback branch, be connected to the anode of described output through divider resistance R14, the negative-phase input of comparator A connects reference voltage, and the output of comparator A is connected to the negative terminal of described input successively through resistance R 13, resistance R 27, the resistance R 22 of series connection;
The series arm at normal phase input end access resistance R 13, resistance R 27 and resistance R 22 places of comparator B, its access node is between resistance R 27 and resistance R 22; The negative-phase input of comparator B is connected to the negative terminal of described output through resistance R 6; The output of comparator B is connected to the base stage of triode N1.
The invention has the advantages that:
Sampling BOOST circuit with output protection provided by the invention has XC/DC expansion (XC) shape, nonpolarity, many waveforms, the input of broadband power supply; DC (direct current) output, the advantages such as auto polarity identification orientation, high conversion efficiency, High Power Factor, high reliability, high power density, low cost.
Added output protection circuit can guarantee that BOOST output automatically adjusts in the time of load short circuits, and current limliting output, still guarantees low-power consumption simultaneously.Accompanying drawing explanation
Fig. 1 is schematic block circuit diagram of the present invention;
Fig. 2 is electrical block diagram of the present invention;
Fig. 3 is that input power is the monocycle oscillogram of Ac when sinusoidal wave.
Fig. 4 is the structural representation of output protection circuit of the present invention.
Embodiment
Should, with the sampling BOOST circuit of output protection, comprise load, the input of described load is connected with the output of input power by energy storage filter circuit, reverse isolation circuit, VMOS control circuit, afterflow inductance successively; The output of described energy storage filter circuit is connected with the input of width modulation type pulse control circuit by output current sample circuit, the output of described input power is connected with the input of width modulation type pulse control circuit by input current sample circuit, the output of width modulation type pulse control circuit by driving signal synthesis circuit to be connected with the input of VMOS switching circuit with VMOS switch driving circuit, drives the input of signal synthesis circuit to be connected with the output of VMOS switching circuit by afterflow voltage sampling circuit successively; Described width modulation type pulse control circuit, driving signal synthesis circuit, VMOS switch driving circuit and afterflow voltage sampling circuit composition control circuit;
Afterflow inductance is arranged on the symmetrical inductance of differential mode on input power output negative terminal; Described driving signal synthesis circuit is that standard two is inputted or gate control chip, and this control chip comprises four couples of input A1, A2, B1, B2, C1, C2, D1, D2 and corresponding four output terminals A o, Bo, Co, Do, wherein input A1, B1, C1, D1 is connected with two outputs of width modulation type pulse control circuit, input A2, B2, C2, D2 is connected with two outputs of afterflow voltage sampling circuit, and output terminals A o, Bo, Co, Do are connected with the input of VMOS switch driving circuit;
Output current sample circuit comprises current sensor CS2, capacitor C 9 and diode D5, a current sensor CS2 and diode D5 branch road in series, capacitor C 9 and this branch circuit parallel connection; Afterflow voltage sampling circuit comprises by voltage stabilizing didoe Z3, filter capacitor C11, divider resistance R3, the output sample circuit of R4 composition and by voltage stabilizing didoe Z4, filter capacitor C12, divider resistance R1, the input sampling circuit of R5 composition, the output of described output sample circuit is the node between R4 and R3, this node is connected with an interface that drives signal synthesis circuit input, the output of input sampling circuit is the node between R1 and R5, and this node is connected with another interface that drives signal synthesis circuit input; Reverse isolation circuit adopts common cathode diode.
Below the function of each Important Circuit is described:
Afterflow inductance: utilize inductance characteristic to boost to input power;
VMOS switching circuit: VMOS switching circuit conduction period, have electric current to pass through in afterflow inductance; VMOS switching circuit blocking interval, freewheeling circuit conducting, makes electric current in afterflow inductance continue conducting, produces high pressure, and energy storage filter circuit is charged, and after charging, by energy storage filter circuit, load is powered;
Energy storage filter circuit: VMOS switching circuit blocking interval charging to load supplying;
VMOS switch driving circuit: the VMOS switching signal and the VMOS afterflow signal that drive signal synthesis circuit to generate are amplified to processing;
Drive signal synthesis circuit: the PWM width modulation type pulse signal that width modulation type pulse control circuit is generated, alternating current-direct current signal, both positive and negative polarity signal or afterflow signal and the power supply signal of voltage sampling circuit input synthesize, and generate composite signal (comprising polarity, interchange, direct current, tune bandwidth signals); Then automatically distribute according to composite signal, divide into VMOS switching signal and VMOS afterflow signal;
Width modulation type pulse control circuit: generate PWM width modulation type pulse signal according to the current sampling signal of input sampling circuit and/or the input of output sample circuit;
Afterflow voltage sampling circuit: the current signal to VMOS switching circuit and freewheeling circuit is sampled, produces alternating current-direct current signal, both positive and negative polarity signal or afterflow signal, and above-mentioned signal is inputed to driving signal synthesis circuit;
Input current sample circuit: input is sampled through the electric current of afterflow inductance to input power, generates sampled signal and sampled signal is offered to width modulation type pulse control circuit and process;
Below in conjunction with accompanying drawing, the present invention is described in detail:
IC1 (UCC28084 or other similar device), for standard both-end is alternately exported PWM controller, controls PWM by device 1 end (OC) and adjusts wide output, output alternative P WM waveform P1, P2.
R1, R5, C12, Z4 detect shaping to afterflow waveform PA, form waveform P3.Wherein, voltage-stabiliser tube Z4 keeps the voltage stabilization of P3, and capacitor C 12, in order to filtering, makes can make P3 to continue high level in the time that high level appears in PA.
R4, R3, C11, Z3 detect shaping to afterflow waveform PB, form waveform P4.Wherein, voltage-stabiliser tube Z3 keeps the voltage stabilization of P4, and capacitor C 11, in order to filtering, makes can make P4 to continue high level in the time that high level appears in PB.
IC2 (CD4071 or other similar device), for standard 2 is inputted or door, wherein: Ao=A1+A2, Bo=B1+B2, Co=C1+C2, Do=D1+D2, carry out the synthetic rear staggered output pwm waveform that forms of logic to P1, P2, P3, P4.
IC3, IC4 (IR442 or other similar device), be standard drive, wherein: Ao=Ai, Bo=Bi, VMOS is carried out to high speed large driven current density, improve conversion efficiency to reduce VMOS switch power consumption.
C7, C8, C9 are mainly used in further eliminating noise (burst pulse).
The LDC of L1, D3, C14 composition BOOST booster circuit, in order to adapt to the asymmetry of input power, such as unipolarity direct current, unipolarity square wave, unipolarity triangular wave etc., L1 adopts differential mode symmetrical expression, also can only inductance be set as L1 at anode or the negative terminal of input circuit.
Ao port and the Bo port of pwm control circuit (IC1) are alternately exported control signal P1, P2, and total maintenance an interval time for afterflow (corresponding to the high level of PA waveform) between P1, P2.P3, P4 are by the PA in input circuit, PB waveform dividing potential drop gained.The input port of P1, P2, P3, P4 access triggering signal combiner circuit (IC2), carries out after foregoing or logical operation, then drives triggering signal is added to respectively to two VMOS switching circuit groups (M1, M2 through switch driver IC3, IC4 respectively; M3, M4), D3 has two inputs, is connected to respectively anode and the negative terminal of input circuit, and forward current charges to C14 through reverse isolation circuit D3.
M1 alternation in parallel with M2, M3 alternation in parallel with M4 (each VMOS switch itself has diode in parallel with it).
Just lower negative on the positive half cycle of waveform or input direct-current are at input AC, when one of the control signal P1 of pwm control circuit (IC1) output and P2 are during in high level, this XC/DC automatic orientation BOOST circuit is in PWM conducting state, electric current from anode flow through successively first group of VMOS switching circuit group (M1, M2), second group of VMOS switching circuit group (M3, M4), then flows back to negative terminal in input circuit; Because D3 plays reverse isolation effect, the energy storage on C14 can reverse flow not be fed back into loop.
In the time that control signal P1, the P2 of pwm control circuit (IC1) output are low level, on M1, M2, there is no triggering signal, therefore M1, not conducting of M2, but due to the existence of afterflow inductance L 1, and the diode in M3, M4 can form the conducting loop of certainly holding to input circuit negative terminal, thereby the afterflow producing because of afterflow inductance in circuit is charged to C14 through D3 from the anode of input circuit, and via load, second group of VMOS switching circuit group (M3, M4) of output loop, then flow back to negative terminal simultaneously.In fact,, once there is above-mentioned afterflow in circuit, PA is that high level, PB are low level, thereby P1, P2, P3, P4 are carried out or logical operation after produce triggering signal, make M3, M4 conducting, because the resistance of M3, M4 is very little, therefore the power consumption, producing in afterflow process is still very little.And the output itself of boosting can reduce line loss.Such as, Ui=10 (V), Uo=50 after boosting (V), according to P=U
2/ R is known, and line loss is only original 1/5.
Illustrate low-power consumption of the present invention: in circuit, adopt R
dS=0.001 Ω low on-resistance N raceway groove VMOS pipe, the staggered conducting of M1, M2 during PWM opens, VMOS conducting resistance R
dS=0.001 Ω, the two-tube paralleling and interleaving conducting of M3, M4, VMOS conducting resistance R
dS=0.001 Ω/2=0.0005 Ω, if still input 20A electric current, conducting voltage is: U1=0.001 × 20=0.02V, U2=0.0005 × 20=0.01V,, identify directed power consumption and be: Pe=20 × (0.02+0.01)=0.6W; End shutoff at PWM blocking interval M1, M2, the two-tube paralleling and interleaving conducting of M3, M4 afterflow, VMOS conducting resistance R
dS=0.001 Ω/2=0.0005 Ω, if 20A freewheel current, conducting voltage is: U2=0.0005 × 20=0.01V, identifies directed power consumption and is: Pe=20 × 0.01=0.2W.The power consumption that compares to the rectification identification directional circuit 40W of prior art, XC/DC of the present invention automatically identifies directed BOOST circuit power consumption and significantly reduces.
If reverse isolation circuit D3 also adopts synchronous VMOS switching circuit (synchronous waveform of its triggering signal and PA and PB), can utilize the characteristic that VMOS switching circuit resistance is little further to reduce line loss.Especially in the time that BOOST output is lower, the raising of conversion efficiency is more remarkable.
VMOS switch is under triggering signal effect, can realize conducting forward or backwards according to institute's making alive polarity, based on this characteristic, in input AC negative lower timing on waveform negative half period or input direct-current are, the course of work of this XC/DC automatic orientation BOOST circuit and above-mentioned conducting, afterflow Principle of Process are identical, and because first group of VMOS switching circuit group (M1, M2) and second group of VMOS switching circuit group (M3, M4) adopt symmetric circuit structure, be completely reversibility in the VMOS conducting of Ui negative half period and afterflow.Such as, in the time that control signal P1, the P2 of pwm control circuit (IC1) output are low level, on M3, M4, there is no triggering signal, therefore M3, not conducting of M4, and realize afterflow process by first group of VMOS switching circuit group (M1, M2).
Visible, this BOOST circuit can complete the automatic identification orientation to bipolar power supply (exchanging just profound ripple, square wave, triangular wave, AC power frequency, intermediate frequency, low frequency, ultralow frequency) automatically; And automatic identification orientation to unipolarity power supply (direct current, direct current square wave, direct current triangular wave etc.), exchanging bipolar power supply and direct current unipolarity power supply can be regardless of positive and negative any access.
In addition, the output safety control circuit adding before load, comprises reference voltage source, comparator A, comparator B, triode N1 and voltage-stabiliser tube Z5; The input termination BOOST VD of this output safety control circuit, the load of output termination, on the major loop at described input and output place, series connection is provided with VMOS pipe M5 and current-limiting resistance R24, wherein, the base stage of VMOS pipe M5 is connected to the negative terminal of described output through triode N1, the base stage of triode N1 is connected to described reference voltage source; Described output is parallel with a filter capacitor and a feedback branch, is in series with successively divider resistance R14 and RC circuit on this feedback branch;
The normal phase input end of comparator A accesses this feedback branch, be connected to the anode of described output through divider resistance R14, the negative-phase input of comparator A connects reference voltage, and the output of comparator A is connected to the negative terminal of described input successively through resistance R 13, resistance R 27, the resistance R 22 of series connection;
The series arm at normal phase input end access resistance R 13, resistance R 27 and resistance R 22 places of comparator B, its access node is between resistance R 27 and resistance R 22; The negative-phase input of comparator B is connected to the negative terminal of described output through resistance R 6; The output of comparator B is connected to the base stage of triode N1.
Between the VMOS pipe base stage of M5 and the drain electrode of triode N1, draw the source electrode of a branch road to VMOS pipe M5, on this branch road, be provided with voltage-stabiliser tube Z1.
Described reference voltage is by providing with the source-series 2.5V voltage-stabiliser tube of described reference voltage.
The access node of the normal phase input end of comparator B is also connected to the negative terminal of described output by filter capacitor.
Comparator A and comparator B form a two encapsulation comparator.
This couple of preferred LH2903 of encapsulation comparator, LM2903 or other similar device.
IC5 is standard high-speed comparator circuit (dual comparator), and comparator B, N1, M5 form constant-current control circuit.B-terminal voltage V3=0V, B+ terminal voltage is:
V2=R22×V1/(R22+R27)-Us
In above formula, Us=Is × Rs=Is × R24
V1 voltage is controlled by comparator A, A-terminal voltage VR=2.5V, and A+ terminal voltage is:
VL=UL×R7/(R7+R14)=RL×Is。
1, current-limited startup
When circuit start (powering on), VL ﹤ 2.5V, comparator A output is low, R13 access dividing potential drop.
Wherein: R13 ﹤ ﹤ R25, R13 ﹤ ﹤ R27, VR=2.5V;
V1≈VR×R13/(R13+R25)=2.5×R13/(R13+R25)
V2=R22×V1/(R22+R27)-Us=R22×(2.5×R13/(R13+R25))/(R22+R27)-Us
=2.5×R22×R13/((R13+R25)(R22+R27))-Is×Rs
If: c1=2.5 × R22 × R13/ ((R13+R25) (R22+R27))
That is: V2=c1-Rs × Is
In the time of V2=c1-Rs × Is≤0, comparator B, N1, the output of M5 current limliting, cut-off current is: Is=c1/Rs.
Can guarantee that BOOST output starts with current limliting (Is=c1/Rs).
VL=UL×R7/(R7+R14)=RL×Is=c?1×RL/Rs
Therefore, only need to configure corresponding resistance, while making BOOST load impedance less (short circuit), VL ﹤ 2.5V, is operated under safe limited current state.Such as, according to Is=c1/Rs, Is is set between routine value 1/4-1/10.
2, operating conventional current limliting
Comparator A output high (open circuit) in the time of BOOST load impedance fault-free VL≤2.5V, R13 departs from dividing potential drop, V2=2.5 × R22/ (R22+R27+R25)-Us;
If: c2=2.5 × R22/ (R22+R27+R25)
That is: V2=c2-Rs × IL
In the time of V2=c2-Rs × IL≤0, comparator B, N1, the output of M5 current limliting, cut-off current is: IL=c2/Rs,
Can guarantee that BOOST output works with current limliting (IL=c2/Rs).
Therefore, only need to configure corresponding resistance, make IL be greater than running current, and VMOS is limited in the safe range of electric current, power.Conventionally, IL is set between 1.1 times to 1.5 times of conventional value.
3, the low-power consumption of normal work
When the normal work of BOOST output, output current is less than IL, and comparator (A, B) is exported high (open circuit), and P raceway groove VMOS (M5) is operated in ultralow conducting resistance (R
dS=0.005 Ω) under state.
For example: power output 200W output voltage 50V, output current is: Io=200/50=4A,
The upper pressure drop of VMOS (M5) is: 4 × 0.005=0.02,
VMOS (M5) controls power consumption: Pe=0.02 × 4=0.08W, can find out, and the control power consumption while normally operation is very low.
4, short-circuit protection
If if there is the faults such as output short-circuit in BOOST circuit working process, cause VL ﹤ 2.5V, comparator A output is low, make comparator B, N1, M5 current limliting output (referring to aforementioned the 1st kind of situation), circuit reenters clean boot (Is) state, when after Failure elimination, BOOST recovers normal output automatically.
Above-described embodiment is most preferred embodiment of the present invention, adopts this staggered PWM control mode to make M1, the M2 conducting that interlocks, and each VMOS switch frequency is 1/2 channel frequency, can make VMOS switch work compared with under low switching frequency, significantly reduces switch power consumption; Correspondingly, in circuit, the operating frequency of L, C device is 2 times of VMOS pipe frequencies, and higher circuit work frequency has reduced the requirement to inductance in lc circuit (L) amount and electric capacity (C), has reduced cost and technology difficulty.In fact,, based on the basic principle of conducting of the present invention, afterflow, also can consider that each VMOS switching circuit group only adopts a VMOS switch, is also enough to embody technique effect of the present invention.Such as only retaining M1, M3, equally also can be just lower when negative on the positive half cycle of waveform or input direct-current are at input AC, realize conducting loop by M1, M3, realize continuous current circuit by M3; In input AC negative lower timing on waveform negative half period or input direct-current are, realize conducting loop by M1, M3, realize continuous current circuit by M1.Certainly, under this scheme, also can attempt allowing the operating frequency of each VMOS switch reduce by half, but this just need to increase afterflow inductance, storage capacitor exponentially, to meet the requirement of afterflow, thereby cause that cost is higher, components and parts volume is large, power density reduces.
Claims (1)
1. the sampling BOOST circuit with output protection, it is characterized in that: comprise load, the input of described load is connected with the output of input power by output protection circuit, energy storage filter circuit, reverse isolation circuit, VMOS control circuit, afterflow inductance successively; The output of described energy storage filter circuit is connected with the input of width modulation type pulse control circuit by output current sample circuit, the output of described input power is connected with the input of width modulation type pulse control circuit by input current sample circuit, the output of width modulation type pulse control circuit by driving signal synthesis circuit to be connected with the input of VMOS switching circuit with VMOS switch driving circuit, drives the input of signal synthesis circuit to be connected with the output of VMOS switching circuit by afterflow voltage sampling circuit successively; Described width modulation type pulse control circuit, driving signal synthesis circuit, VMOS switch driving circuit and afterflow voltage sampling circuit composition control circuit;
Described afterflow inductance is arranged on the symmetrical inductance of differential mode on input power output negative terminal; Described driving signal synthesis circuit is that standard two is inputted or gate control chip, and this control chip comprises four couples of input A1, A2, B1, B2, C1, C2, D1, D2 and corresponding four output terminals A o, Bo, Co, Do, wherein input A1, B1, C1, D1 is connected with two outputs of width modulation type pulse control circuit, input A2, B2, C2, D2 is connected with two outputs of afterflow voltage sampling circuit, and output terminals A o, Bo, Co, Do are connected with the input of VMOS switch driving circuit;
Described output current sample circuit comprises current sensor CS2, capacitor C 9 and diode D5, a current sensor CS2 and diode D5 branch road in series, capacitor C 9 and this branch circuit parallel connection; Described afterflow voltage sampling circuit comprises by voltage stabilizing didoe Z3, filter capacitor C11, divider resistance R3, the output sample circuit of R4 composition and by voltage stabilizing didoe Z4, filter capacitor C12, divider resistance R1, the input sampling circuit of R5 composition, the output of described output sample circuit is the node between R4 and R3, this node is connected with an interface that drives signal synthesis circuit input, the output of input sampling circuit is the node between R1 and R5, and this node is connected with another interface that drives signal synthesis circuit input; Described reverse isolation circuit adopts common cathode diode;
Described output protection circuit comprises reference voltage source, comparator A, comparator B, triode N1 and voltage-stabiliser tube Z5; The input termination BOOST VD of this output safety control circuit, the load of output termination, on the major loop at described input and output place, series connection is provided with VMOS pipe M5 and current-limiting resistance R24, wherein, the base stage of VMOS pipe M5 is connected to the negative terminal of described output through triode N1, the base stage of triode N1 is connected to described reference voltage source; Described output is parallel with a filter capacitor and a feedback branch, is in series with successively divider resistance R14 and RC circuit on this feedback branch;
The normal phase input end of comparator A accesses this feedback branch, be connected to the anode of described output through divider resistance R14, the negative-phase input of comparator A connects reference voltage, and the output of comparator A is connected to the negative terminal of described input successively through resistance R 13, resistance R 27, the resistance R 22 of series connection;
The series arm at normal phase input end access resistance R 13, resistance R 27 and resistance R 22 places of comparator B, its access node is between resistance R 27 and resistance R 22; The negative-phase input of comparator B is connected to the negative terminal of described output through resistance R 6; The output of comparator B is connected to the base stage of triode N1.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110048602A (en) * | 2019-04-28 | 2019-07-23 | 西安拓尔微电子有限责任公司 | A kind of DC-DC BOOST self-charging circuit |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110048602A (en) * | 2019-04-28 | 2019-07-23 | 西安拓尔微电子有限责任公司 | A kind of DC-DC BOOST self-charging circuit |
CN110048602B (en) * | 2019-04-28 | 2024-02-13 | 拓尔微电子股份有限公司 | DC-DC BOOST self-charging circuit |
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Application publication date: 20140611 |