CN103853226B - Constant current generating circuit and a fixed current generation method - Google Patents

Constant current generating circuit and a fixed current generation method Download PDF

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Publication number
CN103853226B
CN103853226B CN 201210508870 CN201210508870A CN103853226B CN 103853226 B CN103853226 B CN 103853226B CN 201210508870 CN201210508870 CN 201210508870 CN 201210508870 A CN201210508870 A CN 201210508870A CN 103853226 B CN103853226 B CN 103853226B
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CN 201210508870
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CN103853226A (en )
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吴健铭
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瑞昱半导体股份有限公司
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Abstract

本发明公开了一种固定电流产生电路及相关的固定电流产生方法,应用于一芯片中,其中该芯片包含有一第一电流产生电路以及一第二电流产生电路,该第二电流产生电路包含有一晶体管以及一可调电阻,该固定电流产生方法包含有:将一外部电阻连接至该第一电流产生电路,以使得该第一电流产生电路使用该外部电阻来产生一第一电流;使用该第二电流产生电路来产生一第二电流;依据该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流实质上等于该第一电流,且该第二电流作为该芯片内所使用的一固定电流。 The present invention discloses a constant current generation circuit and the associated fixed current generation method applied to a chip, wherein the chip comprises a first current generating circuit and a second current generating circuit, the second current generating circuit comprises a a variable resistor and a transistor, the constant current generating method comprising: connecting an external resistor to said first current generating circuit to generate a first current such that a first current circuit used to generate the external resistor; the use of second current generating circuit to generate a second current; adjusting the resistance value of the variable resistor according to the first current and the second current such that the second current is substantially equal to the first current and the second current as a constant current is used within the chip.

Description

固定电流产生电路及固定电流产生方法 Constant current generating circuit and a fixed current generation method

技术领域 FIELD

[0001]本发明有关于一种固定电流产生电路,尤指一种使用芯片内部校正过后的电阻来产生固定电流的固定电流产生电路及相关的固定电流产生方法。 Invention has [0001] The present relates to a constant current generating circuit, particularly to a chip resistor after the correction is used to generate a fixed current constant current generation circuit and the associated fixed current generation method.

背景技术 Background technique

[0002]在芯片内部一般都会需要一个精准电流源,以提供一个固定的电流供元件使用,然而,因为芯片内部的电阻值可能无法作到很准确,因此精准电流源的实现的方式通常是使用一能带隙电压(bandgap voltage)加上一外部电阻来产生。 [0002] In the chip usually require a precision current source to provide a constant current element for use, however, because the value of the internal resistance of the chip may not be done very accurately, the precise manner and therefore the current source is generally used a bandgap voltage (bandgap voltage) plus an external resistor to produce. 如上所述,由于需要一个额外的外部电阻,因此会造成芯片相关设计上增加额外的成本。 As described above, since the need for an additional external resistor, thus giving additional cost related to the on-chip design.

发明内容 SUMMARY

[0003]因此,本发明的目的之一在于提供一种固定电流产生电路与相关的固定电流产生方法,其可以使用芯片内部校正过后的电阻来产生固定电流,且不需要额外的校正电路,以解决上述的问题。 [0003] Accordingly, an object of the present invention is to provide a constant current generating circuit associated with the fixed current generation method, which can be used after the chip resistor to generate a correction constant current, and no additional correction circuit, to to solve the problem.

[0004]依据本发明一实施例,一种设置于一芯片内的固定电流产生电路包含有一第一电流产生电路、一第二电流产生电路、一电流镜、一开关模块以及一校正电路,其中该第一电流产生电路包含有一第一晶体管,其中该第一晶体管耦接于该芯片的一接点,且于一芯片测试阶段时,该接点用来连接一外部电阻以供该第一电流产生电路产生一第一电流;该第二电流产生电路包含有一第二晶体管以及一可调电阻,且用来产生一第二电流;该开关模块耦接于该第一电流产生电路、该第二电流产生电路与该电流镜之间,且用以选择性地将该第一电流产生电路与该第二电流产生电路连接至该电流镜,以使得该电流镜复制该第一电流或是该第二电流;该校正电路耦接于该电流镜,且用以依据该电流镜所复制的该第一电流以及该第二电流来调整该可调电阻的电阻值,以使 [0004] wherein the generating circuit comprises a first current generating circuit, a second current generating circuit, a current mirror, a switch module and a correction circuit, according to a fixed current embodiment of the present invention, a chip disposed in a the first current generating circuit comprises a first transistor, wherein the first transistor is coupled to a contact of the chip and the chip at the time of a test phase, the contacts for connecting an external resistor for the first current generating circuit generating a first current; the second current generating circuit comprises a second transistor and a variable resistor, and for generating a second current; the switching module coupled to the first current generating circuit, the second current generating between the current mirror circuit, and for selectively generating the first current and the second current generating circuit is connected to the current mirror circuit, so that the current mirror copy of the first current or the second current ; correcting circuit coupled to the current mirror, and configured to adjust the resistance value of the variable resistor according to the current of the first current mirror and replicated second current, so that 该第二电流实质上等于该第一电流,且该第二电流作为该芯片内所使用的一固定电流。 The second current is substantially equal to the first current and the second current as a stationary current in the chip is used.

[0005]依据本发明另一实施例,揭示一种应用于一芯片中的固定电流产生方法,其中该芯片包含有一第一电流产生电路以及一第二电流产生电路,该第二电流产生电路包含有一晶体管以及一可调电阻,该固定电流产生方法包含有:将一外部电阻连接至该第一电流产生电路,以使得该第一电流产生电路使用该外部电阻来产生一第一电流;使用该第二电流产生电路来产生一第二电流;依据该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流实质上等于该第一电流,且该第二电流作为该芯片内所使用的一固定电流。 [0005] According to another embodiment of the present invention, discloses a chip is applied to a fixed current generation method, wherein the chip comprises a first current generating circuit and a second current generating circuit, the second current generating circuit comprises a variable resistor and a transistor, the constant current generating method comprising: connecting an external resistor to said first current generating circuit to generate a first current such that a first current circuit used to generate the external resistor; the use of second current generating circuit to generate a second current; adjusting the resistance value of the variable resistor according to the first current and the second current such that the second current is substantially equal to the first current and the second a constant current as the current use of the chip.

附图说明 BRIEF DESCRIPTION

[0006]图1为依据本发明一实施例的一固定电流产生电路的示意图。 [0006] FIG. 1 is a schematic diagram of a circuit generating a constant current in accordance with an embodiment of the present invention.

[0007]图2为在一芯片测试阶段时固定电流产生电路产生第一电流及相对应的第一数字码的示意图。 [0007] FIG. 2 is a schematic circuit diagram of a first constant current generating a first digital code and the corresponding current is generated when a chip testing.

[0008]图3为在一芯片测试阶段时固定电流产生电路产生第二电流及相对应的第二数字码的示意图。 [0008] FIG. 3 is a circuit diagram of a second constant current generating a second digital code corresponding to the current and a chip generated at the time of testing.

[0009]图4为依据本发明一实施例的固定电流产生方法的流程图。 [0009] FIG 4 is a flowchart of a method of generating a constant current based on the embodiment of the present invention.

[0010] 其中,附图标记说明如下: [0010] wherein reference numerals as follows:

[0011] 100 固定电流产生电路 [0011] The current generating circuit 100 is fixed

[0012] 102 运算放大器 [0012] 102 operational amplifier

[0013] HO 第一电流产生电路 [0013] HO first current generating circuit

[0014] 120 第二电流产生电路 [0014] The second current generating circuit 120

[0015] 130 电流镜 [0015] Current mirror 130

[0016] 140 校正电路 [0016] The correction circuit 140

[0017] 142 发送电路 [0017] The transmitting circuit 142

[0018] 144 接收电路 [0018] The reception circuit 144

[0019] 146 数字信号处理器 [0019] The digital signal processor 146

[0020] 148 电子保险丝[0021 ] M1、M2 晶体管 [0020] 148 electrical fuse [0021] M1, M2 transistor

[0022] Rext 外部电阻 [0022] Rext external resistor

[0023] Re 可调电阻 [0023] Re adjustable resistor

[0024] SW1_1、SW1_2、SW2_1、SW2_2 开关 [0024] SW1_1, SW1_2, SW2_1, SW2_2 switch

[0025] NU N2 端点 [0025] NU N2 endpoint

[0026] 400-406 步骤 [0026] Step 400-406

具体实施方式 detailed description

[0027]在说明书及后续的申请专利权利要求范围当中使用了某些词汇来指称特定的元件。 [0027] Certain terms are used throughout the description and following claims the patent scope of the claims to refer to particular elements. 所属领域中技术人员应可理解,硬件制造商可能会用不同的名词来称呼同一个元件。 Those skilled in the art will appreciate, electronic equipment manufacturers may use different names to refer to the same elements. 本说明书及后续的申请专利权利要求范围并不以名称的差异来作为区分元件的方式,而是以元件在功能上的差异来作为区分的准则。 The scope of the following description and patent claims are not to differ in name as a way to distinguish one element, but rather the difference in function element as a criterion to distinguish. 在通篇说明书及后续的请求项当中所提及的“包含”为一开放式的用语,故应解释成“包含但不限定于”。 Mentioned in the following description and claims, the terms "comprises" is an open-ended fashion, and thus should be interpreted to mean "including, but not limited to." 此外,“耦接”一词在此包含任何直接及间接的电气连接手段,因此,若文中描述一第一装置耦接于一第二装置,则代表该第一装置可直接电气连接于该第二装置,或者通过其他装置或连接手段间接地电气连接至该第一駐罟 Furthermore, "coupled" are intended to mean either an indirect or direct electrical connection, therefore, described herein, if a first device couples to a second device, the first device may represents a direct electrical connection to the first second means, coupled to the first or through other means or Picnic in indirect electrical connection

~目.ο ~ Head .ο

[0028]请参考图1,图1为依据本发明一实施例的一固定电流产生电路100的示意图。 [0028] Please refer to FIG 1, FIG. 1 is a schematic circuit 100 generates a fixed current according to an embodiment of the present invention. 如图1所示,固定电流产生电路100用来产生一固定电流Ic,且包含有一运算放大器102、一第一电流产生电路110、一第二电流产生电路120、一电流镜130、一开关模块(于本实施例中,开关模块包含了开关SW1_1、SW1_2、SW1_3、SW1_4)以及一校正电路140,其中第一电流产生电路110包含有一晶体管Ml,第二电流产生电路120包含有一晶体管M2以及一可调电阻Re,校正电路140包含有一发送电路142、一接收电路144以及一数字信号处理器146,其中数字信号处理器146中包含多个电子保险丝(Electrical fuse,Efuse)148。 1, the fixed current generator 120, a current mirror 130, a circuit switch module 100 for generating a constant current Ic, and includes an operational amplifier 102, a first current generating circuit 110, a second current generating circuit (in this embodiment, the switch module comprising a switch SW1_1, SW1_2, SW1_3, SW1_4), and a correction circuit 140, wherein the first current generating circuit 110 comprises a transistor of Ml, a second current generating circuit 120 comprises a transistor M2 and a adjustable resistance Re, the correction circuit 140 includes a transmission circuit 142, a reception circuit 144 and a digital signal processor 146, wherein the digital signal processor 146 comprises a plurality of electronic fuses (Electrical fuse, efuse) 148.

[0029]于本实施例中,固定电流产生电路100位于一芯片中,而图1所示的接点NI为该芯片的一接点,且于一芯片测试阶段时,接点NI用来连接一外部电阻Rext以供第一电流产生电路110产生一第一电流;此外,图1所示的接点N2为该芯片的一信号输出接点,用来将发送电路142所输出的信号经由接点N2传送至该芯片外。 [0029] In the present embodiment, the fixed current generating circuit 100 is located in a chip, and a contact Contact FIG chip shown for the NI 1, and a chip in the testing phase, the contact for connecting an external resistor NI Rext for a first current generating circuit 110 generates a first current; in addition, a signal output contact point N2 for chip shown in FIG. 1, for the signal transmitting circuit 142 transmits to the output of the chip through the contact N2 outer.

[0030]于本发明的一实施例中,固定电流产生电路100所应用的该芯片为一网络芯片,而发送电路142与接收电路144本身为该芯片的一模拟前端(AnalogFront End,AFE)电路。 [0030] In an embodiment of the present invention, the constant current generating circuit 100 is applied to the chip as a network chip, and the reception circuit 142 transmits an analog front end circuit 144 for the chip itself (AnalogFront End, AFE) circuit . 此外,发送电路142本身可以使用一数字模拟转换器(Digital-to-Analog Converter,DAC)来实际使用,且用来接收来自数字信号处理器146的网络数据,并将所接收到的网络数据处理后经由接点N2传送至该芯片外的一传输线;另外,接收电路144本身可以使用一模拟数字转换器(Analog-to-Digital Converter,ADC)来实际使用,且用来自接点N2接收网络数据,并将所接收到的网络数据作模拟数字转换后传送到数字信号处理器146进行后续处理。 Further, the transmitting circuit 142 itself can use a digital to analog converter (Digital-to-Analog Converter, DAC) to practical use, and to receive network data from the digital signal processor 146, and the received data processing network after through the contact transfer N2 to a transmission line outside of the chip; Further, the receiving circuit 144 itself can use an analog to digital converter (analog-to-digital converter, ADC) to practical use, and the use from the point N2 receive network data, and after the received network data transmitted to the analog-digital converter for the digital signal processor 146 for subsequent processing.

[0031]在一芯片测试阶段时,请参考图2,首先,固定电流产生电路100会先经由接点NI连接至外部电阻Rext,开关SW1_1与SW1_2经由控制信号Vci的控制而导通,而开关SW2_1与SW2_2则经由控制信号Vc2的控制而处于未导通状态,其中控制信号VC1、VC2可以由数字信号处理器146或是其他来源所产生。 [0031] When a chip test phase, please refer to FIG. 2, first, the fixed current generating circuit 100 will connect through the contact NI to the external resistor Rext, switches SW1_1 to SW1_2 via control signal Vci is turned on, and the switch SW2_1 and SW2_2 via the control signal Vc2 being in a non-conducting state, wherein the control signal VC1, VC2 may be produced by a digital signal processor 146 or other sources. 此时,由于运算放大器102的正极连接到一能带隙电压(bandgap voltage)Vbg,因此,第一电流产生电路110会产生具有电流值(\^^/1^11:)的一第一电流Ii,而电流镜130复制第一电流I1以产生一复制电流IBX。 At this time, since the positive electrode of the operational amplifier 102 is connected to a band gap voltage Vbg (bandgap voltage), therefore, the first current generating circuit 110 generates a first current (\ ^^ / ^ 1 has a current value of 11 :) ii, and the current mirror 130 to generate a copy of the first current I1 is a current copy IBX. 之后,发送电路142依据数字信号处理器146所给的一参考数据Di以将复制电流IBX转换为一第一电压值Vox,其中参考数据Di是用来决定发送电路142在将复制电流IBX转换为第一电压值Vox的比例;之后,接收电路144再接着将第一电压值Vox转换为一第一数字码Dox,而第一数字码Dox接着传送至数字信号处理器146,并储存于其中。 Then, the transmission circuit 142 according to the digital signal processor 146 to a reference current to copy data Di IBX into a first voltage value Vox, wherein the reference data Di is used to determine the transmission circuit 142 is converted to copy the current IBX Vox ratio of the first voltage value; after receiving circuit 144 and then the first voltage value Vox is then converted to a digital code the first Dox, Dox first digital code and then transferred to the digital signal processor 146, and stored therein.

[0032]接着,在第一数字码Dox储存至数字信号处理器146之后,请参考图3,开关SW1_1与SW1_2经由控制信号Vc1的控制而处于未导通状态,而开关SW2_1与SW2_2则经由控制信号Vc2的控制而导通。 After [0032] Next, a first digital code to the digital signal processor Dox reservoir 146, refer to FIG. 3, via a switch SW1_1 to SW1_2 the control signal Vc1 is in a non-conductive state, and the switches SW2_1 to SW2_2 via the control control signal Vc2 is turned on. 此时,由于运算放大器102的正极连接到一能带隙电压(bandgap voltage)Vbg,因此,第二电流产生电路120会产生具有电流值(Vbg/Rc)的一第二电流12,而电流镜130复制第二电流I2以产生一复制电流IBC。 At this time, since the positive electrode of the operational amplifier 102 is connected to a band gap voltage Vbg (bandgap voltage), therefore, the second current generation circuit 120 generates a current having a second current value (Vbg / Rc) of 12, and the current mirror copy 130 the second current I2 to generate a replication current IBC. 之后,发送电路142依据数字信号处理器146所给的参考数据Di以将复制电流IBC转换为一第二电压值Voc,接收电路144再接着将第二电压值Voc转换为一第二数字码Doc,而第二数字码Doc接着传送至数字信号处理器146,并储存于其中。 Then, the transmission circuit 142 according to the digital signal processor 146 to a reference current to copy data Di IBC is converted to a second voltage Voc, the reception circuit 144 and then a second voltage value Voc then converted to a second digital code Doc and a second digital code Doc then transferred to the digital signal processor 146, and stored therein.

[0033]接着,由于数字信号处理器146中所储存的第一数字码Dox与第二数字码Doc分别用来表示第一电流I1与第二电流I2的大小,因此,数字信号处理器146可以依据第一数字码D0x与第二数字码D0c以产生一校正码Dcc来调整可调电阻Re的电阻值,以使得第二电流产生电路120所产生的电流可以尽可能的接近第一电流产生电路110所产生的电流。 [0033] Next, since the digital signal processor 146 in the digital code stored in the first and second digital code Doc Dox are used to represent the magnitude of the first current I1 and the second current I2, and therefore, the digital signal processor 146 can according to the first and second digital code D0x D0c digital code to generate a correction code to Dcc adjusting the resistance of the adjustable resistor Re, so that the second current generating circuit 120 generates a current may be as close as possible first current generating circuit 110 current generated. 举例来说,数字信号处理器146可以依据第一数字码Dox与第二数字码Doc的码值或是差异值,以自一对照表中决定出校正码Dcc以调整可调电阻Re的电阻值;或是数字信号处理器146可以持续地产生不同的校正码Dcc以调整可调电阻Re的电阻值,以使得第二电流产生电路120所产生的电流I2与相对应的第二数字码Doc持续的改变直到第二数字码Doc很接近第一数字码Dox为止。 For example, the digital signal processor 146 may be, to determine from a lookup table correction code Dcc resistance value to adjust the adjustable resistor Re value or a difference value based on the code of the first digital codes and second digital codes Doc Dox of ; or a digital signal processor 146 may continuously generate different Dcc correction code to adjust the resistance value of the adjustable resistor Re, so that the current I2 of the second current generating circuit 120 generates a second digital code corresponding to the duration Doc a second digital code is changed until it is close up Doc first digital code Dox.

[0034] 经由上述的调整,可调电阻Re的电阻值会很接近外部电阻Rext的电阻值,因此,第二电流产生电路120所产生的电流I2也会很接近第一电流产生电路110所产生的电流Ii,此时,数字信号处理器146会使用电子保险丝148来记录此时的校正码Dcc,因此,在芯片后续的使用上,由于校正码Dcc已经由电子保险丝148固定了,因此可调电阻Re的电阻值也会是固定的,芯片便可以利用第二电流产生电路120来产生所需的一固定电流Ic。 [0034] via the adjustment of the adjustable resistance value of the resistor Re will be very close to the resistance value of the external resistor Rext, therefore, a second current generating circuit 120 generates a current I2 will be very close to the first current generating circuit 110 generates current of Ii, at this time, the digital signal processor 146 will be used to record the electrical fuse 148 Dcc correction code in this case, therefore, on a subsequent use of the chip, since the correction code Dcc been fixed by the electrical fuse 148, and therefore adjustable the resistance value of the resistor Re is also fixed, the chip can utilize a second current generating circuit 120 generates a fixed current Ic required. 由于在后续的使用上不再需要使用外部电阻,因此可以降低后续的制造成本。 By eliminating the need for external resistors on a subsequent use, the manufacturing cost can be reduced subsequent.

[0035]此外,由于固定电流产生电路100中的校正电路140是以芯片本身的发送电路142与接收电路144来实作,因此不需要在芯片中增加额外的校正电路,可以节省芯片设计与制作上的成本。 [0035] Further, since the constant current generation circuit 100 in the correction circuit chip itself 140 is the transmission circuit 142 and the reception circuit 144 to implement, and therefore no additional correction circuit chip, the chip design and production can be saved It costs on.

[0036]然而,需注意的是,虽然于图2所示的实施例中,校正电路140是以芯片本身的发送电路142、接收电路144来实作,但本发明并不以此为限。 [0036] However, it is noted that, although in the embodiment illustrated in Figure 2, the correction circuit 140 is a transmission circuit 142 of the chip itself, the reception circuit 144 to implement, but the present invention is not limited thereto. 于本发明的其他实施例中,但校正电路140亦可以为芯片中独立的校正电路,且可以有其他型式的设计,而并非使用芯片本身的发送电路142与接收电路144,这些设计上的变化均应隶属于本发明的范畴。 In other embodiments of the present invention, but that the correction circuit 140 may also be independent of the correction circuit chip, and there may be other types of designs, rather than the chip itself using the transmission circuit 142 and the reception circuit 144, these design variations It should be under the scope of the invention.

[0037]请参考图4,图4为依据本发明一实施例的固定电流产生方法的流程图,参考图1〜4以及以上有关于图1〜3的揭示内容,流程叙述如下: [0037] Please refer to FIG. 4, FIG. 4 is a flowchart of a method of generating a fixed current according to an embodiment of the present invention, with reference to FIGS. 1 ~ 4, and FIG disclosure about 1 ~ 3 above, the flow is described as follows:

[0038]步骤400:提供一芯片,其中该芯片包含有一第一电流产生电路以及一第二 [0038] Step 400: providing a chip, wherein the chip includes a first and a second current generating circuit

[0039]电流产生电路,该第二电流产生电路包含有一晶体管以及一可调电阻; [0039] The current generating circuit, the second current generating circuit comprises a transistor, and an adjustable resistance;

[0040] 步骤402:将一外部电阻连接至该第一电流产生电路,以使得该第一电流产生电路使用该外部电阻来产生一第一电流; [0040] Step 402: connecting an external resistor to said first current generating circuit, such that the first current generating circuit uses an external resistor to generate a first current;

[0041]步骤404:使用该第二电流产生电路来产生一第二电流; [0041] Step 404: using the second current generating circuit to generate a second current;

[0042] 步骤406:依据该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流实质上等于该第一电流,且该第二电流是作为该芯片内所使用的一固定电流。 [0042] Step 406: adjusting the resistance value of the variable resistor according to the first current and the second current such that the second current is substantially equal to the first current and the second current as the chip a fixed current used.

[0043]简要归纳本发明,于本发明的固定电流产生电路与相关的固定电流产生方法中,将芯片内部的一可调电阻的电阻值校正为接近一外部电阻的电阻值,以使得芯片可以使用内部校正过后的电阻来产生一可靠的固定电流,由于不需要外部电阻,故可以确实降低后续的制造成本。 [0043] The brief summary of the present invention, the fixed current generation circuit related to the present invention produces a constant current method, a value of the internal variable resistance chip resistor corrected to a value close to the resistance of the external resistor, so that the chip may after the correction using the internal resistance to generate a reliable fixed current, since no external resistors, it can surely reduce the manufacturing cost of the subsequent. 此外,本发明的固定电流产生电路中的校正电路可以使用芯片本身的发送电路与接收电路来实作,因此不需要设计额外的校正电路,以进一步节省芯片设计与制造上的成本。 Further, a constant current generating circuit of the present invention may be used in the correction circuit and the transmitting circuit to the receiving circuit chip implementation itself, so no additional correction circuit designed to further cost savings on the chip design and manufacturing.

[0044]以上所述仅为本发明的较佳实施例,凡依本发明申请专利权利要求范围所做的均等变化与修饰,皆应属本发明的涵盖范围。 Modifications and alterations [0044] The foregoing is only preferred embodiments of the present invention, where under this invention, the scope of the claims made by the patent application, and also belong to the scope of the present invention.

Claims (11)

  1. 1.一种固定电流产生电路,设置于一芯片内,包含有: 一第一电流产生电路,包含有一第一晶体管,其中该第一晶体管耦接于该芯片的一接点,且于一芯片测试阶段时,该接点是用来连接一外部电阻以供该第一电流产生电路产生一第一电流; 一第二电流产生电路,包含有一第二晶体管以及一可调电阻,用来产生一第二电流; 一电流镜; 一开关模块,耦接于该第一电流产生电路、该第二电流产生电路与该电流镜之间,用以选择性地将该第一电流产生电路与该第二电流产生电路连接至该电流镜,以使得该电流镜复制该第一电流或是该第二电流;以及一校正电路,耦接于该电流镜,用以依据该电流镜所复制的该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流尽可能的接近该第一电流,且该第二电流作为该芯片内所使用的一固定电 A constant current generating circuit provided in a chip, comprising: a first current generating circuit includes a first transistor, wherein the first transistor is coupled to a contact of the chip and a chip in the test when the phase of the external contacts is used to connect a resistor in the first current generating circuit for generating a first current; a second current generating circuit comprises a second transistor and a variable resistor, for generating a second current; a current mirror; a switch module coupled to the first current generating circuit, the second current generated between the current mirror circuit, for selectively generating the first current and the second current circuit generating circuit is connected to the current mirror, so that the first current mirror copy of the current or the second current; and a correction circuit, coupled to the current mirror to the first current mirror current according to the copied and the second current to adjust the resistance value of the variable resistor, the second current so as to close the first current and the second current is used as the chip inside a stationary electric ; 其中,该校正电路包含有: 一发送电路,用来接收该电流镜所复制的该第一电流以产生一第一电压值,以及接收该电流镜所复制的该第二电流以产生一第二电压值; 一接收电路,耦接于该发送电路,用以接收该第一电压值以产生一第一数字码,以及接收该第二电压值以产生一第二数字码;以及一数字信号处理器,耦接于该接收电路,包含有多个电子保险丝,且该数字信号处理器依据该第一数字码与该第二数字码以控制该多个电子保险丝产生一校正码,且该校正码用来调整该可调电阻的电阻值。 ; Wherein the correction circuit comprises: a transmission circuit for receiving the current of the first current mirror copied to generate a first voltage value, and the second current mirror receives the copied current to produce a first two voltage values; a receiver circuit, coupled to the transmitting circuit for receiving the first voltage value to generate a first digital code, and receiving the second voltage value to generate a second digital code; and a digital signal a processor coupled to the receiver circuit, comprising a plurality of electronic fuses, and the digital signal processor according to the first and the second digital code to control the digital code to produce a plurality of electronic fuses correction code, and the correction code to adjust the resistance value of the variable resistor.
  2. 2.如权利要求1所述的固定电流产生电路,其中该校正电路包含该芯片的一模拟前端电路。 2. The constant current generation circuit of claim 1, wherein the correction circuit comprises an analog front end circuit of the chip.
  3. 3.如权利要求1所述的固定电流产生电路,其中于该芯片测试阶段时,该开关模块将该第一电流产生电路连接于该电流镜,并使该第二电流产生电路不连接至该电流镜,且该校正电路接收该电流镜所复制的该第一电流;以及该开关模块另将该第二电流产生电路连接于该电流镜,并使该第一电流产生电路不连接至该电流镜,且该校正电路接收该电流镜所复制的该第二电流;以及该校正电路依据该电流镜所复制的该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流尽可能的接近该第一电流。 The fixing of the current generating circuit of claim 1, wherein when the chip is in the test phase, the switching module the current generating circuit is connected to a first current mirror, and the second current generation circuit is not connected to the a current mirror, and the correction circuit receiving the first current of the current mirror copied; and the switch module further second current generating circuit is connected to the current mirror, the first current generating circuit and is not connected to the current mirror, and a second correction circuit receiving the current of the current mirror copied; and a correcting circuit to adjust the resistance value of the variable resistor according to the current of the first current mirror and replicated second current such that the second current as close to the first current.
  4. 4.如权利要求1所述的固定电流产生电路,其中该芯片为一网络芯片,且该发送电路与该接收电路分别为该网络芯片中用来发送与接收网络相关信号的电路。 4. The constant current generating circuit of claim 1, wherein the network chip is a chip circuit and the receiving circuit and the transmission circuit transmits and receives signals related to the network are used for the network chip.
  5. 5.如权利要求1所述的固定电流产生电路,该数字信号处理器依据该第一数字码与该第二数字码的差异值,自一对照表中决定出一校正码,以调整该可调电阻的电阻值。 5. The fixed current generation circuit of claim 1, the digital signal processor according to the first digital code a difference value and the second digital code, determines that a correction code from a lookup table, to be adjusted adjusting the resistance value of the resistor.
  6. 6.如权利要求4所述的固定电流产生电路,其中该发送电路为一数字模拟转换器,用来接收来自该数字信号处理器的网络数据。 Fixed current 4 generating circuit as claimed in claim, wherein the transmission circuit is a digital-analog converter, for receiving network data from the digital signal processor.
  7. 7.如权利要求1所述的固定电流产生电路,还包括运算放大器,该运算放大器的正极连接到一能带隙电压,该运算放大器的负极通过该开关模块耦接于该第一电流产生电路、该第二电流产生电路。 7. The constant current generation circuit of claim 1, further comprising an operational amplifier, the operational amplifier is connected to the positive electrode to a band gap voltage, the negative electrode of the operational amplifier through the switching module coupled to the first current generating circuit , the second current generating circuit.
  8. 8.如权利要求7所述的固定电流产生电路,该开关模块包括: 第一开关,耦接于该第一电流产生电路与该电流镜之间; 第二开关,耦接于该第二电流产生电路与与该电流镜之间; 第三开关,耦接于该运算放大器的负极与第一电流产生电路之间; 第四开关,耦接于该运算放大器的负极与第二电流产生电路之间。 8. The constant current generating circuit of claim 7, the switching module comprises: a first switch coupled to the first current generated between the current mirror circuit; a second switch coupled to the second current generating circuit of the fourth switch coupled to a negative electrode and a second current of the operational amplifier; and generated between the current mirror circuit; a third switch coupled to the cathode of the first current generated between the operational amplifier circuit between.
  9. 9.一种固定电流产生方法,应用于一芯片中,其中该芯片包含有一第一电流产生电路以及一第二电流产生电路,该第二电流产生电路包含有一晶体管以及一可调电阻,该固定电流产生方法包含有: 将一外部电阻连接至该第一电流产生电路,以使得该第一电流产生电路使用该外部电阻来产生一第一电流; 使用该第二电流产生电路来产生一第二电流; 依据该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流尽可能的接近该第一电流,且该第二电流是作为该芯片内所使用的一固定电流; 其中,依据该第一电流以及该第二电流来调整该可调电阻的电阻值,以使得该第二电流尽可能的接近该第一电流的步骤包含有: 接收该第一电流以产生一第一电压值; 接收该第一电压值以产生一第一数字码; 接收该第二电流以产生一第二电压值; 接 A constant current generating method applied to a chip, wherein the chip comprises a first current generating circuit and a second current generating circuit, the second current generating circuit comprises a transistor and an adjustable resistor, the fixing current generating method comprising: connecting an external resistor to said first current generating circuit to generate a first current such that a first current circuit used to generate the external resistor; using the second current generating circuit to generate a second current; adjusting the resistance value of the variable resistor according to the first current and the second current, the second current so as to close the first current and the second current is used as the chip within a constant current; wherein, according to the first current and the second current to adjust the resistance value of the variable resistor, such that the step of the first current as close to the second current comprises: receiving the first current to generate a first voltage value; receiving the first voltage value to generate a first digital code; receiving the second current value to generate a second voltage; then 该第二电压值以产生一第二数字码;以及依据该第一数字码与该第二数字码以调整该可调电阻的电阻值,包含有:依据该第一数字码与该第二数字码以控制该芯片中的多个电子保险丝来产生一校正码,且该校正码用来调整该可调电阻的电阻值。 The second voltage value to generate a second digital code; and a digital code according to the first and the second digital code to adjust the resistance value of the variable resistor, comprising: digital code according to the first and the second digital code to control the plurality of electronic fuses in the chip to generate a correction code and the correction code used to adjust the resistance of the adjustable resistor.
  10. 10.如权利要求9所述的固定电流产生方法,其中产生该第一电压值、该第一数字码、该第二电压值以及该第二数字码的步骤包含有: 使用该芯片的一模拟前端电路以产生该第一电压值、该第一数字码、该第二电压值以及该第二数字码。 10. The constant current generating method of claim 9, wherein generating the first voltage value, the first digital code, the step of the second voltage value and the second digital code comprising: a simulation of the chip using front-end circuit to generate the first voltage value, the first digital code, the second voltage value and the second digital code.
  11. 11.如权利要求10所述的固定电流产生方法,其中产生该第一电压值、该第一数字码、该第二电压值以及该第二数字码的步骤包含有: 使用该芯片的一发送电路来接收该第一电流以产生该第一电压值,以及接收该第二电流以产生该第二电压值; 使用该芯片的一接收电路来接收该第一电压值以产生该第一数字码,以及接收该第二电压值以产生该第二数字码; 其中该芯片为一网络芯片,且该发送电路与该接收电路分别为该网络芯片中用来发送与接收网络相关信号的电路。 11. The constant current generating method of claim 10, wherein generating the first voltage value, the first digital code, the step of the second voltage value and the second digital code comprises: a transmission of the chip using circuit to receive the first current to generate the first voltage value, and receiving the second current to generate the second voltage value; the chip using a receiving circuit to receive the first voltage value to generate the first digital code and receiving the second voltage value to generate the second digital code; wherein the network chip is a chip circuit and the receiving circuit and the transmission circuit transmits and receives signals related to the network are used for the network chip.
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