CN103823657A - Method for hyper-threading based communication between equipment boards - Google Patents
Method for hyper-threading based communication between equipment boards Download PDFInfo
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- CN103823657A CN103823657A CN201410053010.1A CN201410053010A CN103823657A CN 103823657 A CN103823657 A CN 103823657A CN 201410053010 A CN201410053010 A CN 201410053010A CN 103823657 A CN103823657 A CN 103823657A
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Abstract
The invention relates to a method for hyper-threading based communication between equipment boards. The method includes S1, subjecting board signals of each equipment board to logic and physical isolations through the hyper-threading technology in advance, S2, virtualizing a first CPU(central processing unit) according to the hyper-threading technology to acquire multiple feature CPUs, S3, performing fragment calculation on the received board signals of the equipment board by a first feature CPU of the multiple feature CPU, S4, storing the signals after the fragment calculation, S5, through the first CPU, calling the second feature CPU of the multiple feature CPUs to calculate the stored signal data. Since one physical CPU is virtualized into multiple logical CPUs through the hyper-threading technology and the multiple logical CPUs and the physical CPU together complete signal data communication between equipment boards, limit time of the CPU is shortened, cost is lowered, and running efficiency of the CPU is improved.
Description
Technical field
The present invention relates to field of computer technology, relate in particular to a kind of method of hyperthread equipment communication between plates.
Background technology
For traditional multi-core network device, what all adopt is the different independent treatment scheme of each cpu effect, for example: each cpu processes and manage a board, play an effect, wherein, each cpu is equivalent to each board and acts on behalf of control center in master control borad, for having the equipment of a board, conventionally in master control borad, configure a multinuclear cpu processor, on board, only has functional chip, and the function ratio of functional chip is more single, for example: for wifi chip, only has the signal of processing wifi, cpu of appointment that the data that receive for other signal processors need to pass to master control borad processes parsing, if in the time that the board of the network equipment is many, just need to be on master control borad integrated more cpu, a board corresponding to cpu management of each core, in the time using monokaryon x86 equipment, use Hyper-Threading to solve this monokaryon cpu and cannot realize the function of multinuclear cpu, do not possess ease for use.
Further, for multinuclear equipment, the equipment plate card of each cpu management can be distinguished, and can carry out software programming and software management and control for each board so on software, in the time using monokaryon equipment, and can only be to carry out resource mutual exclusion on software.For example: only have a cpu, mainboard just cannot receive simultaneously and process the signal that two boards send so, this be because a signal in processed, the signal that another board sends over can only be in waiting status, now because the reason of a cpu causes.
Further, generally in prior art carry out data processing and board between plate with multinuclear cpu and manage, and Optimization Software wherein becomes the monokaryon network management software by multi-core network management software.For these two kinds of phenomenons, first method, for low side devices, has obviously increased the cost of equipment, has exceeded original design cost; For high-end devices, can also accept, but be not optimal selection scheme, all can not well reduce costs; Second method is mutual owing to having between software, need to carry out resource isolation by the mode of lock mutual exclusion from software view, causes software operation efficiency extremely low.
Summary of the invention
Technical matters to be solved by this invention is how low cost, the high efficiency problem that realizes hyperthread equipment communication between plates.
For this purpose, the present invention proposes a kind of method of hyperthread equipment communication between plates, described method specifically comprises:
S1: the board signal of each device board is carried out to logical physical isolation in advance by Hyper-Threading;
S2: utilize described Hyper-Threading that first processor is carried out virtual, obtain multiple characteristic processing devices;
S3: the First Characteristic processor in described multiple characteristic processing devices carries out fragment computing to the described board signal of the described device board receiving;
S4: the signal after described fragment computing is stored;
S5: the Second Characteristic processor that described first processor calls in described multiple characteristic processing device calculates described stored signal data.
Particularly, described first processor is concurrent physical processor.
Particularly, described multiple characteristic processing device is virtual logical processor.
Particularly, described First Characteristic processor and described Second Characteristic processor are logic processor.
Particularly, described device board is the BIOS mainboard based on Extensible Firmware Interface.
By adopting the method for a kind of hyperthread equipment communication between plates disclosed in this invention, a concurrent physical processor is passed through to the multiple logic processors of the virtual acquisition of Hyper-Threading, communicate by letter by the signal data between the common finishing equipment plate of multiple logic processors and concurrent physical processor, reduced processor binding hours, reduced cost, meanwhile, improved the operational efficiency of processor.
Accompanying drawing explanation
Can more clearly understand the features and advantages of the present invention by reference to accompanying drawing, accompanying drawing is schematically to should not be construed as the present invention is carried out to any restriction, in the accompanying drawings:
Fig. 1 shows the flow chart of steps of the method for a kind of hyperthread equipment communication between plates in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, embodiments of the present invention is described in detail.
A kind of method that hyperthread equipment communication between plates is provided in the embodiment of the present invention, specifically comprises the following steps:
Particularly, step S1: the board signal of each device board is carried out to logical physical isolation in advance by Hyper-Threading.Wherein, device board is the BIOS mainboard based on Extensible Firmware Interface.
Step S2: utilize Hyper-Threading that first processor is carried out virtual, obtain multiple characteristic processing devices.Wherein, first processor is concurrent physical processor, and multiple characteristic processing device is virtual logical processor.
Step S3: the First Characteristic processor in multiple characteristic processing devices carries out fragment computing to the board signal of the device board receiving.Wherein, First Characteristic processor is logic processor.
Step S4: the signal after fragment computing is stored.
Step S5: the Second Characteristic processor that first processor calls in multiple characteristic processing devices calculates stored signal data.Wherein, Second Characteristic processor is logic processor.
Further, use exactly Hyper-Threading, make current single core processor, fictionalize multiple virtual machines, on multiple virtual processors, application interface software encapsulates tension management control software then.Wherein, Hyper-Threading is exactly to utilize special hardware instruction, two logic kernels are modeled to two phy chips, allow single processor can use thread-level and carry out parallel computation, and then compatible multithreading operation system and software, reduce the standby time of processor, improved the operational efficiency of processor.
Further, can be understood as the use lower floor software as using multinuclear software on upper layer software (applications), and also just become the communication between virtual processor for the internuclear supervisory communications between multinuclear concurrent physical processor.This process is because being all the message transmission of being undertaken by software, and is provided with by the information transmission between concurrent physical processor, can also improve the performance of exchanges data, improves data processing speed between integral device plate.
Further, because the physical computing district between virtual processor is separated by logic, so without the mutual exclusion that locks, just can be very fast signal between disposable plates efficiently, and use fragment computing, signal between plate is carried out to fragment computing, after handling the service data of a virtual processor, data need to be stored to preservation temporarily, and then call another virtual processor and process, undertaken by gradual computation cycles, now just can, in order to avoid lock side formula is carried out software program, greatly improve data processing speed.
By adopting the method for a kind of hyperthread equipment communication between plates disclosed in this invention, a concurrent physical processor is passed through to the multiple logic processors of the virtual acquisition of Hyper-Threading, communicate by letter by the signal data between the common finishing equipment plate of multiple logic processors and concurrent physical processor, reduced processor binding hours, reduced cost, meanwhile, improved the operational efficiency of processor.
Although described by reference to the accompanying drawings embodiments of the present invention, but those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, such modification and modification all fall into by within claims limited range.
Claims (5)
1. a method for hyperthread equipment communication between plates, is characterized in that, described method specifically comprises:
S1: the board signal of each device board is carried out to logical physical isolation in advance by Hyper-Threading;
S2: utilize described Hyper-Threading that first processor is carried out virtual, obtain multiple characteristic processing devices;
S3: the First Characteristic processor in described multiple characteristic processing devices carries out fragment computing to the described board signal of the described device board receiving;
S4: the signal after described fragment computing is stored;
S5: the Second Characteristic processor that described first processor calls in described multiple characteristic processing device calculates described stored signal data.
2. the method for claim 1, is characterized in that, described first processor is concurrent physical processor.
3. the method for claim 1, is characterized in that, described multiple characteristic processing devices are virtual logical processor.
4. the method for claim 1, is characterized in that, described First Characteristic processor and described Second Characteristic processor are logic processor.
5. the method for claim 1, is characterized in that, described device board is the BIOS mainboard based on Extensible Firmware Interface.
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| CN201410053010.1A CN103823657A (en) | 2014-02-17 | 2014-02-17 | Method for hyper-threading based communication between equipment boards |
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| CN201410053010.1A CN103823657A (en) | 2014-02-17 | 2014-02-17 | Method for hyper-threading based communication between equipment boards |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2017032112A1 (en) * | 2015-08-26 | 2017-03-02 | 中兴通讯股份有限公司 | Method for communicating with board having no central processing unit and communication device |
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| CN1894663A (en) * | 2003-06-30 | 2007-01-10 | 英特尔公司 | Parallel execution of enhanced EFI based BIOS drivers on a multi-processor or hyper-threading enabled platform |
| US7054987B1 (en) * | 2003-12-19 | 2006-05-30 | Nvidia Corporation | Apparatus, system, and method for avoiding data writes that stall transactions in a bus interface |
| CN1926510A (en) * | 2004-03-31 | 2007-03-07 | 英特尔公司 | Event processing mechanism |
| US20060080660A1 (en) * | 2004-10-07 | 2006-04-13 | Dell Products L.P. | System and method for disabling the use of hyper-threading in the processor of a computer system |
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Application publication date: 20140528 |