WO2017032112A1

WO2017032112A1 - Method for communicating with board having no central processing unit and communication device

Info

Publication number: WO2017032112A1
Application number: PCT/CN2016/083668
Authority: WO
Inventors: 夏志雄
Original assignee: 中兴通讯股份有限公司
Priority date: 2015-08-26
Filing date: 2016-05-27
Publication date: 2017-03-02
Also published as: CN106487549A

Abstract

Disclosed are a method and apparatus for communicating with a board having no Central Processing Unit (CPU). The method comprises: when a board having no CPU is powered on, the board having no CPU sends a report packet comprising signal board information thereof to a master control board; the master control board allocates a board proxy progress for each powered-on board having no CPU which is connected to the master control board; the master control board sends a control packet to the corresponding board having no CPU by means of the board proxy progress to control the corresponding board having no CPU to perform read processing or write processing.

Description

Method and communication device for communicating with single-processor single board

Technical field

The present application relates to, but is not limited to, the field of inter-board communication technologies, and in particular, to a method and a communication device for communicating with a single-processorless board.

Background technique

In the communication device, a main control board and multiple access boards together implement communication service functions. On the access board, there is a central processing unit CPU board. The control program of the common CPU access board runs independently inside the board. The main control board only needs to send control commands to the CPU board. The control of the board can be implemented relatively simply.

With the development of communication equipment business, no CPU boards came into being. The biggest feature of the CPU-free board is that there is no CPU, memory, or FPGA (Field-Programmable Gate Array) chip, which greatly reduces the hardware cost of accessing the board. However, because no CPU board has no CPU processor, the main control board cannot communicate effectively with the CPUless board.

Summary of the invention

The following is an overview of the topics detailed in this document. This Summary is not intended to limit the scope of the claims.

The main purpose of the embodiments of the present invention is to provide a method and a communication device for communicating with a single processor without a central processing unit, which solves the technical problem that the CPU of the CPU cannot communicate with the main control board in the related art.

A method of communicating with a CPUless board, the method comprising:

After the CPU is not powered on, the CPU-free board sends an report message of the board information of the CPU-free board to the main control board. ;

The main control board allocates a single board proxy process for each CPUless board that is connected to the main control board and is in a power-on state.

The main control board sends a control packet to the corresponding CPUless board through the board proxy process, and controls the corresponding CPUless board to perform read processing or write processing.

The CPUless board receives the control packet sent by the main control board, and according to the received control The message is read or written.

Optionally, the reporting packet and the control packet are Ethernet packets that are added with a preset virtual local area network VLAN identifier.

Optionally, the control message includes a write operation message and a read operation message. ,

The main control board sends a control packet to the corresponding CPUless board through the board proxy process to control the corresponding CPUless board to perform read processing or write processing, including:

When the main control board writes the CPUless board through the board proxy process, the write operation message including the corresponding configuration value and the configuration address of the write operation is sent to the CPUless board.

The CPU-free board parses the configuration value and the matching address from the received write operation message, and configures the configuration value into the chip register corresponding to the configuration address.

When the board agent process of the main control board performs a read operation on the CPUless board, the read operation message including the chip register address corresponding to the read operation is sent to the CPUless board.

The CPU-free board parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message and sends the result message to the main control board.

The board proxy process of the main control board receives the result packet sent by the CPUless board, where the result packet is an Ethernet packet that adds a preset virtual local area network VLAN identifier.

Optionally, the CPUless board parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message, and sends the result message to the main control board. include:

If no other read operation message is received and no result message is being encapsulated, the CPUless board receives the read operation message sent by the main control board.

Optionally, the receiving, by the board proxy process of the main control board, the result packet sent by the CPUless board includes:

The board agent process of the main control board determines whether the result packet sent by the CPUless board is Ready

When the result packet sent by the CPUless board is ready, the board proxy process of the main control board receives the result packet sent by the CPUless board.

Optionally, the read operation message and the result message include a type field.

The method further includes: after the step of the board proxy process of the main control board receiving the result packet sent by the CPUless board, the board proxy process of the main control board according to the received result message The type field determines the result type of the result message.

A communication device includes a CPU board without a central processing unit and a main control board.

The CPU-less board includes: a message reporting module and a message communication module; the main control board includes: a process allocation module and a board agent process module; and the message reporting module is set to be a CPUless board. The device sends the report message of the board information of the CPUless board to the process allocation module.

The process allocation module is configured to allocate a single board proxy process to each CPUless board that is connected to the main control board and is in a power-on state.

The board proxy process module is configured to send a control packet to the corresponding CPUless board through the board proxy process, and control the corresponding CPUless board to perform read processing or write processing;

The message communication module is configured to receive a control message sent by the board agent process module, and perform read processing or write processing according to the received control message.

Optionally, the control message includes a write operation message and a read operation message.

The single board proxy process module includes a first write unit, a first read unit, and a result processing unit.

The message communication module includes a second write unit and a second read unit.

The first write unit is configured to send a write operation message including the write operation corresponding configuration value and the configuration address to the second when the CPU-free board performs a write operation by the board proxy process Write unit

The second write unit is configured to parse the configuration value and the matching address from the received write operation message, and configure the configuration value into a chip register corresponding to the configuration address.

The first reading unit is configured to perform the CPUless board through a board proxy process. During the read operation, a read operation message including the chip register address corresponding to the read operation is sent to the message communication module.

The second reading unit is configured to parse the chip register address from the received read operation message, and encapsulate the destination information corresponding to the chip register address into a result message and send the result message to the result processing unit.

The result processing unit is configured to receive the result message sent by the second read unit, where the result message is an Ethernet message that adds a preset virtual local area network VLAN identifier.

Optionally, the second reading unit parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message, and sends the result message to the result processing unit. include:

If the other read operation message is not received and there is no result message being encapsulated, the read operation message sent by the main control board is received.

The chip register address is parsed from the received read operation message, and the destination information corresponding to the chip register address is encapsulated into a result message and sent to the result processing unit.

Optionally, the result processing unit that is sent by the result processing unit to the second reading unit includes:

Determining whether the result packet sent by the CPUless board is ready;

When the result packet sent by the CPUless board is ready, the result packet sent by the CPUless board is received.

The single board agent process module further includes:

The type processing unit is configured to determine, after the result processing unit receives the result message sent by the CPUless board, the result type of the result message according to the type field in the received result message.

A computer readable storage medium storing computer executable instructions that, when executed by a processor, implement the method of communicating with a CPU without a central processing unit.

In the embodiment of the present invention, the main control board allocates a single-board proxy process to each CPU-less board that is connected to the main control board and is in a power-on state. The main control board passes the single-board proxy process to the corresponding CPU-free process according to requirements. The board sends control packets to control the corresponding CPU-free board for read or write processing, so that communication between the CPU-free board and the main control board is implemented.

BRIEF abstract

1 is a schematic diagram showing the internal structure and control relationship of a CPUless single board and a main control board according to the present invention;

2 is a schematic flowchart of a first embodiment of a method for communicating with a central processing unit without a central processing unit;

3 is a schematic diagram of control of mutually exclusive access of a multi-thread simultaneous read operation;

4 is a schematic diagram of functional modules of a first embodiment of a communication device according to the present invention.

Embodiments of the invention

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that, in the case of no conflict, the features in the embodiments and the embodiments in the present application may be arbitrarily combined with each other.

For a better understanding of the technical solution of the embodiment of the present invention, the hardware structure of the CPUless board and the main control board in the embodiment of the present invention is briefly introduced. Referring to FIG. 1 and Table 1, in the hardware, the CPUless board is not provided. The CPU minimum system is not set, and the FPGA chip, the CPLD (Complex Programmable Logic Device) chip and the backplane (supporting the interconnection between the CPUless board and the main control board, And the two boards for the inter-board communication are directly connected to the circuit board that supports the CPU-free board and the main control board. The CPLD chip without the CPU board is already burned at the factory. On the software, the CPU-free board does not need to run the software program and the FPGA program. The CPLD program is used together with the software program of the main control board to implement all the functions of the access board. On the main control board, a single-board proxy process is enabled for each CPU-less card. The process is related to the CPU accessing most functions of the board. The board is read and written by the board. The CPLD chip of the board is completed. The process is described as follows:

1) The board proxy process on the main control board notifies the device and offset address that the CPU board should read or write through the Ethernet packet in the private Ethernet packet format. The board agent on the standby main control board is also running, but the CPU-free board configuration query operation is not performed, and the dedicated Ethernet packets are not sent and received with the CPU-free board. The information such as the rack map and alarm performance is synchronized to the standby main control board through the software system of the main control board.

2) The CPLD chip without the CPU board parses the dedicated Ethernet packet sent by the board agent of the main control board. After matching the destination MAC address, the pre-defined read and write operation type and operation address in the professional Ethernet packet are selected. , converted into a chip-specific interface such as I2C for operation.

3) After power-on, the CPLD chip without a CPU board actively reports to the main control board periodically. Board type dedicated Ethernet telegram. The CPLD chip of the CPU-free board is configured with the chip device register and remote upgrade according to the request of the configuration main control board. Query the alarm performance of the board according to the request of the main control board, and send it to the host through the dedicated Ethernet packet. Control board.

The packet format is a specific format because the CPU-free packet is processed by the CPLD chip. To distinguish between a normal S-port packet and a non-CPU-board communication packet, you need to tag a non-CPU card communication packet with a specific VLAN (that is, the above-mentioned dedicated Ethernet packet). The packets of the CPU-free board are in the format of a short packet and cannot be consistent with the format of the S-port.

The packet is processed by the board CPLD and the board proxy process of the master CPU:

(1) Packet encapsulation/decapsulation of a CPU-free board is completed in the CPLD chip.

(2) The board agent of the main control board directly calls the underlying Ethernet port driver to encapsulate the packet and send and receive packets. The CPU of the main control board needs to modify the Ethernet port to drive the packet processing and add the VLAN. When receiving, you need to identify the VLAN and deliver the packets of a specific VLAN to the board proxy process.

Table 1

The embodiment of the present invention provides a method for communicating with a central processing unit without a central processing unit. In the first embodiment of the method for communicating with a central processing unit without a central processing unit, reference is made to FIG. The method for board communication includes steps S10-S40:

In step S10, after the CPU is not powered on, the CPU-free board sends an report message containing the board information to the main control board.

The board information includes the board type, the board position, and the working status of the board. After the CPU is not powered by the board, the CPLD chip of the CPU-free board actively reports the information of the CPU-free board to the main control board. Reports the packet so that the main control board can update the status of the CPU-free board connected to it. The CPLD chip without the CPU board configures the chip device register and remote upgrade according to the request of the main control board. Query the alarm performance of the board and send it to the main control board through the report packet (the packet is the Ethernet packet with the preset VLAN ID), so that there is no CPU between the board and the main control board. The communication is more timely and effective.

In step S20, the main control board allocates a single board proxy process for each CPUless board connected to the power-on state.

On the hardware, there is no CPU minimum system on the CPU-free board, and there is no FPGA (Field Programmable Gate Array). On the CPUless board, there is no need to run software programs and FPGA programs, and CPLD in the CPLD chip is used. The program works in conjunction with the board agent process on the main control board to implement all functions of the access board. Therefore, the main control board enables and assigns a single-board proxy process to each of the CPU-free boards that are connected to the power-on state. The board agent process can implement the most functions of the CPU and access the board. The functions of the driver, the read/write access board, and other functions are implemented by the single-board proxy process and the CPU-less single-board CPLD chip.

In the step S30, the main control board sends a control packet to the corresponding CPUless board through the board proxy process to control the corresponding CPUless board to perform read processing or write processing.

The control packet includes a write operation message and a read operation message. The main control board sends control packets to the corresponding CPUless board through the board proxy process to control the corresponding CPUless board for read processing or write processing. The main control board borrows the board proxy process to replace the CPU of the access board. The main control board passes the board proxy process to the CPUless board according to the actual requirements. The control packet is sent to control the corresponding CPU-free board for read processing or write processing, that is, communication between the main control board and the CPU-free board is implemented.

Step S40: The CPUless board receives the control message sent by the main control board, and performs read processing or write processing according to the received control message.

Optionally, the report message and the control message are Ethernet packets that are added with the preset virtual local area network VLAN identifier. The control packet received by the CPU-free board is processed by the board's CPLD chip. The CPU-free board sends and receives packets without CPU flexibility. Therefore, the packet format is a specific format. To distinguish between a normal S-port packet and a communication packet without a CPU card (that is, a control packet), you need to tag a non-CPU card communication packet with a specific VLAN. The packets of the CPU-free board are in the format of a short packet and cannot be consistent with the format of the S-port. It is a short message format different from the S port message.

In this embodiment, the main control board allocates a single-board proxy process to each CPU-less board that is connected to the power-on state, and then the main control board passes the board proxy process to the corresponding CPUless board according to requirements. The control packet is sent to control the corresponding CPUless board for read processing or write processing, so as to implement communication between the CPUless board and the main control board.

On the basis of the first embodiment of the method for communicating with a CPU-free board, the second embodiment of the method for communicating with a CPU-free board is provided. In the second embodiment, the control packet includes a write operation message. And reading the operation message, step S30 includes steps S31-S35:

In the step S31, when the main control board writes the CPU-free board through the board proxy process, the write operation packet including the configuration value and the configuration address of the write operation is sent to the CPUless board.

When the main control board needs to communicate with the CPU-free board (that is, when the main control board needs to read or write to the CPU-free board), determine the board agent of the main control board to operate the CPU-free board. The operation type (the operation type includes the read operation and the write operation), so as to determine the type of the control packet sent by the board agent process of the main control board to the CPUless board, that is, whether the sent control message is a write operation message or a read operation. Message.

When the main control board writes to the CPUless board through the board proxy process, the board agent enters The process will send a write operation packet with the corresponding configuration value and configuration address of the write operation (the packet is an Ethernet packet with the VLAN ID added) to the CPUless board. The write operation is to configure the correct configuration value to the chip register of the CPUless board according to the requirement. It is relatively simple, as long as the destination MAC address is as follows (as shown in Table 1). The media access control, the media access control layer, the VLAN, the virtual local area network (VLAN), the destination address of the board, and the operation code are correctly filled in. The VLAN ID is added to the board proxy process running on the main control board. The Ethernet packet is sent to the Ethernet port on the backplane. The backplane then forwards the Ethernet packet with the VLAN ID to the CPLD chip without the CPU. The CPLD chip parses the packet and reports it. The configuration values in the text are configured on the physical layer and optical module of the CPU-free board.

In step S32, the CPU-free board parses the configuration value and the matching address from the received write operation message, and configures the configuration value into the chip register corresponding to the configuration address.

Referring to Figure 1, the board proxy process of the main control board is the same as the PHY (physical layer) chip, the clock chip, the temperature sensor, and the optical module (such as SFP (Small Form Pluggable). Pull out the optical module), restore the clock settings, etc. for initial configuration. All the initialization operations are carried out through the adaptation layer, and then converted into corresponding Ethernet packets, carrying the chip and address of the operation in the payload of the Ethernet packet. The board agent process converts these commands into the slot number, device number, write address, write data, and write operation code of different devices connected to the board. The board proxy process sends the information about the same write operation to the adaptation layer for Ethernet encapsulation adaptation, and translates the slot number into a different destination MAC address, VLAN, device number, write address, write data, and operation code. Encapsulated into an Ethernet payload. The Ethernet packet is sent to the corresponding CPU-free board through the L2 switch chip of the main control board. The CPLD without the CPU board parses the packet and performs the corresponding device write processing.

The board agent receives the internal S port command sent from the internal S port of the main control board, and can set the port mode of the PHY, the mode of 1588, the recovery clock, and so on. The board agent converts the command into an internal Ethernet packet of the corresponding board and sends it to the corresponding board. The processing is the same as the initialization process.

In the step S33, when the main control board performs a read operation on the CPUless board through the board proxy process, the read operation message including the chip register address corresponding to the read operation is sent to the CPUless board.

When the board agent process of the main control board reads a CPU-free board, the board agent process of the main control board needs to query the value of the chip register of the CPU-free board, which will contain the corresponding read operation. The read operation of the chip register address is sent to the CPU-free board. The first step is as follows: The board agent process on the main control board sends a read operation message to the CPU-free board to query the CPU-free board. The register and its address; the second step: the result of the CPLD chip construction query without the CPU board is sent back to the board agent process of the main control board. For the second step, the board proxy process of the main control board needs to enable a thread to receive the result packet sent by the CPUless board, and the first step of sending the read operation message and the second step receiving the result message. The operations are performed in two threads.

Step S34, the CPU-free board parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message and sends the result message to the main control board;

The CPU-free board parses the chip register address from the received read operation message, obtains the destination information corresponding to the address of the CPU-free board chip register address, and encapsulates the obtained destination information into an Ethernet packet format with the VLAN identifier added. The result message is sent to the main control board in time.

In the step S35, the board proxy process of the main control board receives the result packet sent by the CPUless board, and the result packet is an Ethernet packet that adds the preset virtual local area network VLAN identifier.

When the board agent process of the main control board receives the result packet of the CPU-free board, it is used for subsequent classification, parsing, or other processing, so that the main control board reads the CPU-free board.

In this embodiment, when the main control board needs to communicate with the CPU-free board, the control packet is sent to the corresponding CPUless board through the board proxy process, so as to control the corresponding CPUless board to perform read processing or Write processing; when the board agent process of the main control board writes to the CPUless board, the write operation message is sent to the CPUless board, so that the CPUless board parses the write operation message and configures the configuration value. To the chip register corresponding to the configuration address; when the board agent process of the main control board reads the CPU-free board, the read operation message is sent to the CPU-free board for the CPU-free board to be analyzed. After the operation message is sent back to the result packet, the main control board sends a read operation message or a write operation message to the CPU-free board. The CPU board only parses and encapsulates the packets, and does not perform logic analysis and processing on the packets. This implements the read and write operations of the main control board to the CPU-free board, that is, the communication between the main control board and the CPU-free board is realized. .

A second embodiment of a method for communication without a central processing unit based on the embodiment of the present invention is proposed A third embodiment of the method without central processing unit board communication, in the third embodiment, step S34 includes steps S341-S342:

In step S341, if no other read operation message is received and no result message is being encapsulated, the CPUless board receives the read operation message sent by the main control board.

In step S342, the CPUless board parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message and sends the result message to the main control board.

Referring to FIG. 3, the main control board enables a single board proxy process to communicate with a CPUless board, and the board proxy process enables one thread to send read operation messages to the CPUless board, and one thread is responsible for receiving no CPU orders. The result packet sent by the CPLD chip of the board, when the CPLD chip of the CPU-free board receives the read operation message sent by the multiple threads at the same time, it detects whether the CPU-free board has received the read operation message at the current time and The read operation packet is also processed (that is, the result packet corresponding to the received read operation message is being encapsulated). If the CPU-free board has the result packet being encapsulated at the current time, the main control board is not sent. If the CPU-free board does not have a result packet being encapsulated at the current time, it continues to determine whether the CPU-free board receives the read operation message sent by multiple threads at the same time, if there are multiple When the thread sends a read operation message, it selects and parses a read operation report according to a preset rule (for example, determining the priority of the read operation message according to the arrival time of the read operation message, the length of the message, etc.). Text. Then, the corresponding destination information is found according to the parsed chip register address, and the destination information is encapsulated into a result message and sent to the main control board (the main control board that sends the parsed read operation message).

In this embodiment, when a plurality of main control board threads simultaneously send a read operation message to a CPUless board, only one read operation message sent by one thread is allowed to be received and processed at a time, that is, no CPU board read operation. The receiving of packets is based on the principle of mutual exclusion. It avoids receiving and processing multiple read operation messages at a time. This avoids the time and processing flow of parsing and processing of multiple read operations. As a result, the message output is confusing, which ensures the accuracy of the message received by the main control board.

A fourth embodiment of a method for communicating with a central processing unit without a central processing unit is proposed. In the fourth embodiment, step S35 includes step S351- S352:

In step S351, the board proxy process of the main control board determines that the result packet sent by the CPUless board is No ready.

In step S352, when the result packet sent by the CPUless board is ready, the board proxy process of the main control board receives the result packet sent by the CPUless board.

After the board agent process of the main control board sends a read operation message to the CPU-free board, the CPLD reply result of the CPU-free board sends a packet to the board agent process of the main control board. If the main control board is in the process, the main control board is in the process. It is not necessary to obtain the result of the result message in the buffer before receiving the result message of the reply, so a delay protection process is needed here. The board agent process of the main control board determines whether the result packet sent by the CPU-free board is ready. That is, the thread that is used by the board proxy process to receive the result packet receives the result report corresponding to the read operation message. In the text, the result packet is marked with a ready flag (the flag is used to indicate that the result message is ready), and the thread used to send the read operation message in the board proxy process of the main control board detects the result message. When the ready-to-mark flag is used, the board agent process of the main control board receives the result packet sent by the CPU-free board when the result packet sent by the CPU-free board is ready. After the thread that sends the read operation message does not detect the ready flag on the result message, it waits for the preset waiting time (for example, 5ms), continues to detect the ready flag on the result message, and so on, until the single control board The thread used to send the read operation message in the board proxy process does not detect the ready flag on the result message or prompts the communication abnormality after a preset number of times (for example, 20 times).

In this embodiment, the board agent process of the main control board determines whether the result packet sent by the CPU-free board is ready. When the result packet sent by the CPU-free board is ready, the board agent process of the main control board receives. The result packet sent by the CPU-free board prevents the main control board from receiving the result packet or receiving the incorrect result packet to continue the subsequent steps. This improves the accuracy of communication between the main control board and the CPU-free board.

A fifth embodiment of the method for communicating with a central processing unit without a central processing unit is provided. In the fifth embodiment, the step S35 further includes a step. S36:

In step S36, the board proxy process of the main control board determines the result type of the result packet according to the type field in the received result packet.

For example, since the query PHY register is different from the number of bytes in the query CPLD register, the processing after receiving the result message is different. In this case, the result message needs to be classified and processed. The type field is added to the operation packet. After the CPU does not parse the read operation packet, the CPU continues to maintain the type field and encapsulates the type field into the result packet (that is, the result packet also contains the corresponding read operation message. In the type field, the board agent process of the main control board determines the result type of the result packet according to the type field in the received result packet, and then performs batch and centralized processing on the result packets of different structure types. The type field can be an IVH field in the Ethernet packet. This field is filled in when the read operation message is sent. The CPH chip response result message of the CPU-free board is automatically loaded with the filled IVH field value. This allows you to distinguish between different result types.

In this embodiment, by adding a type field to the read operation message, a type field is also added to the corresponding result packet, and the board proxy process of the main control board can send the result message according to the type field of the result packet. After the classification, the result packets of the same type are processed in batches, which improves the processing speed of the resulting packets and makes the communication between the main control board and the CPUless board more efficient.

The embodiment of the present invention further provides a communication device. In the first embodiment of the communication device according to the embodiment of the present invention, referring to FIG. 4, the communication device includes a CPU-free board 10 (the communication device may include multiple CPUless boards, The embodiment takes a CPUless board as an example) and the main control board 20.

The CPU-less board 10 includes a message reporting module 11 and a message communication module 12; the main control board 20 includes a process allocation module 21 and a board agent process module 22.

The process allocation module 21 is configured to allocate a single board proxy process to each CPUless board connected to the power-on state;

On the hardware, there is no CPU minimum system on the CPU-free board, and there is no FPGA (Field Programmable Gate Array). On the CPUless board, there is no need to run software programs and FPGA programs, and CPLD in the CPLD chip is used. The program works in conjunction with the board agent process on the main control board to implement all functions of the access board. Therefore, the process allocation module 21 of the main control board enables and allocates a single-board proxy process for each CPU-less board that is connected to the power-on state. The board proxy process can implement most functions of the CPU. The functions of accessing the board and reading and writing accessing the board registers are implemented by the board proxy process and the CPU-less board CPLD chip.

The board agent process module 22 is configured to send a control packet to the CPUless board corresponding to the board proxy process to control the corresponding CPUless board to perform read processing or write processing.

The control packet includes a write operation message and a read operation message, and the main control board passes the single board proxy process module. The control board sends a control packet to the corresponding CPU-free board to control the corresponding CPU-free board for read or write processing. That is, the main control board borrows the board proxy process instead of the CPU of the access board. The control board sends a control packet to the CPU-free board through the board proxy process to control the corresponding CPU-free board for read processing. Or write processing, that is, communication between the main control board and the CPUless board is realized.

The packet reporting module 11 is configured to send the report message of the board information of the CPUless board to the main control board after the board is powered off by the CPU;

The board information includes the board type, the board position, and the working status of the board. After the board is not powered by the CPU, the packet reporting module 11 of the CPUless board actively reports to the main control board through the CPLD chip. The status of the CPU-free board is updated, so that the main control board can update the status of the CPU-free board connected to it, so that the CPLD chip without the CPU board configures the chip device register and remote upgrade according to the request of the main control board. According to the request of the main control board, query the alarm performance of the board, and send the report packet to the main control board to send the CPU packet without the CPU. Communication with the main control board is more timely and effective.

The message communication module 12 is configured to receive the control message sent by the main control board, and perform read processing or write processing according to the received control message.

In this embodiment, the process allocation module 21 of the main control board 20 allocates a single board proxy process to each CPUless board 10 connected to the power-on state, and then the board agent process module of the main control board 20 The control packet is sent to the corresponding CPUless board through the board proxy process to control the corresponding CPUless board 10 to perform read processing or write processing, thereby implementing the between the CPUless board 10 and the main control board 20. Communication.

On the basis of the first embodiment of the communication device of the embodiment of the present invention, a second embodiment of the communication device is proposed. In the second embodiment, the control message includes a write operation message and a read operation message.

The board proxy process module 22 includes a first write unit 221, a first read unit 222, and a result processing unit 223. The message communication module 12 includes a second write unit 121 and a second read unit 122. The first write unit 221 is configured to send a write operation message including a corresponding configuration value and a configuration address of the write operation to the second write unit of the CPUless board when the CPU is not written by the board proxy process. .

When the main control board writes to the CPUless board through the board proxy process, the first write unit 221 controls the board proxy process to include a write operation packet corresponding to the configuration value and the configuration address of the write operation (the message is added). The Ethernet packets of the VLAN ID are sent to the CPU-free board. The write operation is to configure the correct configuration value to the chip register of the CPUless board according to the requirement. It is relatively simple, as long as the destination MAC address is as follows (as shown in Table 1). The media access control, the media access control layer, the VLAN, the virtual local area network (VLAN), the destination address of the board, and the operation code are correctly filled in. The VLAN ID is added to the board proxy process running on the main control board. The Ethernet packet is sent to the Ethernet port on the backplane. The backplane then forwards the Ethernet packet with the VLAN ID to the CPLD chip without the CPU. The CPLD chip parses the packet and reports it. The configuration values in the text are configured on the physical layer and optical module of the CPU-free board.

The first reading unit 222 is configured to send a read operation message including a chip register address corresponding to the read operation to the message communication module of the CPUless board when the CPU is not read by the board proxy process.

When the board agent process of the main control board performs a read operation on the CPUless board, that is, the board proxy process of the main control board needs to query the value of the chip register of the CPUless board, and the first read unit 222 will include the read operation. The read operation message of the chip register address is sent to the CPUless board. The first step is as follows: The first read unit 222 on the main control board controls the board proxy process to send read operation messages to the CPUless board. To query the CPU-free board chip register and its address; the second step: the result packet of the CPLD chip without the CPU board is sent back to the board agent process of the main control board. For the second step, the board proxy process of the main control board needs to enable a thread to receive the result packet sent by the CPUless board, and the first step of sending the read operation message and the second step receiving the result message. The operations are performed in two threads.

The result processing unit 223 is configured to receive the result message sent by the second read unit of the CPUless board, wherein the result message is an Ethernet message added with the preset virtual local area network VLAN identifier.

The result processing unit 223 of the main control board controls the board agent process to receive the result packet of the CPU-free board back-up for subsequent classification, analysis, or other processing, thereby completing the reading of the CPU board by the main control board. operating.

The second writing unit 121 is configured to parse the configuration value and the matching address from the received write operation message, and configure the configuration value into the chip register corresponding to the configuration address.

Referring to Figure 1, the board proxy process of the main control board is the same as the PHY (physical layer) chip, the clock chip, the temperature sensor, and the optical module (such as SFP (Small Form Pluggable). Pull out the optical module), restore the clock settings, etc. for initial configuration. All the initialization operations are carried out through the adaptation layer, and then converted into corresponding Ethernet packets, carrying the chip and address of the operation in the payload of the Ethernet packet. The second writing unit 121 controls the board proxy process to convert the commands into slot numbers, device numbers, write addresses, write data, and write operation codes for different devices connected to the board. The second writing unit 121 controls the board proxy process to send the information about the same write operation to the adaptation layer for Ethernet encapsulation adaptation, and converts the slot number into a different destination MAC address, VLAN, device number, write address, Write data and opcodes are encapsulated into an Ethernet payload. The Ethernet packet is sent to the corresponding CPU-free board through the L2 switch chip of the main control board. The CPLD without the CPU board parses the packet and performs the corresponding device write processing.

The second reading unit 122 is configured to parse the chip register address from the received read operation message, and encapsulate the destination information corresponding to the chip register address into a result message and send the result message to the main control board.

The second read unit 122 of the CPUless board parses the chip register address from the received read operation message, obtains the destination information corresponding to the address of the CPU chipless chip register address, and encapsulates the obtained destination information into the added VLAN identifier. The result packet of the Ethernet packet format is sent to the main control board in time.

In this embodiment, when the main control board needs to communicate with the CPUless board, the board agent process module 22 sends a control packet to the corresponding CPUless board to control the corresponding CPUless board to read. Processing or write processing; when the board proxy process of the main control board performs a write operation on the CPUless board, the first write unit 221 sends the write operation message to the CPUless board for the second of the CPUless board. The write unit 121 parses the write operation message and configures the configuration value into the chip register corresponding to the configuration address. When the board proxy process of the main control board performs a read operation on the CPUless board, the first read unit 222 reports the read operation. The message is sent to the CPU-free board, so that the second read unit 122 of the CPU-free board sends back the result packet according to the parsed read operation message, so that the message exchanges between the main control board and the CPU-free board is performed. The main control board sends a read operation message or a write operation message to the CPU-free board according to the actual requirements. The CPU-free board only parses and encapsulates the packet, and does not perform logic analysis and processing on the packet, thus implementing the main control board pair. The read operation and write operation of the CPU-free board realize the main No communication board and CPU board.

According to a second embodiment of the communication device of the embodiment of the present invention, a third embodiment of the communication device is proposed. In the third embodiment, the second reading unit 122 parses the chip register address from the received read operation message. Encapsulating the destination information corresponding to the chip register address into a result message sent to the result processing unit includes:

If no other read operation message is received and no result message is being encapsulated, the read operation message sent by the main control board is received.

Referring to FIG. 3, the main control board enables a single board proxy process to communicate with a CPUless board, and the board proxy process enables one thread to send read operation messages to the CPUless board, and one thread is responsible for receiving no CPU orders. The result packet sent by the CPLD chip of the board, when the CPLD chip of the CPU-free board receives the read operation message sent by the multiple threads at the same time, it detects whether the CPU-free board has received the read operation message at the current time and The read operation message is also processed (that is, the result message corresponding to the received read operation message is being encapsulated). If the CPU-free board has the result message being encapsulated at the current time, the second read unit 122 does not. Receiving the read operation message sent by the main control board; if the CPU-free board does not have the result packet being encapsulated at the current time, the second reading unit 122 continues to determine whether the CPU-free board receives multiple threads at the current time. The read operation message sent, if there are multiple threads to send the read operation message, the second reading unit 122 determines the priority of the read operation message according to the preset rule (for example, according to the arrival time of the read operation message, the length of the message, etc.) Level) Select and parse a read operation message. Then, the second reading unit 122 searches for the corresponding destination information according to the parsed chip register address, and sends the destination information packaged result message to the main control board (the main control board that sends the parsed read operation message).

A fourth embodiment of the communication device according to the embodiment of the present invention provides a fourth embodiment of the communication device. In the fourth embodiment, the result processing unit 223 further receives the result message sent by the second read unit, including:

Determines whether the result packet sent by the CPUless board is ready.

When the result packet sent by the CPU-free board is ready, the result packet sent by the CPU-free board is received.

After the board agent process of the main control board sends a read operation message to the CPU-free board, the CPLD reply result of the CPU-free board sends a packet to the board agent process of the main control board. If the main control board is in the process, the main control board is in the process. It is not necessary to obtain the result of the result message in the buffer before receiving the result message of the reply, so a delay protection process is needed here. The result processing unit 223 of the main control board first determines whether the result message sent by the CPUless board is ready, that is, the thread dedicated to receiving the result message by the board proxy process (the result processing unit 223 controls the thread) is receiving. When the result message corresponding to the read operation message is received, the result message is marked with a ready flag (this flag is used to indicate that the result message is ready), and is used to send a read operation message in the board proxy process of the main control board. When the thread (the first reading unit 222 controls the thread) detects the ready flag on the result packet, that is, when the result message sent by the CPUless board is ready, the result processing unit 223 of the main control board receives the CPUless board. The result packet sent; if the thread for sending the read operation message in the board proxy process of the main control board does not detect the ready flag on the result message, the result processing unit 223 waits for the pre-request Set the wait time (for example, 5ms), continue to detect the ready flag on the result message, and so on, until the thread used to send the read operation message in the board proxy process of the main control board does not detect the ready on the result message. The mark or the loop detection after a preset number of times (for example, 20 times) indicates that the communication is abnormal.

In this embodiment, the result processing unit 223 of the main control board determines whether the result message sent by the CPUless board is ready. When the result message sent by the CPUless board is ready, the result processing unit 223 of the main control board receives. The result packet sent by the CPU-free board prevents the main control board from receiving the result packet or receiving the incorrect result packet to continue the subsequent steps. This improves the accuracy of communication between the main control board and the CPU-free board.

A fifth embodiment of the communication device according to the embodiment of the present invention provides a fifth embodiment of the communication device. In the fifth embodiment, the read operation message and the result message include a type field.

The board agent process module 22 further includes:

The type processing unit 224 is configured to determine, after the result processing unit receives the result message sent by the CPUless board, the result type of the result message according to the type field in the received result message.

For example, since the query PHY register is different from the number of bytes in the Query CPLD register, the processing after receiving the result message is different. In this case, the result message needs to be classified, and the type field is added in the read operation message, and there is no CPU. The board continues to maintain the type field after parsing the read operation packet, and encapsulates the type field into the result packet (that is, the result packet also contains the type field corresponding to the read operation message), and the type of the main control board The processing unit 224 determines the result type of the result packet according to the type field in the received result packet, and then performs batch and centralized processing on the result packets of different structure types. The type field can be an IVH field in the Ethernet packet. This field is filled in when the read operation message is sent. The CPH chip response result message of the CPU-free board is automatically loaded with the filled IVH field value. This allows you to distinguish between different result types.

In this embodiment, by adding a type field to the read operation message, a type field is also added to the corresponding result message, and the type processing unit 224 of the main control board can send the result message according to the type field of the result message. The categorization is performed, and the result packets of the same type are processed in batches to improve the processing speed of the result packets, so that the communication between the main control board and the CPUless board is more efficient.

A computer readable storage medium storing computer executable instructions that, when executed by a processor, implement the method of communicating with a CPUless board.

Through the description of the above embodiments, those skilled in the art can clearly understand that the foregoing embodiment method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be through hardware, but in many cases, the former is better. Implementation. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium (such as ROM/RAM, disk). And an optical disc), including a method for causing a terminal device (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to perform each embodiment of the present invention.

One of ordinary skill in the art will appreciate that all or a portion of the steps of the above-described embodiments can be implemented using a computer program flow, which can be stored in a computer readable storage medium, such as on a corresponding hardware platform (eg, The system, device, device, device, etc. are executed, and when executed, include one or a combination of the steps of the method embodiments.

Alternatively, all or part of the steps of the above embodiments may also be implemented by using an integrated circuit. These steps may be separately fabricated into individual integrated circuit modules, or multiple modules or steps may be fabricated into a single integrated circuit module. achieve.

The devices/function modules/functional units in the above embodiments may be implemented by a general-purpose computing device, which may be centralized on a single computing device or distributed over a network of multiple computing devices.

When the device/function module/functional unit in the above embodiment is implemented in the form of a software function module and sold or used as a stand-alone product, it can be stored in a computer readable storage medium. The above mentioned computer readable storage medium may be a read only memory, a magnetic disk or an optical disk or the like.

Industrial applicability

Claims

A method of communicating with a CPU without a central processing unit CPU, comprising:

After the CPU is not powered by the CPU, the CPU-free board sends the report message of the board information of the CPU-free board to the main control board.

The main control board allocates a single board proxy process to each CPUless board that is connected to the main control board and is in a power-on state;

The main control board sends a control packet to the corresponding CPUless board through the board proxy process, and controls the corresponding CPUless board to perform read processing or write processing through the control packet;

The CPUless board receives the control message sent by the main control board, and performs read processing or write processing according to the received control message.
The method of communicating with a CPU-less board according to claim 1, wherein the reported message and the control message are Ethernet packets added with a preset virtual local area network VLAN identifier.
The method of communicating with a CPU-less board according to claim 1, wherein the control message comprises a write operation message and a read operation message;

The main control board sends a control packet to the corresponding CPUless board through the board proxy process, and the control of the corresponding CPUless board for reading or writing processing includes:

When the main control board writes the CPUless board through the board proxy process, the write operation message including the corresponding configuration value and the configuration address of the write operation is sent to the CPUless board. ;

The CPU-free board parses a configuration value and a matching address from the received write operation message, and configures the configuration value into a chip register corresponding to the configuration address;

When the main control board performs a read operation on the CPUless board through the board proxy process, the read operation message including the chip register address corresponding to the read operation is sent to the CPUless board;

The CPU-free board parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message and sends the result message to the main control board;

The board proxy process of the main control board receives the result packet sent by the CPUless board, where the result packet is an Ethernet packet that adds a preset virtual local area network VLAN identifier.
The method of communicating with a CPUless board according to claim 3, wherein the CPUless board parses a chip register address from the received read operation message and corresponds to the chip register address. The destination information is encapsulated into a result message sent to the main control board, including:

If no other read operation message is received and no result packet is being encapsulated, the CPUless board receives the read operation message sent by the main control board;

The CPU-free board parses the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message and sends the result message to the main control board.
The method of communicating with a CPU-less board according to claim 3, wherein the board agent process of the main control board receives the result message sent by the CPUless board, including:

The board proxy process of the main control board determines whether the result packet sent by the CPUless board is ready.

When the result packet sent by the CPUless board is ready, the board proxy process of the main control board receives the result packet sent by the CPUless board.
The method of communicating with a CPU-free board according to claim 3, wherein the read operation message and the result message include a type field;

The method further includes: after the board proxy process of the main control board receives the result packet sent by the CPUless board, the board proxy process of the main control board is based on the type of the received result message Field to determine the result type of the result message.
A communication device includes a CPU board without a central processing unit and a main control board;

The CPU-less board includes: a message reporting module and a message communication module; the main control board includes: a process allocation module and a message communication module;

The packet reporting module is configured to send the report message of the board information of the CPUless board to the process allocation module after the board is not powered by the CPU;

The process allocation module is configured to allocate a single board proxy process to each CPUless board connected to the main control board and in a power-on state;

The board proxy process module is configured to send a control packet to the corresponding CPUless board through the board proxy process, and control the corresponding CPUless board to perform read processing or write processing;

The message communication module is configured to receive a control message sent by the board agent process module, and perform read processing or write processing according to the received control message.
The communication device of claim 7, wherein the reported message and the control message are Ethernet packets added with a preset virtual local area network VLAN identifier.
The communication device of claim 7, wherein the control message comprises a write operation message and a read operation message;

The single board proxy process module includes a first write unit, a first read unit, and a result processing unit;

The message communication module includes a second write unit and a second read unit;

The first write unit is configured to send a write operation message including the write operation corresponding configuration value and the configuration address to the second when the CPU-free board performs a write operation by the board proxy process Write unit

The second write unit is configured to parse the configuration value and the matching address from the received write operation message, and configure the configuration value into the chip register corresponding to the configuration address;

The first reading unit is configured to send a read operation message including a chip register address corresponding to the read operation to the message communication when the CPU-free board performs a read operation by the board proxy process Module

The second reading unit is configured to parse the chip register address from the received read operation message, and encapsulate the destination information corresponding to the chip register address into a result message and send the result message to the result processing unit;

The result processing unit is configured to receive the result message sent by the second read unit, where the result message is an Ethernet message that adds a preset virtual local area network VLAN identifier.
The communication device according to claim 9, wherein

The second reading unit parses out the chip register address from the received read operation message, and encapsulates the destination information corresponding to the chip register address into a result message and sends the result to the result. The processing unit includes:

Receiving the read operation message sent by the main control board if no other read operation message is received and there is no result message being encapsulated;

The chip register address is parsed from the received read operation message, and the destination information corresponding to the chip register address is encapsulated into a result message and sent to the result processing unit.
A communication device according to claim 9, wherein:

Receiving, by the result processing unit, the result message sent by the second reading unit includes:

Determining whether the result packet sent by the CPUless board is ready;

When the result packet sent by the CPUless board is ready, the result packet sent by the CPUless board is received.
The communication device of claim 9, wherein the read operation message and the result message include a type field;

The single board agent process module further includes:

The type processing unit is configured to determine, after the result processing unit receives the result message sent by the CPUless board, the result type of the result message according to the type field in the received result message.
A computer readable storage medium storing computer executable instructions that, when executed by a processor, implement the method of communicating with a CPU without a central processing unit CPU as claimed in any one of claims 1 to 6.