CN103813109B - A kind of CCD camera focal plane two-way drive circuit - Google Patents
A kind of CCD camera focal plane two-way drive circuit Download PDFInfo
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- CN103813109B CN103813109B CN201410035672.6A CN201410035672A CN103813109B CN 103813109 B CN103813109 B CN 103813109B CN 201410035672 A CN201410035672 A CN 201410035672A CN 103813109 B CN103813109 B CN 103813109B
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Abstract
The invention provides a kind of CCD camera focal plane two-way drive circuit, including clamped level circuit, Sensor gain and phase perturbations regulation circuit, two-way power amplifier, RC waveform circuit and block isolating circuit.Two-way power amplifier is for driving the high-frequency signal of higher load, and original signal is divided into two-way being remerged by power amplifier respectively is a road signal；Driving signal phase regulation before the regulation of simple two-way signal discordance will merge with amplifier threshold voltage by means of RC waveform circuit is consistent；Signal, every being directly two driving target signal filter DC component after being combined, obtains driving signal communication component used under this frequency range；Signal level clamped by clamped for the drive signal level after straight in the level range meeting CCD requirement.Input signal is resynthesis after two-way power amplifier, makes this two-way drive circuit obtain load capacity and is greatly enhanced, and drives the rise time of signal significantly to reduce, solves the problem that high speed heavy load driving force is not enough.
Description
Technical field
The present invention relates to CCD camera focal plane high-speed driving technical field, in particular it relates to a kind of CCD camera
Focal plane drive circuit.
Background technology
Along with the high speed development of space remote sensing CCD camera technology and gradually stepping up of user's request, China navigates
The requirement of resolution is risen year by year by it remote sensing CCD camera.Along with the raising of resolution, system line frequency also line
Property increase, thus it requires CCD pixel frequency and drive clock frequency improve simultaneously.Therefore bear the big of CCD
How improving high-frequency drive ability under load is the greatest problem that CCD focal plane circuit faces at present.
Every kind of CCD device is required for multiple driving signal.CCD is directly driven by the raising of Optical Resolution of Imaging System
Move the rise time of signal, minimum sets up the retention time and noise has strict requirements.At present, high score
Power amplifier chip high-grade under resolution is unable to reach requirements above.Meanwhile, CCD drives the height of signal
The precision of level also has the strict requirements of mV level, and level is of a great variety, if power supply introduces to become one by one
Increase the complexity of design again, and be readily incorporated the more power supply noise of imaging system, reduce the letter of system
Make an uproar ratio.Meanwhile, for power distribution voltage once it is determined that, drive signal high and low level value will be unable to adjust,
Its precision often can not meet the requirement driving signal, easily causes the damage of CCD device, or affects CCD
The output accuracy of device.
Summary of the invention
The technical problem to be solved in the present invention is: overcomes the problem that existing type of drive driving force is not enough, carries
For a kind of CCD camera focal plane two-way drive circuit, it relies on Sensor gain and phase perturbations regulation to make signal pass through respectively
Two-way power amplifier remerges.This circuit is greatly improved the driving force under high frequency heavy load to CCD.
The present invention solves the technical scheme of above-mentioned technical problem and includes:
A kind of CCD camera focal plane two-way drive circuit, including: clamped level circuit, Sensor gain and phase perturbations are adjusted
Economize on electricity road, the first power amplifier and the second power amplifier, RC waveform circuit and block isolating circuit,
Wherein,
Clamped level circuit include the first resistance, the second resistance, the 3rd resistance, the 4th resistance, diode,
And the 3rd electric capacity, described first resistance and the 3rd resistor coupled in parallel connect and compose the first parallel circuit, and described
Two resistance and the 4th resistor coupled in parallel connect and compose the second parallel circuit, and one end of the first parallel circuit connects
Reference potential, one end of the other end and the second parallel circuit is connected in series in, and the other end of the second parallel circuit
Clamped level input as described CCD camera focal plane two-way drive circuit；One end and two of 3rd electric capacity
The anode tap of pole pipe is commonly connected between the first parallel circuit and the second parallel circuit, another of the 3rd electric capacity
End connects reference potential, and the cathode terminal of diode is as the outfan of described clamped level circuit；
Described Sensor gain and phase perturbations regulation circuit includes the 7th resistance, the 4th electric capacity, the 8th resistance, Yi Ji
Five electric capacity, described 7th resistance and the 4th electric capacity are connected in series in constituting the first series circuit, described 8th resistance
It is connected in series in constituting the second series circuit with the 5th electric capacity, and the first series circuit and the second series circuit
One end links together and constitutes the signal input part of described CCD camera focal plane two-way drive circuit, and the other end is equal
It is connected to reference potential；
The input of described first power amplifier is connected between described 7th resistance and the 4th electric capacity, output
The one end of the 5th resistance that end is connected in described RC waveform circuit；The input of described second power amplifier
End is connected between described 8th resistance and the 5th electric capacity, and outfan is connected in described RC waveform circuit
One end of 6th resistance；
Described RC waveform circuit includes the 5th resistance, the 6th resistance and the first electric capacity, described 5th electricity
The other end of resistance and the other end of the 6th resistance are connected to one end of described first electric capacity, described first electric capacity
The other end connect reference potential；And
Described block isolating circuit is realized by the second electric capacity, and one end of described second electric capacity is connected to described first electric capacity
The one end being connected with described 6th resistance and described 5th resistance, the other end of described second electric capacity is with described
It is defeated that the cathode terminal of diode is connected in parallel the signal as described CCD camera focal plane two-way drive circuit
Go out end.
Compared with prior art, possesses useful skill according to the CCD camera focal plane two-way drive circuit of the present invention
Art effect:
In the CCD camera focal plane two-way drive circuit according to the present invention, input signal is put by two-way power
Resynthesis after big so that this two-way drive circuit obtains load capacity and is greatly enhanced, drives the rise time of signal
Significantly reduce, thus the driving signal of upper frequency can be driven, solve current high speed heavy load driving force
Not enough problem.Consider for input signal cabling discordance, chip differences etc., introduce at input
RC delay circuit, relies on the feature of driving element input threshold, the theoretical regulation driver of application RC time delay
The phase of output signal of part, solves simple two-way signal Sensor gain and phase perturbations after power amplification and causes synthesis letter
Number distortion and device damage.The introducing of waveform electric capacity can accurate adjustment merge after drive signal waveform and intersect edge
Deng, optimize the transfer efficiency of CCD, it is suppressed that the substrate bounce of CCD.It addition, clamp circuit can be not
In the case of increasing external input power, realized driving by the input level value selecting control circuit flexibly
The high and low level of signal is controlled, and decreases the quantity of power supply, reduces the complexity of power supply,
Improve the precision of output signal.
Accompanying drawing explanation
Fig. 1 is the CCD camera focal plane two-way drive circuit schematic diagram according to the present invention.
Detailed description of the invention
As it is shown in figure 1, include according to the CCD camera focal plane two-way drive circuit of the present invention: clamped level electricity
Road, Sensor gain and phase perturbations regulation circuit, the first power amplifier 211 and the second power amplifier 212, RC
Waveform circuit and block isolating circuit.There is two-way power amplification, the regulation of simple two-way signal discordance, letter
Number waveform, signal are every straight and clamped five partial functions of signal level.
Specifically, clamped level circuit includes the first resistance (R1) the 231, second resistance (R2) the 232, the 3rd
Resistance (R3) the 233, the 4th resistance (R4) 234, diode (D1) 221 and the 3rd electric capacity (C3) 243.
First resistance 231 and the 3rd resistance 233 are connected in parallel composition the first parallel circuit, the second resistance 232 and the
Four resistance 234 are connected in parallel composition the second parallel circuit, and one end of the first parallel circuit connects with reference to electricity
Position, one end of the other end and the second parallel circuit is connected in series in, and the other end of the second parallel circuit is as CCD
The clamped level input 202 of camera focal plane two-way drive circuit；One end of 3rd electric capacity 243 and diode
The anode tap of 221 is commonly connected between the first parallel circuit and the second parallel circuit, the 3rd electric capacity 243
The other end connects reference potential, and the cathode terminal of diode 221 is as the outfan of clamped level circuit.
Sensor gain and phase perturbations regulation circuit includes the 7th resistance (R7) the 237, the 4th electric capacity (C4) the 244, the 8th
Resistance (R8) 238 and the 5th electric capacity (C5) 245, the 7th resistance 237 and the 4th electric capacity 244 series winding are even
Connecing composition the first series circuit, the 8th resistance 238 and the 5th electric capacity 245 are connected in series in constituting the second series winding electricity
Road, and to be connected in parallel composition CCD camera burnt in one end of the first series circuit and the second series circuit
The signal input part 201 of face two-way drive circuit, the other end is connected to reference potential.
First power amplifier (A1) 211 input be connected to the 7th resistance 237 and the 4th electric capacity 244
Between, outfan is connected to the 5th resistance (R in RC waveform circuit5) 235 one end；Second power
Amplifier (A2) 212 input be connected between the 8th resistance 238 and the 5th electric capacity 245, outfan is even
It is connected to the 6th resistance (R in RC waveform circuit6) 236 one end.
RC waveform circuit includes the 5th resistance the 235, the 6th resistance 236 and the first electric capacity (C1) 241.
The other end of the 5th resistance 235 and the other end of the 6th resistance 236 are connected to one end of the first electric capacity 241,
The other end of the first electric capacity 241 connects reference potential.
Block isolating circuit is by the second electric capacity (C2) 242 realizations.One end of second electric capacity 242 is connected to the first electric capacity
One end being connected with the 6th resistance 236 and the 5th resistance 235 of 241, the other end of the second electric capacity 242 with
It is defeated that the cathode terminal of diode 221 is connected in parallel the signal as CCD camera focal plane two-way drive circuit
Go out end 203.
Wherein, the second electric capacity 242 is capacitance, the first electric capacity the 241, the 4th electric capacity 244 and the 5th electricity
Holding 245 is waveform electric capacity, and the 3rd electric capacity 243 is filter capacitor.First resistance the 231, second resistance 232,
3rd resistance 233 and the 4th resistance 234 are clamped resistance, the 5th resistance 235 and the 6th resistance 236
For current-limiting resistance.
Two-way power amplifier is the high-frequency signal in order to drive higher load, original signal is divided into two-way respectively
Remerged by power amplifier is a road signal.If the signal phase before He Binging is inconsistent, driving after merging
Dynamic signal will produce distortion.Therefore, before Sensor gain and phase perturbations regulation needs will to merge by means of RC circuit
Drive signal phase regulation consistent.Its principle is dependent on regulation and the driving element input gate of input RC time delay
Voltage limit, carries out time delay to the output waveform of driving element.Signal waveform is the driving signal after merging
Relying on waveform capacitive vernier, cause in order to suppress drive signal current excessive crosses punching, adjustment driving letter
Number intersect edge, simultaneously suppression CCD substrate bounce phenomenon.Signal is every being directly two driving signal filters after being combined
Except DC component, obtain driving signal communication component used under this frequency range, capacitance choose needs
The size driving pin load according to input signal frequency range on every path and CCD determines.Clamped
Level circuit is used for clamped for the drive signal level after straight to meeting in the level range that CCD requires.
The 7th resistance 237 and the is sequentially passed through via the Article 1 path of signal of signal input part 201 input
The phase adjustment block of four electric capacity 244 compositions, the first power amplifier 211 and the 5th resistance 235.Wherein,
4th electric capacity 244, in order to regulate signal waveform, makes the startup time of power amplifier delay, thus regulates defeated
Go out the phase place of signal.Via the Article 2 path of signal of signal input part 201 input successively through the 8th resistance
238 and the 5th electric capacity 245 composition phase adjustment block, the second power amplifier 212 and the 6th resistance
236.Effect the 4th electric capacity 244 of the 5th electric capacity 245.Meanwhile, the 5th resistance 235 and the 6th resistance 236
Play the effect of output current limiting, merged into by two articles of paths after the 5th resistance 235 and the 6th resistance 236
Article one, path.Driving signal after merging on the one hand through waveform electric capacity the first electric capacity 241 with reference to (or
Claim reference signal) connect.First electric capacity 241 and the 5th resistance 235 and the 6th resistance 236 constitute again RC
Low pass filter, in order to filter the high-frequency noise of output signal.Driving signal after merging the most also through every
Straight electric capacity the second electric capacity 242, to filter the DC component of output signal.Clamped resistance the first resistance 231,
Two resistance the 232, the 3rd resistance 233 and the 4th resistance the 234, the 3rd electric capacity 243 and diodes 221
Constitute clamped level circuit.Wherein, the first resistance 231 and the second resistance 232 are roughly adjusted rheostat, the 3rd
Resistance 233 and the 4th resistance 234 are accurate adjustment resistance, and the datum of signal is by roughly adjusted rheostat and accurate adjustment resistance
Dividing potential drop is formed.3rd electric capacity 243 is the filter capacitor of datum.Signal level when diode cathode end
During more than the datum of its anode tap, diode 221 disconnects, and signal level normally exports signal output
End；When signal level is less than datum, diode 221 turns on, and the most clamped datum exports
Signal output part.Thus reached clamped for the high level of signal level to the purpose specifying datum.If
Diode 221 in Fig. 1 reversely can be connected by clamped for the low level of signal level to specifying datum
Connect.That is, if clamped level circuit is that low level is clamped, the cathode terminal of diode 221 and capacitance 242
The other end connect as signal output part 203；If clamped level circuit is that high level is clamped, then diode
The anode tap of 221 is connected as signal output part 203 with the other end of capacitance 242.
Sensor gain and phase perturbations regulates: when CCD type of drive difference, the cycle T of drive signal waveform and ripple
The relation of the timeconstantτ of shape is different.The working mechanism of two-phase-region casting pulse and three-phase, four drivings mutually
Pulse is different, owing to two-phase-region casting pulse has the potential well of a constant depth all the time, so it is by level
Complete the transfer of electric charge.Two-phase-region casting pulse is stricter to the duty-cycle requirement of timing waveform, it should limit
About 50%, such guarantee electric charge is identical for transfer time through different potential wells.For the RC time
Constant, τ, voltage, after a timeconstantτ, can rise to the 63.2% of amplitude；Through two times
After constant 2 τ, voltage can rise to the 86.5% of amplitude.When recording the rise time of waveform at ordinary times and decline
Between all referring to amplitude from the time of 10%-90%, therefore can be the rise and fall time approximation recorded at ordinary times
Regard the time constant of 2 times as.
Before regulation, the phase contrast T of the output waveform after first amplifying with oscilloscope measurementdelay.Needs are postponed
The electric capacity of input channel corresponding to waveform strengthen.Design parameter value is chosen need to be according to two passage present load electricity
Depending on holding C.According to formula Tdelay=(2τ1-2τ2) × n, can pass through capacitance value thus reach to regulate power
Phase of output signal after amplification, n is different chip threshold voltage value coefficients, can push away according to measured value is counter
Arrive；τ1、τ2It is respectively the time constant of two path signal.Wherein, timeconstantτ=RC.R is signal
Resistance value on line, C is load capacitance value.
Choosing of power amplifier: first, according to imaging system total score separate out this CCD the time of integration and
Operating frequency.Afterwards, need to select to drive the type of drive of signal according to concrete CCD kind.According to driving
Mode and phase relation determine the driving frequency of signal, rise time, the retention time etc..Then, with according to negative
Carry size and driving signal frequency determines load current.Finally, according to rise time, load current, static state
Operating point power consumption comprehensively chooses satisfactory power amplifier.
Choosing of waveform electric capacity: by above to Sensor gain and phase perturbations regulation narration known to, time constant with
The relation in cycle should be τ=T/4.When choosing waveform electric capacity, according to time constant formula τ=RC and upper
State the corresponding relation of time constant and cycle, can accurately calculate waveform capacitance.Meanwhile,
Five resistance 235 and the 6th resistance 236 play output current limiting effect.The size of electric current can affect driving element band
Loading capability.Therefore, the 5th resistance and the 6th resistance are chosen and should consider load capacity, it is also contemplated that
The heat power consumption of resistance.
Choosing of capacitance: the second electric capacity 242 has filtered the DC component on output channel.Meanwhile, right
In AC portion, current-limiting resistance the 5th resistance 235 and the 6th resistance 236, capacitance 242 and CCD
Load capacitance constitutes a bleeder circuit.Therefore, capacitance C2Choose should as far as possible much larger than CCD bear
Carry capacitance so that capacitance C2Dividing potential drop effect the least.Specifically calculate by shown in below equation: In formula, VHFor signal communication voltage max,For every
Straight electric capacity C2Partial pressure value, CLFor the load capacitance of CCD, ω is signal frequency, and j is imaginary part.Thus public
Formula understands, when capacitance capacitance is more than 100 times of load capacitances, and the magnitude of voltage of capacitance institute dividing potential drop
Less than 0.01VH, negligible.
Choosing of clamped resistance: the first resistance 231 and the second resistance 232 are roughly adjusted rheostat.Measuring reality
After voltage, the magnitude of voltage that can change as required calculates accurate adjustment resistance the 3rd resistance 233 and the 3rd resistance 234.
Illustrating, it is assumed that it is clamped that clamp circuit chooses high level, the input of clamped level is VINT.Assume certain
CCD drives signal measured value to be VC, CCD drives the clamped normal voltage of signal to be VP.And actual measurement voltage is more than thick
Adjust voltage.Virtual voltage and the difference of coarse tuning voltageAdd accurate adjustment resistance the 3rd electricity
After resistance 233, predicted voltage value isAnti-essence can be released according to this formula
Adjust the resistance value of resistance the 3rd resistance 233.When actual measurement voltage is less than coarse tuning voltage, in like manner can obtain accurate adjustment electricity
Hinder the resistance value of the 4th resistance 234.Low level is clamped the most also can be calculated.Meanwhile, in order to reduce power supply merit
Consumption, should choose the biggest resistance, reduce clamped electric current.
It will be appreciated to those of skill in the art that unspecified content in this specification, be this area
Technical staff is according to the description of this specification and combines what prior art can be easily achieved, does not does
Describe in detail.
The foregoing is only the preferred embodiments of the present invention, but protection scope of the present invention be not limited thereto,
Any those familiar with the art in the technical scope that the invention discloses, the change that can readily occur in
Change or replace, all should contain within protection scope of the present invention.
Claims (1)
1. a CCD camera focal plane two-way drive circuit, it is characterised in that including: clamped level circuit,
Sensor gain and phase perturbations regulation circuit, the first power amplifier (211) and the second power amplifier (212), RC
Waveform circuit and block isolating circuit, wherein,
Described clamped level circuit include the first resistance (231), the second resistance (232), the 3rd resistance (233),
4th resistance (234), diode (221) and the 3rd electric capacity (243), described first resistance (231)
It is connected in parallel composition the first parallel circuit, described second resistance (232) and the 4th with the 3rd resistance (233)
Resistance (234) is connected in parallel composition the second parallel circuit, and one end of the first parallel circuit connects with reference to electricity
Position, one end of the other end and the second parallel circuit is connected in series in, and the other end of the second parallel circuit is as institute
State the clamped level input (202) of CCD camera focal plane two-way drive circuit；The one of 3rd electric capacity (243)
The anode tap of end and diode (221) is commonly connected between the first parallel circuit and the second parallel circuit, the
The other end of three electric capacity (243) connects reference potential, and the cathode terminal of diode (221) is as described embedding
The outfan of bit level circuit；
Described Sensor gain and phase perturbations regulation circuit include the 7th resistance (237), the 4th electric capacity (244), the 8th
Resistance (238) and the 5th electric capacity (245), described 7th resistance (237) and the 4th electric capacity (244)
It is connected in series in constituting the first series circuit, described 8th resistance (238) and the 5th electric capacity (245) series winding even
Connect composition the second series circuit, and one end of the first series circuit and the second series circuit links together structure
Becoming the signal input part (201) of described CCD camera focal plane two-way drive circuit, the other end is connected to reference
Current potential；
The input of described first power amplifier (211) is connected to described 7th resistance (237) and the 4th
Between electric capacity (244), outfan is connected to of the 5th resistance (235) in described RC waveform circuit
End；The input of described second power amplifier (212) is connected to described 8th resistance (238) and the 5th
Between electric capacity (245), outfan is connected to of the 6th resistance (236) in described RC waveform circuit
End；
Described RC waveform circuit includes the 5th resistance (235), the 6th resistance (236) and the first electric capacity
(241), the described other end of the 5th resistance (235) and the other end of the 6th resistance (236) are connected to
One end of described first electric capacity (241), the other end of described first electric capacity (241) connects reference potential；
And
Described block isolating circuit is realized by the second electric capacity (242), and one end of described second electric capacity (242) connects
To being connected with described 6th resistance (236) and described 5th resistance (235) of described first electric capacity (241)
One end, the other end of described second electric capacity (242) is in parallel with the cathode terminal of described diode (221) even
Be connected together the signal output part (203) as described CCD camera focal plane two-way drive circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410035672.6A CN103813109B (en) | 2014-01-24 | 2014-01-24 | A kind of CCD camera focal plane two-way drive circuit |
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| CN201410035672.6A CN103813109B (en) | 2014-01-24 | 2014-01-24 | A kind of CCD camera focal plane two-way drive circuit |
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| CN103813109B true CN103813109B (en) | 2017-01-04 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN201114407Y (en) * | 2007-10-30 | 2008-09-10 | 北京空间机电研究所 | Time sequence driving circuit for remote sensing CCD camera focus plane |
| CN201114405Y (en) * | 2007-09-29 | 2008-09-10 | 北京空间机电研究所 | Remote sensing CCD camera driving circuit |
| CN102158658A (en) * | 2011-01-26 | 2011-08-17 | 中国科学院长春光学精密机械与物理研究所 | System for realizing peculiar driving signal of electron-multiplying charge coupled device (EMCCD) |
| CN202395875U (en) * | 2011-11-22 | 2012-08-22 | 北京空间机电研究所 | Waveform driving circuit of remote sensing charge coupled device (CCD) camera |
| CN103108141A (en) * | 2013-01-30 | 2013-05-15 | 中国科学院长春光学精密机械与物理研究所 | Electron multiplying charge coupled device (EMCCD) drive circuit based on autotransformer |
-
2014
- 2014-01-24 CN CN201410035672.6A patent/CN103813109B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201114405Y (en) * | 2007-09-29 | 2008-09-10 | 北京空间机电研究所 | Remote sensing CCD camera driving circuit |
| CN201114407Y (en) * | 2007-10-30 | 2008-09-10 | 北京空间机电研究所 | Time sequence driving circuit for remote sensing CCD camera focus plane |
| CN102158658A (en) * | 2011-01-26 | 2011-08-17 | 中国科学院长春光学精密机械与物理研究所 | System for realizing peculiar driving signal of electron-multiplying charge coupled device (EMCCD) |
| CN202395875U (en) * | 2011-11-22 | 2012-08-22 | 北京空间机电研究所 | Waveform driving circuit of remote sensing charge coupled device (CCD) camera |
| CN103108141A (en) * | 2013-01-30 | 2013-05-15 | 中国科学院长春光学精密机械与物理研究所 | Electron multiplying charge coupled device (EMCCD) drive circuit based on autotransformer |
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