CN103812731B - Digitization sampling time delay frequency conversion measuring method and measuring system - Google Patents
Digitization sampling time delay frequency conversion measuring method and measuring system Download PDFInfo
- Publication number
- CN103812731B CN103812731B CN201410074461.3A CN201410074461A CN103812731B CN 103812731 B CN103812731 B CN 103812731B CN 201410074461 A CN201410074461 A CN 201410074461A CN 103812731 B CN103812731 B CN 103812731B
- Authority
- CN
- China
- Prior art keywords
- message
- time delay
- frequency
- point
- mutual inductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000005070 sampling Methods 0.000 title claims abstract description 84
- 238000000034 method Methods 0.000 title claims abstract description 50
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 35
- 230000008569 process Effects 0.000 claims abstract description 11
- 238000004088 simulation Methods 0.000 claims description 75
- 238000005259 measurement Methods 0.000 claims description 39
- 230000005540 biological transmission Effects 0.000 claims description 21
- 238000004364 calculation method Methods 0.000 claims description 14
- 230000002123 temporal effect Effects 0.000 claims description 5
- 239000000203 mixture Substances 0.000 claims description 4
- 238000012360 testing method Methods 0.000 abstract description 2
- 238000000691 measurement method Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
The invention discloses a digitization sampling time delay frequency conversion measuring method, and the method measures the non integer period time delay to the different frequency steady state analog quantity signals from an electronic transformer or analog inputting and merging unit to obtain the inertial time delay to all frequency signals from the digitization sampling process, including the non integer period time delay and integer period time delay, compensates the sending time difference for SV message based on the transmit frequency of the phaselock technique tracking SV message, reduces the influence caused by the sending time difference for SV message, and raises the digitization sampling time delay measuring precision. The invention also discloses a test system based on the method for ensuring the reliable application of the electronic transformer and the analog inputting and merging unit in the intelligent substation, eliminating the potential safety hazard of the electronic transformer and the analog inputting and merging unit on engineering application, raising the second-order system running veracity for the intelligent substation and having significance to the safe and reliable operation for the intelligent substation.
Description
Technical field
The present invention relates to a kind of digitized sampling time delay frequency conversion measuring method and measuring system, belong to power automation technology
Field.
Background technology
Electronic mutual inductor includes electronic current mutual inductor (abbreviation ECT, i.e. Electronic Current
) and electronic type voltage transformer (abbreviation EVT, i.e. Electronic Voltage Transformer) Transformer.Simulation
Amount input combining unit refers to directly receive the combining unit of the secondary analog output of routine transformer, is such as used for connecting bus
The combining unit of TV.Electronic mutual inductor and analog input combining unit are all to be digitized adopting by the input of analog quantity
Sample, final output digital quantity.Digitized sampling instead of the cable transmission of routine with fiber optic network transmission, such that it is able to avoid electricity
The problems such as cable multiple spot contact, Current Transformer Secondary open circuit, voltage transformer secondary short circuit, long range propagation loss are big, and adopt
The digitalized network transmission means of sample value is conducive to the shared of data, adapts to intelligent substation developing direction.Therefore, electronic type is mutual
The digitized sampling mode of sensor and simulation input combining unit is widely applied in intelligent substation.
The digitized sampling of electronic mutual inductor and analog input combining unit all needs at data acquisition, data
The links such as reason, wait and transmission, need the regular hour.Wherein, data acquisition, data processing and wait link are generally basede on
Interruption completes, and Interruption is usually the integral multiple in sampling period, and the time needed for these links is longer, is whole sampling
The major part of time delay, reaches ms level.And the time delay of data is activation and transmission link has certain uncertainty, but this part is prolonged
When little, less to total delay of whole sampling element.
The time delay of digitized sampling can be divided into time delay complete cycle and non-integer-period time delay.In intelligent substation, relay protection
Sampling, in the application of point-to-point direct sampling such as cascade between combining unit it is necessary to row interpolation is entered based on the time delay of sampling element
Realize data syn-chronization, in these applications, sampling time delay must accurate measurement as an important parameter.Intelligent substation is accordingly advised
Require digitized sampling time delay can not be more than 2ms in model, when digitized sampling has N number of time delay complete cycle, in order in form full
Sufficient technical requirements, electronic mutual inductor or combining unit manufacturer may be by SV (Sampled Value, i.e. sampled value) messages
Sequence number to move forward N number of cycle, at this point for applications such as the metering sampled based on external clocking signals, observing and controlling, failure wave-recordings
Certainty of measurement also has an impact.Therefore, the time delay of digitized sampling, as key parameter, must assure that in engineer applied that it is correct
Property.
At present, digitized sampling Time delay measurement method is usually electron formula transformer or analog input combining unit is applied
Plus the power current of stable state or voltage, then utilize the phase angle relationship of power frequency component between master die analog quantity and tested SV data
Indirectly to measure the time delay of digitized sampling.This measuring method is in order to correct measurement phase relation it is necessary to apply stable state
Analog quantity, for periodic signal, there is certain phase contrast in the waveform after non-integer-period time delay and original signal waveform, because
This can obtain the non-integer-period time delay of digitized sampling by the method that this measurement equilibrium transport potential difference is then converted into the time.
And for signal steady-state period, be completely superposed with original signal after time delay complete cycle, there is not phase contrast, therefore cannot
Method using this measurement equilibrium transport potential difference measures time delay complete cycle.At present, also a kind of digitized sampling delay test
Method is：In synchronous mode, obtained by the time difference measuring between the transmission time of 0 sequence number SV message and synchronizing signal
Digitized sampling time delay.But this method has artificial reach or the rear phenomenon moved cannot detect for SV test serial number, therefore
Also cannot correct measurement digitized sampling time delay complete cycle.
Data acquisition, data processing, wait during the digitized sampling of electric mutual inductor and simulation input combining unit
And transmission etc. link be consistent for the time needed for various input signals, the time delay that this embodies digitized sampling is one
Individual group delay, the time delay for the signal of various frequencies is identical.For steady-state period signal, this time delay can divide
For time delay complete cycle and non-integer-period time delay, wherein non-integer-period time delay can be by measuring between digitized sampling input and output
The method of phase contrast measures, but time delay complete cycle is difficult to and measures.Time delay complete cycle is for relay protection application
Speech may cause incorrect operation, also can cause accuracy error, therefore also must be able to accurately enough know for metering, observing and controlling
Not.
Therefore, it is necessary to adopt a kind of new digitized sampling Time delay measurement method and measuring system, can accurately measure
Go out time delay complete cycle in digitized sampling link and non-integer-period time delay, eliminate electronic mutual inductor and analog input merges
Element project application in potential safety hazard, improve secondary system of intelligent substation run accuracy, to intelligent substation safe,
Reliability service is significant.
Content of the invention
It is an object of the invention to provide a kind of digitized sampling time delay frequency conversion measuring method, solve existing measuring method
The problem of time delay complete cycle in digitized sampling link can not be accurately measured, also provide based on this measuring method simultaneously
Measuring system, overcome the potential safety hazard in electronic mutual inductor and analog input combining unit engineer applied.
In order to solve above-mentioned technical problem, the technical solution adopted in the present invention is：
A kind of digitized sampling time delay frequency conversion measuring method, comprises the following steps,
Step one, electron formula transformer or analog input combining unit incoming frequency are f1Steady-state simulation amount letter
Number；
Step 2, measurement frequency is f1Steady-state simulation amount signal merge through electronic mutual inductor or analog input single
The forward and backward phase contrast of unitCalculating frequency in conjunction with phase calculation point time difference compensation and SV message transmission shake time difference compensation is
f1Steady-state simulation amount signal time delay aperiodic Td1_NP, by time delay aperiodic Td1_NPAcquisition frequency is f1Steady-state simulation amount
Full time delay T after digitized sampling for the signald1=Td1_NP+m1T1, T1=1/f1, m1For nonnegative integer；
Step 3, electron formula transformer or analog input combining unit incoming frequency are f2Steady-state simulation amount letter
Number, wherein f1≠f2；
Step 4, measurement frequency is f2Steady-state simulation amount signal merge through electronic mutual inductor or analog input single
The forward and backward phase contrast of unitCalculating frequency in conjunction with phase calculation point time difference compensation and SV message transmission shake time difference compensation is
f2Steady-state simulation amount signal time delay aperiodic Td2_NP, by time delay aperiodic Td2_NPAcquisition frequency is f2Steady-state simulation amount
Full time delay T after digitized sampling for the signald2=Td2_NP+m2T2, T2=1/f2, m2For nonnegative integer；
Step 5, based on sampling group delay principle Td1=Td2, calculate m1And m2, obtain the full time delay of digitized sampling
Value.The process obtaining full time delay in step 2 is,
Step (A1), calculating input electronic mutual inductor or the frequency of analog input combining unit is f1Steady-state simulation
Amount signal t1The phase place in moment
Step (B1), calculates electronic mutual inductor or the digital quantity SV signal t of analog input combining unit output1' when
The phase place carvedWherein t1′≤t1, t1One point of ' moment corresponding SV message, this point is t1Moment electronic mutual inductor
Or the message point of analog input combining unit output or this point are t1Before moment, electronic mutual inductor or analog input close
And last message point of unit output；
Step (C1), by obtain in step (A1) and step (B1)WithCalculating frequency is f1's
Steady-state simulation amount signal is through the forward and backward phase contrast of electronic mutual inductor or analog input combining unitAnd this phase contrast is converted to the time
Step (D1), calculates the phase calculation point time difference, t1Moment and t1Time difference Δ t between the ' moment1=t1-t1′；
Step (E1), calculates SV message and sends shake time difference Δ T1；
Step (F1), according to obtain in step (C1), step (D1) and step (E1)Δt1With Δ T1, calculate
Going out frequency is f1Steady-state simulation amount signal time delay aperiodic
Step (G1), acquisition frequency is f1Full time delay after digitized sampling for the steady-state simulation amount signal be
Step (E1) calculates SV message and sends shake time difference Δ T1Process,
Step (a1), follows the tracks of the transmission frequency of digital quantity SV signal, the equispaced of locking SV message using Phase Lock Technique
TSV1；
Step (b1), by SV message K1、K1- 1 point time of receptionCalculate K1Point message with previous
The actual interval of frame message
Step (c1), calculates actual intervalWith equispaced TSV1Deviation
Step (d1), by SV message K1-1、K1- 2 point times of receptionCalculate K1- 1 point message
Actual interval with former frame message
Step (e1), calculates actual intervalWith equispaced TSV1Deviation
Step (f1), by K1With K1The message spacing bias of -1 point, calculates SV message K1The shake that point sends
The time difference
The process obtaining full time delay in step 4 is,
Step (A2), calculating input electronic mutual inductor or the frequency of analog input combining unit is f2Steady-state simulation
Amount signal t2The phase place in moment
Step (B2), calculates electronic mutual inductor or the digital quantity SV signal t of analog input combining unit output2' when
The phase place carvedWherein t2′≤t2, t2One point of ' moment corresponding SV message, this point is t2Moment electronic mutual inductor
Or the message point of analog input combining unit output or this point are t2Before moment, electronic mutual inductor or analog input close
And last message point of unit output；
Step (C2), by obtain in step (A2) and step (B2)WithCalculate frequency
For f2Steady-state simulation amount signal through the forward and backward phase contrast of electronic mutual inductor or analog input combining unitAnd this phase contrast is converted to the time
Step (D2), calculates the phase calculation point time difference, t2Moment and t2Time difference Δ t between the ' moment2=t2-t2′；
Step (E2), calculates SV message and sends shake time difference Δ T2；
Step (F2), according to obtain in step (C2), step (D2) and step (E2)Δt2With Δ T2, calculate
Going out frequency is f2Steady-state simulation amount signal time delay aperiodic
Step (G2), acquisition frequency is f2Full time delay after digitized sampling for the steady-state simulation amount signal be
Step (E2) calculates SV message and sends shake time difference Δ T2Process as follows,
Step (a2), follows the tracks of the transmission frequency of digital quantity SV signal, the equispaced of locking SV message using Phase Lock Technique
TSV2；
Step (b2), by SV message K2、K2- 1 point time of receptionCalculate K2Point message with front
The actual interval of one frame message
Step (c2), calculates actual intervalWith equispaced TSV2Deviation
Step (d2), by SV message K2-1、K2- 2 point times of receptionCalculate K2- 1 point report
Literary composition and the actual interval of former frame message
Step (e2), calculates actual intervalWith equispaced TSV2Deviation
Step (f2), by K2With K2The message spacing bias of -1 point, calculates SV message K2The shake that point sends
The time difference
A kind of measuring system of digitized sampling time delay frequency conversion measuring method, including analog output part and collection measurement
Part；Described analog output part is tested electronic mutual inductor or analog input combining unit provides steady-state simulation amount letter
Number, provide, for collection measurement part, the secondary letter reflecting tested electronic mutual inductor or the input of analog input combining unit simultaneously
Number；When analog output partial circumscription electronic mutual inductor, the standard that described analog output part includes being sequentially connected is mutual
Sensor, up-flow/booster and frequency-variable controller, described standard mutual inductor is as analog output part and electronic mutual inductor
Connection unit, also serves as analog output part and the connection unit of collection measurement part simultaneously；When analog output is partly outer
When connecing analog input combining unit, described analog output part includes power amplifier and the VFC being sequentially connected
Device, described power amplifier, as the connection unit of analog output part and analog input combining unit, also serves as simultaneously
Analog output part and the connection unit of collection measurement part；Described collection measurement part is in order to gather analog output part
The secondary singal sending, the digital quantity SV signal of collection electronic mutual inductor or the output of analog input combining unit, uses simultaneously
To measure and to calculate digitized sampling time delay, in order to show the delay product that meter calculates；Described collection Measurement portion divide including
AD conversion module, internal clocking module, SV collection and time mark module, measuring and calculating module and result display module, described
AD conversion module, SV collection and time mark module and result display module are all connected with measuring and calculating module, when described internal
Clock module is used for producing the sampling pulse of AD conversion module, and is SV collection and time mark module offer temporal information, described
AD conversion module is as the connection unit of analog output part and collection measurement part, described SV collection and time mark module
In order to gather the digital quantity SV signal of electronic mutual inductor or the output of analog input combining unit.
The invention has the beneficial effects as follows：1st, the present invention is based on Frequency Conversion Theory, by measuring electronic mutual inductor or analog quantity
The input non-integer-period time delay to different frequency steady-state simulation amount signal for the combining unit, is calculated digitized sampling link to institute
There is the inherent delay of frequency signal, including non-integer-period time delay and time delay complete cycle, be simultaneously based on Phase Lock Technique and follow the tracks of SV message
Transmission frequency, compensate SV message send shake the time difference, reduce SV message send the time difference impact, improve digitized sampling time delay
Accuracy of measurement；2nd, the present invention can measure time delay complete cycle of digitized sampling link under steady-state simulation amount signal, effectively
Solve the problems, such as cannot accurately measure time delay complete cycle in electronic mutual inductor and analog input combining unit engineer applied,
Guarantee the electronic mutual inductor and analog input combining unit reliability application in intelligent substation, eliminate electronic mutual inductor
With the potential safety hazard in analog input combining unit engineer applied, improve secondary system of intelligent substation and run accuracy, right
The safe and reliable operation of intelligent substation is significant.
Brief description
Fig. 1 is a kind of flow chart of digitized sampling time delay frequency conversion measuring method.
Fig. 2 is to obtain frequency for f1Full time delay after digitized sampling for the steady-state simulation amount signal flow chart.
Fig. 3 is to calculate SV message to send shake time difference Δ T1Flow chart.
Fig. 4 is a kind of structured flowchart of digitized sampling time delay frequency conversion measuring system.
Fig. 5 is the structural representation of measuring system external connected electronic formula transformer.
Fig. 6 is the structural representation of measuring system external analog input combining unit.
Specific embodiment
Below in conjunction with Figure of description, the invention will be further described.Following examples are only used for clearly
Technical scheme is described, and can not be limited the scope of the invention with this.
As shown in figure 1, a kind of digitized sampling time delay frequency conversion measuring method, comprise the following steps,
Step one, electron formula transformer or analog input combining unit incoming frequency are f1Steady-state simulation amount letter
Number.
Step 2, measurement frequency is f1Steady-state simulation amount signal merge through electronic mutual inductor or analog input single
The forward and backward phase contrast of unitCalculating frequency in conjunction with phase calculation point time difference compensation and SV message transmission shake time difference compensation is
f1Steady-state simulation amount signal time delay aperiodic Td1_NP, by time delay aperiodic Td1_NPAcquisition frequency is f1Steady-state simulation amount
Full time delay T after digitized sampling for the signald1=Td1_NP+m1T1, T1=1/f1, m1For nonnegative integer.
Acquisition frequency is f1Full time delay after digitized sampling for the steady-state simulation amount signal process as shown in Figure 3：
Step (A1), calculating input electronic mutual inductor or the frequency of analog input combining unit is f1Steady-state simulation
Amount signal t1The phase place in moment
Step (B1), calculates electronic mutual inductor or the digital quantity SV signal t of analog input combining unit output1' when
The phase place carvedWherein t1′≤t1, t1One point of ' moment corresponding SV message, this point is t1Moment electronic mutual inductor
Or the message point of analog input combining unit output or this point are t1Before moment, electronic mutual inductor or analog input close
And last message point of unit output.
Step (C1), by obtain in step (A1) and step (B1)WithCalculate frequency
For f1Steady-state simulation amount signal through the forward and backward phase contrast of electronic mutual inductor or analog input combining unitAnd this phase contrast is converted to the time
Step (D1), calculates the phase calculation point time difference, t1Moment and t1Time difference Δ t between the ' moment1=t1-t1′.
Step (E1), calculates output SV message and sends shake time difference Δ T1, comprise the following steps that：
Step (a1), follows the tracks of the transmission frequency of digital quantity SV signal, the equispaced of locking SV message using Phase Lock Technique
TSV1；
Step (b1), by SV message K1、K1- 1 point time of receptionCalculate K1Point message with previous
The actual interval of frame message
Step (c1), calculates actual intervalWith equispaced TSV1Deviation
Step (d1), by SV message K1-1、K1- 2 point times of receptionCalculate K1- 1 point message
Actual interval with former frame message
Step (e1), calculates actual intervalWith equispaced TSV1Deviation
Step (f1), by K1With K1The message spacing bias of -1 point, calculates SV message K1The shake that point sends
The time difference
Step (F1), according to obtain in step (C1), step (D1) and step (E1)Δt1With Δ T1, calculate
Going out frequency is f1Steady-state simulation amount signal time delay aperiodic
Step (G1), acquisition frequency is f1Full time delay after digitized sampling for the steady-state simulation amount signal be
Step 3, electron formula transformer or analog input combining unit incoming frequency are f2Steady-state simulation amount letter
Number, wherein f1≠f2.
Step 4, measurement frequency is f2Steady-state simulation amount signal merge through electronic mutual inductor or analog input single
The forward and backward phase contrast of unitCalculating frequency in conjunction with phase calculation point time difference compensation and SV message transmission shake time difference compensation is
f2Steady-state simulation amount signal time delay aperiodic Td2_NP, by time delay aperiodic Td2_NPAcquisition frequency is f2Steady-state simulation amount
Full time delay T after digitized sampling for the signald2=Td2_NP+m2T2, T2=1/f2, m2For nonnegative integer.
Acquisition frequency is f2Full time delay process after digitized sampling for the steady-state simulation amount signal be f with obtaining frequency1
Full time delay after digitized sampling for the steady-state simulation amount signal process consistent, specific as follows：
Step (A2), calculating input electronic mutual inductor or the frequency of analog input combining unit is f2Steady-state simulation
Amount signal t2The phase place in moment
Step (B2), calculates electronic mutual inductor or the digital quantity SV signal t of analog input combining unit output2' when
The phase place carvedWherein t2′≤t2, t2One point of ' moment corresponding SV message, this point is t2Moment electronic mutual inductor
Or the message point of analog input combining unit output or this point are t2Before moment, electronic mutual inductor or analog input close
And last message point of unit output.
Step (C2), by obtain in step (A2) and step (B2)WithCalculate frequency
Rate is f2Steady-state simulation amount signal through the forward and backward phase contrast of electronic mutual inductor or analog input combining unitAnd this phase contrast is converted to the time
Step (D2), calculates the phase calculation point time difference, t2Moment and t2Time difference Δ t between the ' moment2=t2-t2′.
Step (E2), calculates SV message and sends shake time difference Δ T2, calculate SV message in detailed process and step (E1) and send out
Send time difference Δ T1Process consistent, specific as follows：
Step (a2), follows the tracks of the transmission frequency of digital quantity SV signal, the equispaced of locking SV message using Phase Lock Technique
TSV2；
Step (b2), by SV message K2、K2- 1 point time of receptionCalculate K2Point message with front
The actual interval of one frame message
Step (c2), calculates actual intervalWith equispaced TSV2Deviation
Step (d2), by SV message K2-1、K2- 2 point times of receptionCalculate K2- 1 point report
Literary composition and the actual interval of former frame message
Step (e2), calculates actual intervalWith equispaced TSV2Deviation
Step (f2), by K2With K2The message spacing bias of -1 point, calculates SV message K2The shake that point sends
The time difference
Step (F2), according to obtain in step (C2), step (D2) and step (E2)Δt2With Δ T2, calculate
Going out frequency is f2Steady-state simulation amount signal time delay aperiodic
Step (G2), acquisition frequency is f2Full time delay after digitized sampling for the steady-state simulation amount signal be
Step 5, based on sampling group delay principle Td1=Td2, calculate m1And m2, obtain the full time delay of digitized sampling
Value.m1And m2Theoretical Calculation goes out for multiple values, and frequency f of the number being worth and signal1And f2Relevant, frequency f1And f2Closer to,
m1And m2Number fewer；m1And m2Value bigger, the time delay of digitized sampling link is bigger, in actual application, digitized
The time delay of sampling element within the specific limits, and should may be selected the close steady-state simulation amount signal of frequency as input signal, from
And determine m1And m2Occurrence, calculate full time delay.
The measuring system of above-mentioned digitized sampling time delay frequency conversion measuring method is as shown in figure 4, include analog output part
Measure part with collection, two parts can adopt decentralized design, independent control, integrated design may also be employed and realize closed loop control
System.
Described analog output part is tested electronic mutual inductor or analog input combining unit provides steady-state simulation
Amount signal, provides for collection measurement part simultaneously and reflects the two of tested electronic mutual inductor or the input of analog input combining unit
Secondary signal.
When analog output partial circumscription electronic mutual inductor as Fig. 5, described analog output part includes connecting successively
Standard mutual inductor, up-flow/booster and the frequency-variable controller connecing, described standard mutual inductor is as analog output part and electronics
The connection unit of formula transformer, also serves as analog output part and the connection unit of collection measurement part simultaneously.Above-mentioned part
Concrete function as follows：
Frequency-variable controller：For controlling up-flow/booster to export the frequency of a steady-state simulation amount signal, VFC is led to
Cross the input power frequency changing up-flow/booster and reach the purpose controlling its output steady-state simulation amount signal frequency.
Up-flow/booster：Produce a high current or high voltage, provide a steady-state simulation for tested electronic mutual inductor
Amount signal input.
Standard mutual inductor：By up-flow/booster produce a steady-state simulation amount signal by setting ratio linear transformation be
Secondary singal, and secondary singal is transmitted to collection measurement part, standard mutual inductor does not change a steady-state simulation amount signal.
Depending on the configuration of up-flow/booster and standard mutual inductor is according to tested electronic mutual inductor type, when tested electronics
When formula transformer is current transformer, up-flow/booster adopts current lifting device, and standard mutual inductor adopts standard current transformer, and
Seal in the loop between current lifting device and tested electronic current mutual inductor, a high current is converted to secondary small current；When
During by side electronic mutual inductor for voltage transformer, up-flow/booster adopts booster, and standard mutual inductor adopts normal voltage mutual
Sensor, and being connected on the loop between booster and tested electronic type voltage transformer, high voltage is converted to secondary
Low-voltage.
When analog output partial circumscription analog input combining unit as Fig. 6, described analog output part includes
The power amplifier being sequentially connected and frequency-variable controller, described power amplifier is as analog output part and analog input
The connection unit of combining unit, also serves as analog output part and the connection unit of collection measurement part simultaneously.Above-mentioned part
Concrete function as follows：
Frequency-variable controller：For controlling power amplifier to export the frequency of steady-state simulation amount signal, VFC is directly defeated
Go out the small-signal of changeable frequency, input to power amplifier.
Power amplifier：Low level signal amplification for exporting frequency-variable controller is substation secondary signal, power amplification
Device can export secondary current steady-state simulation amount signal and secondary voltage steady-state simulation amount signal, and secondary singal is directly connected to tested
Analog input combining unit, also transmits to collection measurement part simultaneously, when steady-state simulation amount signal is electric current, is connected to collection
The secondary singal line of measurement part seals in power amplifier and the loop of tested combining unit；When steady-state simulation amount signal is electricity
During pressure, it is connected to the secondary singal line of collection measurement part and is connected on power amplifier and the loop of tested combining unit.
, in order to gather the secondary singal of analog output part transmission, collection electronic type is mutual simultaneously for described collection measurement part
Sensor or the digital quantity SV signal of analog input combining unit output, in order to measure and to calculate digitized sampling time delay, in order to
The delay product that display meter calculates.
Described collection Measurement portion is divided including AD conversion module, internal clocking module, SV collection and time mark module, measurement
Computing module and result display module, described AD conversion module, SV collection and time mark module and equal and measuring and calculating module
Connect, described internal clocking module is used for producing the sampling pulse of AD conversion module, and be that SV collection carries with time mark module
For temporal information, described AD conversion module is adopted as the connection unit of analog output part and collection measurement part, described SV
Collection and time mark module are in order to gather the digital quantity SV signal of electronic mutual inductor or the output of analog input combining unit.On
The concrete function stating part is as follows：
AD conversion module：For gathering the secondary singal of analog output part, analog quantity is converted to digital quantity signal
Process for measuring and calculating module, the sample frequency of AD conversion module should be higher than that the sample frequency of measured number sampling element, adopts
Sample pulse is produced by this part internal clocking.
SV collection and time mark module：For receiving SV message, record SV message reaches the moment, and to number in SV message
According to carrying out parsing, extracting, process for measuring and calculating module；This module can be realized by high-performance FPGA, when temporal information is by inside
Clock module provides.
Internal clocking module：For producing the sampling pulse of AD conversion module, and it is that SV collection carries with time mark module
For temporal information, to ensure the unification of two module time information；Internal clocking is realized by internal High Precision Crystal Oscillator.
Measuring and calculating module：Based on the number to AD conversion module and SV acquisition time mark module for the aforementioned Time delay measurement method
According to carrying out processing the survey calculation of laggard line delay, draw measured number sampling element goes out full time delay.
Result display module：Final for the measuring and calculating module result calculating is shown, result display module can be with
Patterned way or data list mode are shown.
In sum, the present invention is based on Frequency Conversion Theory, by measuring electronic mutual inductor or analog input combining unit
Non-integer-period time delay to different frequency steady-state simulation amount signal, thus be calculated digitized sampling link believe to all frequencies
Number inherent delay, including non-integer-period time delay and time delay complete cycle, be simultaneously based on the transmission frequency that Phase Lock Technique follows the tracks of SV message
Rate, compensates SV message and sends the time difference, reduce the impact that SV message sends the time difference, improve digitized sampling Time delay measurement accuracy；
The present invention can measure time delay complete cycle of digitized sampling link under steady-state simulation amount signal, efficiently solves electronic type mutual
The problem of time delay complete cycle cannot accurately be measured it is ensured that electronic type mutual inductance in sensor and analog input combining unit engineer applied
The device and analog input combining unit reliability application in intelligent substation, eliminates electronic mutual inductor and analog input closes
And the potential safety hazard in element project application, improve secondary system of intelligent substation and run accuracy, the peace to intelligent substation
Entirely, reliability service is significant.
Ultimate principle, principal character and the advantage of the present invention have been shown and described above.The technical staff of the industry should
Understand, the present invention is not restricted to the described embodiments, the simply explanation present invention's described in above-described embodiment and description is former
Reason, without departing from the spirit and scope of the present invention, the present invention also has various changes and modifications, these changes and improvements
Both fall within scope of the claimed invention.Claimed scope is by appending claims and its equivalent circle.
Fixed.
Claims (6)
1. a kind of digitized sampling time delay frequency conversion measuring method it is characterised in that：Comprise the following steps,
Step one, electron formula transformer or analog input combining unit incoming frequency are f1Steady-state simulation amount signal；
Step 2, measurement frequency is f1Steady-state simulation amount signal before electronic mutual inductor or analog input combining unit,
Phase contrast afterwardsSend shake time difference compensation to calculate frequency in conjunction with phase calculation point time difference compensation and SV message is f1's
The time delay aperiodic T of steady-state simulation amount signald1_NP, by time delay aperiodic Td1_NPAcquisition frequency is f1Steady-state simulation amount signal
Full time delay T after digitized samplingd1=Td1_NP+m1T1, T1=1/f1, m1For nonnegative integer；
Step 3, electron formula transformer or analog input combining unit incoming frequency are f2Steady-state simulation amount signal, wherein
f1≠f2；
Step 4, measurement frequency is f2Steady-state simulation amount signal before electronic mutual inductor or analog input combining unit,
Phase contrast afterwardsSend shake time difference compensation to calculate frequency in conjunction with phase calculation point time difference compensation and SV message is f2's
The time delay aperiodic T of steady-state simulation amount signald2_NP, by time delay aperiodic Td2_NPAcquisition frequency is f2Steady-state simulation amount signal
Full time delay T after digitized samplingd2=Td2_NP+m2T2, T2=1/f2, m2For non-negative positive integer；
Step 5, based on sampling group delay principle Td1=Td2, calculate m1And m2, obtain the value of the full time delay of digitized sampling.
2. a kind of digitized sampling time delay frequency conversion measuring method according to claim 1 it is characterised in that：Obtain in step 2
The process of full time delay is,
Step (A1), calculating input electronic mutual inductor or the frequency of analog input combining unit is f1Steady-state simulation amount letter
Number t1The phase place in moment
Step (B1), calculates electronic mutual inductor or the digital quantity SV signal t of analog input combining unit output1The phase in ' moment
PositionWherein t1′≤t1, t1One point of ' moment corresponding SV message, this point is t1Moment electronic mutual inductor or simulation
The message point of amount input combining unit output or this point are t1Electronic mutual inductor or analog input combining unit before moment
Last message point of output；
Step (C1), by obtain in step (A1) and step (B1)WithCalculating frequency is f1
Steady-state simulation amount signal through the forward and backward phase contrast of electronic mutual inductor or analog input combining unitAnd this phase contrast is converted to the time
Step (D1), calculates the phase calculation point time difference, t1Moment and t1Time difference Δ t between the ' moment1=t1-t1′；
Step (E1), calculates SV message and sends shake time difference Δ T1；
Step (F1), according to obtain in step (C1), step (D1) and step (E1)Δt1With Δ T1, calculate frequency
Rate is f1Steady-state simulation amount signal time delay aperiodic
Step (G1), acquisition frequency is f1Full time delay after digitized sampling for the steady-state simulation amount signal be
3. a kind of digitized sampling time delay frequency conversion measuring method according to claim 2 it is characterised in that：Step (E1) is counted
Calculate SV message and send shake time difference Δ T1Process,
Step (a1), follows the tracks of the transmission frequency of digital quantity SV signal, the equispaced T of locking SV message using Phase Lock TechniqueSV1；
Step (b1), by SV message K1、K1- 1 point time of receptionCalculate K1Point message and former frame report
The actual interval of literary composition
Step (c1), calculates actual intervalWith equispaced TSV1Deviation
Step (d1), by SV message K1-1、K1- 2 point times of receptionCalculate K1- 1 point message with front
The actual interval of one frame message
Step (e1), calculates actual intervalWith equispaced TSV1Deviation
Step (f1), by K1With K1The message spacing bias of -1 point, calculates SV message K1The shake time difference that point sends
4. a kind of digitized sampling time delay frequency conversion measuring method according to claim 1 it is characterised in that：Obtain in step 4
The process of full time delay is,
Step (A2), calculating input electronic mutual inductor or the frequency of analog input combining unit is f2Steady-state simulation amount letter
Number t2The phase place in moment
Step (B2), calculates electronic mutual inductor or the digital quantity SV signal t of analog input combining unit output2The phase in ' moment
PositionWherein t2′≤t2, t2One point of ' moment corresponding SV message, this point is t2Moment electronic mutual inductor or simulation
The message point of amount input combining unit output or this point are t2Electronic mutual inductor or analog input combining unit before moment
Last message point of output；
Step (C2), by obtain in step (A2) and step (B2)WithCalculating frequency is
f2Steady-state simulation amount signal through the forward and backward phase contrast of electronic mutual inductor or analog input combining unitAnd this phase contrast is converted to the time
Step (D2), calculates the phase calculation point time difference, t2Moment and t2Time difference Δ t between the ' moment2=t2-t2′；
Step (E2), calculates SV message and sends shake time difference Δ T2；
Step (F2), according to obtain in step (C2), step (D2) and step (E2)Δt2With Δ T2, calculate frequency
Rate is f2Steady-state simulation amount signal time delay aperiodic
Step (G2), acquisition frequency is f2Full time delay after digitized sampling for the steady-state simulation amount signal be
5. a kind of digitized sampling time delay frequency conversion measuring method according to claim 4 it is characterised in that：Step (E2) is counted
Calculate SV message and send shake time difference Δ T2Process as follows,
Step (a2), follows the tracks of the transmission frequency of digital quantity SV signal, the equispaced T of locking SV message using Phase Lock TechniqueSV2；
Step (b2), by SV message K2、K2- 1 point time of receptionCalculate K2Point message and former frame report
The actual interval of literary composition
Step (c2), calculates actual intervalWith equispaced TSV2Deviation
Step (d2), by SV message K2-1、K2- 2 point times of reception Calculate K2- 1 point message with front
The actual interval of one frame message
Step (e2), calculates actual intervalWith equispaced TSV2Deviation
Step (f2), by K2With K2The message spacing bias of -1 point, calculates SV message K2The shake time difference that point sends
6. the measuring system based on a kind of digitized sampling time delay frequency conversion measuring method described in claim 1 it is characterised in that：
Including analog output part and collection measurement part；
Described analog output part is tested electronic mutual inductor or analog input combining unit provides steady-state simulation amount letter
Number, provide, for collection measurement part, the secondary letter reflecting tested electronic mutual inductor or the input of analog input combining unit simultaneously
Number；When analog output partial circumscription electronic mutual inductor, the standard that described analog output part includes being sequentially connected is mutual
Sensor, up-flow/booster and frequency-variable controller, described standard mutual inductor is as analog output part and electronic mutual inductor
Connection unit, also serves as analog output part and the connection unit of collection measurement part simultaneously；When analog output is partly outer
When connecing analog input combining unit, described analog output part includes power amplifier and the VFC being sequentially connected
Device, described power amplifier, as the connection unit of analog output part and analog input combining unit, also serves as simultaneously
Analog output part and the connection unit of collection measurement part；
Described collection measurement part, in order to gather the secondary singal of analog output part transmission, gathers electronic mutual inductor simultaneously
Or the digital quantity SV signal of analog input combining unit output, in order to measure and to calculate digitized sampling time delay, in order to show
The delay product that meter calculates；Described collection Measurement portion was divided including AD conversion module, internal clocking module, SV collection and time
Mark module, measuring and calculating module and result display module, described AD conversion module, SV collection and time mark module and result
Display module is all connected with measuring and calculating module, and described internal clocking module is used for producing the sampling pulse of AD conversion module, and
It is SV collection and time mark module offer temporal information, described AD conversion module is as analog output part and collection measurement
Partial connection unit, described SV collection and time mark module merge list in order to gather electronic mutual inductor or analog input
The digital quantity SV signal of unit's output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410074461.3A CN103812731B (en) | 2014-03-03 | 2014-03-03 | Digitization sampling time delay frequency conversion measuring method and measuring system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410074461.3A CN103812731B (en) | 2014-03-03 | 2014-03-03 | Digitization sampling time delay frequency conversion measuring method and measuring system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103812731A CN103812731A (en) | 2014-05-21 |
| CN103812731B true CN103812731B (en) | 2017-02-22 |
Family
ID=50708970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410074461.3A Active CN103812731B (en) | 2014-03-03 | 2014-03-03 | Digitization sampling time delay frequency conversion measuring method and measuring system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103812731B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103983828B (en) * | 2014-05-26 | 2016-09-07 | 国家电网公司 | A kind of Electrical Instrument Transducers with Digital phase compensating method |
| CN104237622B (en) * | 2014-09-15 | 2017-03-29 | 北京东方计量测试研究所 | The method of sampling and wideband voltage/calibration of power device based on software based frequency tracking |
| CN105203875B (en) * | 2015-09-15 | 2018-05-22 | 国家电网公司 | The specified Time delay measurement method of combining unit based on frequency domain scanning recognition |
| CN105261202B (en) * | 2015-11-05 | 2019-03-19 | 江苏省电力公司电力科学研究院 | Transmission delay measurement method based on B-spline interpolating wavelet Singularity detection |
| CN106153177B (en) * | 2016-08-25 | 2019-07-05 | 中国航空工业集团公司北京长城计量测试技术研究所 | A kind of vibration measurement with laser calibrates the quantization measurement method of big trigger delay |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103439679A (en) * | 2013-08-28 | 2013-12-11 | 国家电网公司 | Absolute time delay detection device and method of intelligent substation mutual inductor data collection system |
| CN103605023A (en) * | 2013-11-20 | 2014-02-26 | 国家电网公司 | Method and device for measuring merging unit time characteristics |
-
2014
- 2014-03-03 CN CN201410074461.3A patent/CN103812731B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103439679A (en) * | 2013-08-28 | 2013-12-11 | 国家电网公司 | Absolute time delay detection device and method of intelligent substation mutual inductor data collection system |
| CN103605023A (en) * | 2013-11-20 | 2014-02-26 | 国家电网公司 | Method and device for measuring merging unit time characteristics |
Non-Patent Citations (3)
| Title |
|---|
| The Research of Intelligent Substation Time Synchronization System and the Influence of Its Fault to Relay Protection;Chang-bao Xu等;《Scientific Research》;20130731;第468-473页 * |
| 智能变电站数字采样延时特性分析与试验;袁宇波等;《电力系统自动化》;20131225;第37卷(第24期);第76-80页 * |
| 智能变电站电量信号传输特性及建模;陶骞等;《湖北电力》;20130630;第37卷(第3期);第4-7页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103812731A (en) | 2014-05-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103812731B (en) | Digitization sampling time delay frequency conversion measuring method and measuring system | |
| CN103605023B (en) | A kind of combining unit time response measuring method and measurement apparatus | |
| CN102901874B (en) | Phase- and time mark measurement-based electronic transformer absolute delay detection method | |
| CN104102122B (en) | A kind of hand-held time synchronization tester | |
| CN202443082U (en) | Merging unit test system with analog input and university | |
| CN103792419B (en) | Realize analog quantity and mix the synchronous sampling method accessed with digital quantity | |
| CN103777104A (en) | Time-delay characteristic testing device and method of digital substation secondary signal transmission system | |
| CN102914758A (en) | Electronic type transformer verifying unit based on IEEE1588 clock calibration mode | |
| CN101556323A (en) | Digital electric energy meter checking device with actual loading checking | |
| US8775885B2 (en) | IEEE1588 protocol negative testing method | |
| CN103439597A (en) | Merging unit synchronous punctual tester based on analog quantity digitized transmission and method therefore | |
| US8271227B2 (en) | Measuring transducer | |
| CN105553593A (en) | SDH (Synchronous Digital Hierarchy)-based multi-time source PTP (Precision Time Protocol) data synchronization and time monitoring system | |
| CN103983930B (en) | Electronic mutual inductor harmonic wave tester calibration equipment and method of calibration | |
| CN103595588A (en) | Method for accurately measuring asynchronous Ethernet circuit time delay | |
| CN104049231A (en) | Integrated system for testing delay of separated units of optical electronic transformer | |
| CN107300651A (en) | A kind of digital quantity input type standard combining unit | |
| CN104597424A (en) | Verification platform and verification method for electric energy measurement of optical transformer | |
| CN105954702B (en) | The phase error detection system and method for electronic transducer calibration instrument | |
| CN205176169U (en) | Digital sampling time delay frequency conversion measurement system | |
| CN107395310B (en) | A kind of on-line monitoring optical signal direct measuring method and system based on time synchronization | |
| CN107908097B (en) | Using the time interval measurement system and measurement method of mixing interpolation cascade structure | |
| CN202548231U (en) | Detection device for substation merging unit | |
| CN204479738U (en) | A kind of optical transformer electric energy metrical verification platform | |
| CN101986217B (en) | Accurate measurement and elimination method of maximum accumulative error of time of sequence of event |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |