CN103812589A - Time synchronization method based on double ring bus - Google Patents

Time synchronization method based on double ring bus Download PDF

Info

Publication number
CN103812589A
CN103812589A CN201210445774.6A CN201210445774A CN103812589A CN 103812589 A CN103812589 A CN 103812589A CN 201210445774 A CN201210445774 A CN 201210445774A CN 103812589 A CN103812589 A CN 103812589A
Authority
CN
China
Prior art keywords
equipment
synchronization message
time
message
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201210445774.6A
Other languages
Chinese (zh)
Inventor
林浒
杨磊
刘峰
郑飂默
王峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenyang Institute of Computing Technology of CAS
Original Assignee
Shenyang Institute of Computing Technology of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenyang Institute of Computing Technology of CAS filed Critical Shenyang Institute of Computing Technology of CAS
Priority to CN201210445774.6A priority Critical patent/CN103812589A/en
Publication of CN103812589A publication Critical patent/CN103812589A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658Clock or time synchronisation among packet nodes
    • H04J3/0661Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0667Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays

Abstract

The invention relates to a time synchronization method based on a double ring bus; the method comprises the following steps: initializes master/slave equipment; the master equipment packages a sending time to synchronization messages sent to the adjacent slave equipment; the slave equipment i stores a synchronization message, coming from a loop, receiving time ti and packages a synchronization message sending time ti' into the synchronization message sent to the slave equipment i+1, and the slave equipment i+1 stores a synchronization message receiving time ti+1; simultaneously in another loop, the slave equipment i+1 sends another synchronization message, going to the slave equipment i, sending time si+1 and the time ti+1 to the slave equipment i through the synchronization message; the slave equipment i saves the message receiving time si; the slave equipment i calculates a clock deviation amount and communication delay between the slave equipment i and the slave equipment i+1, and corrects a local clock, thereby completing time synchronization of the double ring bus master/slave equipment. The synchronization message can be simultaneously sent a transmission line, and the synchronization can be completed in one communication period, thereby effectively improving instantaneity; and synchronization efficiency is high.

Description

A kind of method for synchronizing time based on dicyclo bus
Technical field
The present invention's application twin nuclei bus proposes a kind of new equipment room method for synchronizing time, belongs to communication technical field.
Background technology
In industrial control field, in order can immediately to detect and location abnormal conditions, conventionally need in management and monitoring equipment and relevant automatic equipment, keep strict time synchronized, by control system, the genetic sequence of event and time be recorded in time.In traditional control system, the data sampling cycle of Millisecond can meet common monitoring needs, but in extensive industrial control system, along with the expansion of field apparatus in scale, system complexity is also relatively high, also increasingly strict to the requirement of synchronization accuracy.For example, in the system at a slow speed that is similar to temperature and pressure monitoring, synchronous precision maintains Millisecond, but in field data acquisition system at a high speed, accuracy requirement must reach Millisecond.Therefore, precise time synchronous method has become requisite key element in industrial control network.
As everyone knows, field apparatus mainly depends on the asynchronous communication of serial, there is no the requirement on synchronization timing.But along with the development of bus communication technology and the active demand of a large amount of real-time tasks, the field apparatus that does not configure internal clocking immediately also needs to synchronize with server in recent years, and this has proposed new requirement to timing tracking accuracy.In order to address this problem, the organization establishments such as ITU-U, IETF, MEF relevant standard, as NTP, IEEE1588, IEEE802.1 etc., these standards all realize synchronous between equipment in the mode of transmission time stamp.
But in the real-time industry spot of height, the system architecture in existing communication mode and equipment can not meet its requirement to time precision.Therefore, the present invention proposes a kind of time synchronized control model based on digital control system, this model, on the bus-structured basis of dicyclo, designs high-precision clock synchronous functional module, to meet the requirement of communication between devices to real-time.
Summary of the invention
Postponed by protocol stack and control system framework restriction and have the deficiency of real-time in order to overcome existing method for synchronizing time, the invention provides a kind of time synchronization control method based on dicyclo bus of NC Machine oriented, can reduce communication between devices by monocyclic synchronizing message transmissions postpones, improve the operational efficiency of method for synchronizing time in digital control system, guarantee the stability of digital control system operation.
The technical solution adopted for the present invention to solve the technical problems is as follows:
Based on a method for synchronizing time for dicyclo bus, comprise the following steps:
Master/slave arrangement initialization: from the local clock unit timer zero clearing of equipment, remove the wherein time data of storage; The local clock unit of main equipment empties inner side-play amount array and retardation array;
When main equipment sends synchronization message by dicyclo bus, by transmitting time rise time stamp, be encapsulated in synchronization message, be sent to adjacent from equipment by two ports of main equipment;
The moment t of synchronization message will be received a loop from equipment i irise time stamp, and store local clock unit into; Be somebody's turn to do while sending synchronization message from equipment transmitting time t i' rise time stabs it and be encapsulated in this synchronization message, is sent to nextly from equipment i+1, will receive this synchronization message moment t from equipment i+1 i+1the timestamp generating is preserved;
Meanwhile, in another loop, will send another synchronization message to the transmitting time s from equipment i from equipment i+1 i+1' rise time stamp, by itself and t i+1timestamp be sent to from equipment i by this synchronization message; To receive this synchronization message moment s from equipment i ithe timestamp generating is preserved;
From equipment, i passes through t i+1, t i', s i+1', s ifour timestamps calculate from equipment i with from the clock offset T between equipment i+1 offsetwith communication delay T delay; From the local clock unit of equipment i according to clock offset T offsetwith communication delay T delayrevise local clock, complete the time synchronized of dicyclo bus master/slave arrangement.
Described synchronization message comprises header and report body; Wherein header comprises: protocol type, type of message, message-length, equipment sum, mark domain, source port number, sequence number; Report body comprises the timestamp that equipment generates.
Described calculating is from equipment i with from the clock offset T between equipment i+1 offsetwith communication delay T delayobtain by following formula
T offdet=((t i+1-t i′)+(S i-S i+1′))/2
T delay=((t i+1-t i′)-(S i-S i+1′))/2
The present invention has following beneficial effect and advantage:
1. real-time is high.In the present invention, the circuit of transfer of data is annular channels, and synchronization message can send in transmission line simultaneously, and synchronously all in a communication cycle, completes, and has effectively improved real-time.
2. synchronous efficiency is high.In the present invention, on the basis of original digital control system, carry out the method for dedicated module Design and Features division for time synchronization process, to focus on mode independent by original, synchronous flow process is analyzed and effectively controlled, by rational layering logic layers, realize the function interlock between each module, reduce to greatest extent the time overhead of synchronizing process.
3. adopt clock offset and communication delay computational methods can in single communication cycle, obtain the transmitting-receiving timestamp from communication between devices, thereby calculate fast the required side-play amount of corrective clock and communication delay.
Accompanying drawing explanation
Fig. 1 is synchronizing function model abstract hierarchical structure figure of the present invention;
Fig. 2 is clock control model principle of work and power structure from equipment;
Fig. 3 is main equipment clock control model principle of work and power structure;
Fig. 4 is dicyclo bus transfer structure chart;
Fig. 5 is synchronization message header structure figure;
Fig. 6 is each module synchronization message processing procedure from equipment clock control model;
Fig. 7 is each module synchronization message processing procedure in main equipment clock control model;
Fig. 8 is clock offset and communication delay computational methods figure.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.
The technical solution adopted in the present invention is as follows:
Time synchronized model based on dicyclo bus refers to the method for carrying out the division of dedicated module Design and Features on the basis of original digital control system for time synchronization process, to focus on mode independent by original, synchronous flow process is analyzed and effectively controlled, by rational layering logic layers, realize the function interlock between each module, reduce to greatest extent the time overhead of synchronizing process.
As shown in Figure 1, according to the difference of going deep into degree, the time clock feature model being taken out by field apparatus can be divided into three-decker: network layer, interface layer and key-course.Communicating by letter between interface layer and network layer mainly relies on three data-interfaces: message interface, timestamp interface and clock regulate interface.Temporal information when synchronization message is received and dispatched by timestamp interface record also sends by message interface, and while accepting synchronization message, relevant temporal information is also to read by timestamp interface.Time synchronized module is responsible for processing the timestamp information reading by interface and calculating side-play amount and the delay between local clock.Control the synchronization message that can send at main equipment from equipment in network and read clock adjusting information and regulate interface and local clock line by clock.Said units is all that software is realized, under the support of hardware device, and will be more accurate to the operation of clock information.
The clock unit of device interior is mainly divided into two parts: timer and clock adjustment module.Timer is for expense correlation time of record communication process, and adjustment module is periodically revised the error of local clock and clock source by synchronized algorithm.These two parts are also to guarantee the conforming key point of equipment room.
And according to the functional localization in synchronizing process, the master clock control model in main equipment with from equipment, also have the difference function from clock control model.Master clock model is on-the-spot standard time source, by the clock status in transmitting-receiving synchronization message maintenance control system.Be responsible for processing the synchronizing information of main equipment transmission and revise doing from the clock of equipment to be correlated with from clock control model.
As shown in Figure 2, from the clock control model of equipment, the most key functional module is local clock unit.When it is safeguarding normally walking of local clock, and utilize calibration procedure to do the correction in bias to local clock, side-play amount calculates by the clock information in synchronization message.In local clock unit, storing simultaneously and carrying out synchronous required time data, and the description document of clock status and corresponding attribute.The synchronization message that clock synchronization module sends mainly for the treatment of front segment interface, comprises the parsing to message, the calling of the calculating of side-play amount and communication delay and synchronized algorithm.Thereby time data module for reading and writing is responsible for reading time data and carrying out encapsulating rise time stamp file by agreement form from local clock.Timestamp processing module is the message format for Internet Transmission by the message with timestamp and data encapsulation, and the message receiving from other equipment is carried out to corresponding deblocking.In clock control model upper strata be common interface module, wherein comprised feature message interface and synchronization message interface.These two interfaces share a network port, but logically have different functions to divide.Feature message interface is responsible for the internet message of processing capacity as data message, control command etc., and data message is directly sent to functional module corresponding in equipment.And synchronization message interface is corresponding to the sync message of special format, called by time synchronized module.
As shown in Figure 3, with compared with the clock control module equipment, main equipment clock control model has lacked synchronization module, increased in clock unit from device shifting amount array, for the synchronous situation of real-time update system corresponding device.As clock source, the clock control model of main equipment need not participate in synchronous between equipment, the substitute is independent master clock synchronized algorithm and feedback retransmission mechanism, for revising packet loss and the error of synchronizing process.Meanwhile, have default synchronizing cycle in main equipment clock unit, after certain communication cycle finishes, synchronization mechanism just can start, clock skew between corrective, the consistency of equipment room in assurance system.
If synchronization message makes a mistake or occurs the situations such as packet loss in transmitting procedure, synchronization message interface from equipment control model can carry out mark in the mark domain in synchronization message heading, the device number that record is made mistakes, waits for that main equipment carries out synchronization message re-transmission.All from equipment in synchronization message has traveled through system, the synchronization message of main equipment can be carried out verification to the mark domain in message, if there is no wrong generation, synchronously completes.If check makes mistakes in synchronizing process to certain equipment, this synchronization failure, restarts this time synchronized.
Synchronous method of the present invention comprises the following steps:
1. initialization
In the dicyclo bus shown in Fig. 4, before the time synchronization process of equipment room starts, first clock control model is done to initialization.From equipment, need the timer zero clearing in local clock unit, prepare to record the time overhead of synchronization message transmitting-receiving process, remove the time data of the last time of storing in clock unit when synchronous simultaneously.Clock control model in main equipment also needs to empty side-play amount array and retardation array, to deposit this that calculate and clock offset and communication delay from equipment room when subsynchronous.
There is the time state information of this equipment local clock unit, the time that the event on can recording equipment occurs.
As shown in Figure 5, synchronization message comprises header and report body, and wherein header comprises:
Protocol type: arranged the protocol type for transmitting.
Type of message: having distinguished the kind of this message, is synchronization message or other.
Message-length: determined the shared bit number of this message.
Equipment sum: the scene that has comprised a counter and agreement is from the sum of equipment, and whether all equipment is all received this message for checking.
Mark domain: the device number that record breaks down, for feeding back to main equipment.
Source port number: confirm the ring number for transmitting this message thereby mark sends the port numbers of this message.
Sequence number: the sequence number that records main equipment transmission message.
And the timestamp that report body generates for storage equipment.
2. time synchronized starts
As shown in Figure 7, be ready for sending synchronization message to before equipment, the clock control module of main equipment reads the temporal information of the machine as the transmitting time of time synchronized message from local clock, sends it to time data module for reading and writing and generate the timestamp of corresponding form.Then in timestamp processing module, timestamp is packaged in synchronization message waiting for transmission and is sent in the lump in common interface module, after common interface module has confirmed that this message is synchronization message, by invoke synchronous message interface module, synchronization message is sent in communications loop.Subsequently, clock control module enters listening state, and wait synchronization message traversal is come back from equipment.
As shown in Figure 6, from the clock control model of equipment, the processing of synchronization message is divided into two stages: if from equipment be the synchronization message of receiving that for the first time main equipment sends, the temporal information reading in local clock unit while receiving this message generates corresponding time of reception stamp by time data read module, before this synchronization message is sent to next equipment by the synchronization message interface module in general-purpose interface, in local clock unit, read temporal information and generate transmitting time stamp, and by timestamp processing module, time of reception stamp and transmitting time stamp are encapsulated in synchronization message, in the time that this equipment is received synchronization message from another loop again, if received the synchronization message of coming from a certain loop transmission before, similarly, record the time of reception rise time stamp, now, the timestamp that need to read upper a piece of news due in from the buffer memory of local clock unit is added to this synchronization message in the lump, then sends to the next one that belongs to current loop from equipment.Receive from equipment this synchronization message at next, calculating two communication between devices postpones with the factor of clock skew all satisfied, so allocating time synchronization module calculates the retardation in side-play amount and the communication process of local clock and target clock, then result is sent in clock alignment module local clock is revised.
Below in conjunction with Fig. 8, the calculating of clock offset and communication delay is described further.
In synchronizing message transmissions in loop 1, sending the timestamp of synchronization message when from equipment i+1 from equipment i is t i', synchronization message is carried this timestamp and is arrived from equipment i+1, and the timestamp of due in is t i+1.And in loop 2, another synchronization message is sent to from equipment i+1 from equipment i, the timestamp of delivery time is s i+1', from equipment by timestamp t i+1with s i+1' send to from equipment i with synchronization message, it is s that synchronization message arrives from the timestamp in the moment of equipment i. simultaneously i.Now, there have been four necessary timestamp t from equipment i', t i+1, s i+1', s ijust can pass through formula
T offset=((t i+1-t i′)+(S i-S i+1′))/2
T delay=((t i+1-t i′)-(S i-S i+1′))/2
Calculate from equipment i and from clock offset and communication delay between equipment i+1, thereby be correlated with correction.
In this process, if synchronization message makes a mistake or occurs the situations such as packet loss in transmitting procedure, synchronization message interface from equipment control model can carry out mark in the mark domain in synchronization message heading, and the device number that record is made mistakes waits for that main equipment carries out synchronization message re-transmission.
In this simultaneously, the common interface module of controlling in model need to do and classify the message receiving, if determine it is feature message, sends in corresponding functional module through feature message processing module.
3 same EOSs
All from equipment in synchronization message has traveled through system, the synchronization message of main equipment can be carried out verification to the mark domain in message, if there is no wrong generation, synchronously completes.If check makes mistakes in synchronizing process to certain equipment, this synchronization failure, restarts this time synchronized.

Claims (3)

1. the method for synchronizing time based on dicyclo bus, is characterized in that comprising the following steps:
Master/slave arrangement initialization: from the local clock unit timer zero clearing of equipment, remove the wherein time data of storage; The local clock unit of main equipment empties inner side-play amount array and retardation array;
When main equipment sends synchronization message by dicyclo bus, by transmitting time rise time stamp, be encapsulated in synchronization message, be sent to adjacent from equipment by two ports of main equipment;
The moment t of synchronization message will be received a loop from equipment i irise time stamp, and store local clock unit into; Be somebody's turn to do while sending synchronization message from equipment transmitting time t i' rise time stabs it and be encapsulated in this synchronization message, is sent to nextly from equipment i+1, will receive this synchronization message moment t from equipment i+1 i+1the timestamp generating is preserved;
Meanwhile, in another loop, will send another synchronization message to the transmitting time s from equipment i from equipment i+1 i+1' rise time stamp, by itself and t i+1timestamp be sent to from equipment i by this synchronization message; To receive this synchronization message moment s from equipment i ithe timestamp generating is preserved;
From equipment, i passes through t i+1, t i', s i+1', s ifour timestamps calculate from equipment i with from the clock offset T between equipment i+1 offsetwith communication delay T delay; From the local clock unit of equipment i according to clock offset T offsetwith communication delay T delayrevise local clock, complete the time synchronized of dicyclo bus master/slave arrangement.
2. a kind of method for synchronizing time based on dicyclo bus according to claim 1, is characterized in that:
Described synchronization message comprises header and report body; Wherein header comprises: protocol type, type of message, message-length, equipment sum, mark domain, source port number, sequence number; Report body comprises the timestamp that equipment generates.
3. a kind of method for synchronizing time based on dicyclo bus according to claim 1, is characterized in that:
Described calculating is from equipment i with from the clock offset T between equipment i+1 offsetwith communication delay T delayobtain by following formula
T offset=((t i+1-t i′)+(S i-S i+1′))/2
T delay=((t i+1-t i′)-(S i-S i+1′))/2
CN201210445774.6A 2012-11-09 2012-11-09 Time synchronization method based on double ring bus Pending CN103812589A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210445774.6A CN103812589A (en) 2012-11-09 2012-11-09 Time synchronization method based on double ring bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210445774.6A CN103812589A (en) 2012-11-09 2012-11-09 Time synchronization method based on double ring bus

Publications (1)

Publication Number Publication Date
CN103812589A true CN103812589A (en) 2014-05-21

Family

ID=50708849

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210445774.6A Pending CN103812589A (en) 2012-11-09 2012-11-09 Time synchronization method based on double ring bus

Country Status (1)

Country Link
CN (1) CN103812589A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104320240A (en) * 2014-11-03 2015-01-28 武汉科影技术科技有限公司 Method and device for providing global clock in system
CN106877962A (en) * 2015-12-09 2017-06-20 大隈株式会社 Timer synchronization system in Loop communication channel
CN106953708A (en) * 2017-03-31 2017-07-14 山东超越数控电子有限公司 A kind of clock synchronization system and its method of work based on industrial looped network
CN107395308A (en) * 2017-07-14 2017-11-24 国网上海市电力公司 A kind of Distributed Wireless Sensor Networks method for synchronizing time of low memory cost
CN107819563A (en) * 2017-08-30 2018-03-20 悦享趋势科技(北京)有限责任公司 The measuring system of time synchronism apparatus and pulse wave conduction speed
CN110568753A (en) * 2019-07-30 2019-12-13 青岛小鸟看看科技有限公司 handle, head-mounted equipment, head-mounted system and time synchronization method thereof
CN110807063A (en) * 2019-09-27 2020-02-18 国电南瑞科技股份有限公司 Substation real-time data rapid distribution synchronization system and method based on edge calculation
CN110943795A (en) * 2019-10-22 2020-03-31 清华大学 Time synchronization method suitable for bus communication system
CN111357243A (en) * 2017-12-12 2020-06-30 Wago管理有限责任公司 User device of bus system, operation method and bus system
WO2020243921A1 (en) * 2019-06-05 2020-12-10 深圳市汇顶科技股份有限公司 Topology switching method and apparatus based on synchronous link, and system and storage medium
CN112202525A (en) * 2020-10-29 2021-01-08 电信科学技术第五研究所有限公司 PPS (pulse per second) delay automatic measurement and compensation method of multi-board card equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101083657A (en) * 2007-06-29 2007-12-05 华中科技大学 Numerical control system real-time synchronization network controller and communication control method
CN101631016A (en) * 2009-04-14 2010-01-20 华中科技大学 Time synchronization method of fieldbus
CN101950175A (en) * 2010-10-21 2011-01-19 广州数控设备有限公司 Implementation method of high-speed fieldbus based on industrial Ethernet

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101083657A (en) * 2007-06-29 2007-12-05 华中科技大学 Numerical control system real-time synchronization network controller and communication control method
CN101631016A (en) * 2009-04-14 2010-01-20 华中科技大学 Time synchronization method of fieldbus
CN101950175A (en) * 2010-10-21 2011-01-19 广州数控设备有限公司 Implementation method of high-speed fieldbus based on industrial Ethernet

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
杨海波: "基于交换式以太网的数控系统通信和时间同步机制", 《小型微型计算机系统》, 15 November 2010 (2010-11-15) *

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104320240A (en) * 2014-11-03 2015-01-28 武汉科影技术科技有限公司 Method and device for providing global clock in system
US10187196B2 (en) 2014-11-03 2019-01-22 The Wuhan Digital Pet Co., Ltd Method and device for providing a global clock in a system
CN106877962A (en) * 2015-12-09 2017-06-20 大隈株式会社 Timer synchronization system in Loop communication channel
CN106953708A (en) * 2017-03-31 2017-07-14 山东超越数控电子有限公司 A kind of clock synchronization system and its method of work based on industrial looped network
CN107395308A (en) * 2017-07-14 2017-11-24 国网上海市电力公司 A kind of Distributed Wireless Sensor Networks method for synchronizing time of low memory cost
CN107819563A (en) * 2017-08-30 2018-03-20 悦享趋势科技(北京)有限责任公司 The measuring system of time synchronism apparatus and pulse wave conduction speed
CN111357243A (en) * 2017-12-12 2020-06-30 Wago管理有限责任公司 User device of bus system, operation method and bus system
CN111357243B (en) * 2017-12-12 2023-08-11 Wago管理有限责任公司 User equipment of bus system, operation method and bus system
WO2020243921A1 (en) * 2019-06-05 2020-12-10 深圳市汇顶科技股份有限公司 Topology switching method and apparatus based on synchronous link, and system and storage medium
US11444800B2 (en) 2019-06-05 2022-09-13 Shenzhen GOODIX Technology Co., Ltd. Topology switching method based on isochronous channel, apparatus, system and storage medium
CN110568753A (en) * 2019-07-30 2019-12-13 青岛小鸟看看科技有限公司 handle, head-mounted equipment, head-mounted system and time synchronization method thereof
CN110807063A (en) * 2019-09-27 2020-02-18 国电南瑞科技股份有限公司 Substation real-time data rapid distribution synchronization system and method based on edge calculation
CN110943795A (en) * 2019-10-22 2020-03-31 清华大学 Time synchronization method suitable for bus communication system
CN110943795B (en) * 2019-10-22 2021-05-14 清华大学 Time synchronization method suitable for bus communication system
CN112202525A (en) * 2020-10-29 2021-01-08 电信科学技术第五研究所有限公司 PPS (pulse per second) delay automatic measurement and compensation method of multi-board card equipment

Similar Documents

Publication Publication Date Title
CN103812589A (en) Time synchronization method based on double ring bus
CN101977104B (en) IEEE1588 based accurate clock synchronization protocol system and synchronization method thereof
CN106992830B (en) A kind of clock synchronizing method in FC-AE-1553 networks
CN102104475B (en) IEEE 1588-based synchronization system and synchronization method thereof
CN101547083B (en) Time synchronizer, time synchronization system and time synchronization method
CN101594673B (en) Method and system for processing 1588 time stamp in distribution mode
CN104378193A (en) Time synchronization system and method, exchanger and embedded interface board
CN103532652B (en) A kind of time synchronism apparatus and method
CN103067112B (en) Clock synchronizing method, device and the network equipment
US9654555B2 (en) Method for synchronizing local clocks in a distributed computer system
CN102299788A (en) Method and device for controlling automatic transmission of IEEE1558 (Institute of Electrical and Electronic Engineers 1558) protocol message
CN102447553A (en) Realizing device of accurate time synchronization protocol
CN101917316A (en) Communication method and device for high-speed real-time industrial Ethernet
CN101447861A (en) IEEE 1588 time synchronization system and implementation method thereof
CN101330342B (en) Method for implementing time synchronization protocol using port mirror and apparatus thereof
CN107579793A (en) The optimization method of time synchronized, device and equipment between a kind of communication network device
CN103929293A (en) Asymmetrically-delayed time synchronization method and system
CN102013931A (en) Time synchronization method and system, salve timing device and main timing device
CN107786293A (en) Method for synchronizing time, clock equipment, from clockwork and clock synchronization system
CN103378993A (en) Slave clock monitoring method based on PTP
CN105743598A (en) Industrial Ethernet clock synchronization method and system
CN203596827U (en) Time synchronization system, switch, and embedded interface board
CN103647614A (en) Method for reliably improving time synchronization precision based on IEEE1588 protocol
WO2019056921A1 (en) Centralized 1588 implementation system and method
CN101009546A (en) Time synchronization method for network segment utilizing different time synchronization protocol

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20140521