CN103810128A - Main control device - Google Patents
Main control device Download PDFInfo
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- CN103810128A CN103810128A CN201210391073.9A CN201210391073A CN103810128A CN 103810128 A CN103810128 A CN 103810128A CN 201210391073 A CN201210391073 A CN 201210391073A CN 103810128 A CN103810128 A CN 103810128A
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Abstract
The invention provides a main control device. The main control device comprises a power port, a dual-port RAM module, a CPU module and a communication interface module, wherein the power port is connected with the CPU module and the communication interface module; the dual-port RAM module is connected between the CPU module and the communication interface module and is used for receiving and storing control information sent by the CPU module and detection information sent by the communication interface module; the CPU module is used for reading the detection information stored in the dual-port RAM module, generating control information according to the detection information and sending the control information to the dual-port RAM module; the communication interface module is used for sending the detection information to the dual-port RAM module and reading the control information stored in the dual-port RAM module. According to the main control device, information transmission between the CPU module and the communication interface module is achieved through the dual-port RAM module, communication rate is improved effectively, and then the performance of the main control device is improved.
Description
Technical field
The present invention relates to the communications field, relate in particular to a kind of master control set.
Background technology
In multiprocessor (hereinafter to be referred as CPU) system, for example, in master control set, the exchange of data and to obtain be important ingredient.The communication speed of described matching requirements exchanges data is very high, and its mean speed is generally in 10K left and right, more than sometimes even needing to reach 100K conventionally.
In existing master control set, its exchanges data and obtaining is normally carried out based on bus.Fig. 1 is the system construction drawing of existing master control set, and as shown in Figure 1, CPU board and the communication interface board data bus by backboard is realized mutual, and by power panel independently, described CPU board and described communication interface board is powered.
But; because the traffic rate of data bus is slower; conventionally can affect traffic rate and the device performance of existing master control set; the traffic rate of data bus that connects described CPU board and described communication interface board is slower; be difficult to meet under high real-time situation; the master control set of for example locomotive, to the requirement of traffic rate, affects the performance of master control set.
Summary of the invention
The invention provides a kind of master control set, for solving existing master control set because data bus communication speed causes affecting the problem of device performance slowly.
The invention provides a kind of master control set, comprising: power port, dual-port random access memory RAM module, CPU module and communication interface modules;
Described power port, is connected with CPU module and communication interface modules, for the operating voltage receiving being offered to described CPU module and described communication interface modules;
Described two-port RAM module, is connected between described CPU module and described communication interface modules, for receiving the control information of described CPU module transmission and the detection information of described communication interface modules transmission and storing;
Described CPU module, the described detection information of storing for reading described two-port RAM module, according to control information described in described detection Information generation, and sends to described two-port RAM module by described control information;
Described communication interface modules, for described detection information is sent to described two-port RAM module, and reads the described control information of storing in described two-port RAM module.
In master control set provided by the invention, pass through dual-port random access memory (Random AccessMemory, hereinafter to be referred as RAM) module realizes the transmission of information between CPU module and communication interface modules, effectively improve the traffic rate of master control set, and then improve the performance of master control set, and because two-port RAM module volume is little, be easy to integratedly, therefore effectively reduced the volume of master control set, and then it is little to have realized master control set volume, the effect that traffic rate is fast.
Accompanying drawing explanation
Fig. 1 is the structural representation of existing master control set;
The structural representation of a kind of master control set that Fig. 2 provides for the embodiment of the present invention one;
The structural representation of a kind of master control set that Fig. 3 provides for the embodiment of the present invention two;
The connection diagram of a kind of master control set that Fig. 4 provides for the embodiment of the present invention three;
The structural representation of a kind of master control set that Fig. 5 provides for the embodiment of the present invention four;
The application schematic diagram of a kind of master control set that Fig. 6 provides for the embodiment of the present invention.
Embodiment
For making object, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described.
The structural representation of a kind of master control set that Fig. 2 provides for the embodiment of the present invention one, as shown in Figure 2, described device comprises: power port 21, dual-port random access memory (Random Access Memory, hereinafter to be referred as RAM) module 22, CPU module 23 and communication interface modules 24;
Two-port RAM module 22, is connected between CPU module 23 and communication interface modules 24, for receiving the detection information that control information that CPU module 23 sends and communication interface modules 24 send and storing;
Optionally, there is numerous embodiments in the reception that power port 21 is realized operating voltage, for example, is directly connected with voltage source, and the present embodiment is not limited at this.
The features such as in actual applications, it is high that two-port RAM has traffic rate, and Interface design is simple, can be used as the data exchange interface of each CPU in multi-CPU system, thereby improve the traffic rate between described each CPU.
The master control set that the present embodiment provides, realizes the transmission of information between CPU module and communication interface modules by two-port RAM module, effectively improved the traffic rate of master control set, and then has improved the performance of master control set.
The structural representation of a kind of master control set that Fig. 3 provides for the embodiment of the present invention two, as shown in Figure 3, according to the master control set described in embodiment corresponding to Fig. 2, wherein, two-port RAM module 22 specifically comprises that two-port RAM main leaf 321 and two-port RAM are from sheet 322, two-port RAM main leaf 321 is in parallel from sheet 322 with two-port RAM, and model is identical.
Optionally, the model of two two-port RAMs can be determined according to the port arrangement of described CPU module and described communication interface modules, for example, described CPU module and described communication interface modules are 32 bit CPUs, two two-port RAMs can be the two-port RAM that model is A3P060, and the present embodiment is not limited at this.
The master control set that the present embodiment provides, realizes the port match between CPU module and communication interface modules by the two-port RAM module of two two-port RAM parallel connections, has improved the versatility of master control set.
The connection diagram of a kind of master control set that Fig. 4 provides for the embodiment of the present invention three, as shown in Figure 4, according to the master control set described in embodiment corresponding to Fig. 3, wherein, described power port is not shown in Fig. 4, described CPU module and described communication interface modules are 32 bit CPUs, described two-port RAM module be by A3P060 two-port RAM main leaf with A3P060 two-port RAM from sheet 2k × 16b two-port RAM module in parallel.
Wherein, the first of described A3P060 two-port RAM main leaf selects signal end CE_L to be connected with the chip selection signal end GCS1 of described CPU module and the chip selection signal end GCS1 of described communication interface modules respectively with the second chip selection signal end CE_R, be used for receiving chip selection signal, A3P060 two-port RAM main leaf described in gating; The first enable signal end OE_L of described A3P060 two-port RAM main leaf is connected with the enable signal end OE of described CPU module and the enable signal end OE of described communication interface modules respectively with the second enable signal end OE_R, be used for receiving enable signal, make the work of described A3P060 two-port RAM main leaf; The first read-write control end RW_L of described A3P060 two-port RAM main leaf is connected with the read-write control end WE of described CPU module and the read-write control end WE of described communication interface modules respectively with the second read-write control end RW_R, be used for receiving read-write control signal, control the read-write operation of described A3P060 two-port RAM main leaf; The first address bus ADDR of described A3P060 two-port RAM main leaf
10-0Lwith the second address bus ADDR
10-0Rrespectively with the address bus ADDR of described CPU module
10-0address bus ADDR with described communication interface modules
10-0corresponding connection; The first busy control of described A3P060 two-port RAM main leaf with judge port BUSY_L and the second busy control with judge port BUSY_R respectively with the busy control of described CPU module and the busy control that judge port WAIT and described communication interface modules with judge that port WAIT is connected; Concrete, the described A3P060 two-port RAM corresponding with each port of A3P060 two-port RAM main leaf described above is from each port of sheet, the above-mentioned each port corresponding with described A3P060 two-port RAM main leaf connects respectively, realize the parallel connection of two A3P060 two-port RAMs, its concrete connected mode does not repeat them here.
In addition, described A3P060 two-port RAM, from the M/S end input logic low level of sheet, is set to logical zero, for determining that its corresponding A3P060 two-port RAM is that described A3P060 two-port RAM is from sheet; The M/S end input logic high level of described A3P060 two-port RAM main leaf, is set to logical one, for determining that its corresponding A3P060 two-port RAM is described A3P060 two-port RAM main leaf; Described A3P060 two-port RAM is from the first data bus DATA of sheet
7-0Lwith the second data bus DATA
7-0Rrespectively with the first data bus DATA of CPU module
7-0the first data bus DATA with communication interface modules
7-0corresponding connection; The first data bus DATA of described A3P060 two-port RAM main leaf
15-8Lwith the second data bus DATA
15-8Rrespectively with the second data bus DATA of CPU module
15-8the second data bus DATA with communication interface modules
15-8corresponding connection;
The advantages such as the two-port RAM module of the master control set that the present embodiment provides has that access speed is fast, low-power consumption, asynchronous operation completely, interface circuit are simple, and can realize the transmission of information between CPU module and communication interface modules, effectively improve the traffic rate of master control set, and then improved performance and the versatility of master control set.
The structural representation of a kind of master control set that Fig. 5 provides for the embodiment of the present invention four, as shown in Figure 5, according to the master control set described in Fig. 2 or embodiment corresponding to Fig. 3, described device also comprises: power panel 51;
Voltage input end mouth 511, for receiving input voltage;
Voltage-output port 512, is connected with power port, for exporting described operating voltage to described power port;
Optionally, described operating voltage is definite according to the running parameter of CPU module and communication interface modules, and for example, getting described operating voltage is 5V, and the present embodiment is not limited at this.
Optionally, as a kind of enforceable mode of the present embodiment, in power panel 51, voltage input end mouth 511 places can arrange a diode, connect the anti-ballistic circuit burnout causing for preventing that the voltage at voltage input end mouth place of power panel is positive and negative, ensure circuit safety; Voltage input end mouth 511 places also can arrange an inductance element for suppressing common mode interference, improve the stability that voltage transforms.And the circuit of the power panel of the present embodiment also comprises other numerous embodiments, the present embodiment does not repeat them here.Present embodiment is carried out voltage transitions the reliable operating voltage of stable output by power panel, has improved stability and the reliability of CPU module and communication interface modules, and then has improved stability and the reliability of master control set.
As the another kind of enforceable mode of the present embodiment, described Voltage-output port is bipod jack structure, corresponding, described power port is bipod contact pin structure, present embodiment can be passed through bipod contact pin structure and bipod jack structure, effectively reduces the volume of master control set.
The master control set that the present embodiment provides is powered to CPU module and communication interface modules respectively by the power panel that possesses voltage transformation function, can be in the situation that input voltage be different from operating voltage, still can make master control set normal operation, improve the versatility of master control set.
Concrete, the master control set providing according to above-mentioned arbitrary embodiment, as the enforceable mode of one, described power port, two-port RAM module, CPU module and communication interface modules are integrated on a circuit board.The master control set that present embodiment provides utilizes two-port RAM module volume little, be easy to integrated feature, effectively reduced the volume of master control set, improved the problem that existing master control set board is many, and then in improving master control set traffic rate, effectively reduce the volume of master control set.
The application schematic diagram of a kind of master control set that Fig. 6 provides for the embodiment of the present invention, as shown in Figure 6, according to the master control set described in embodiment corresponding to Fig. 5, described power port, two-port RAM module, CPU module and communication interface modules are integrated on a circuit board 61, power panel 51 is arranged on the top of the circuit board 61 place planes of integrated acquisition, and power panel 51 and circuit board 61 can share a public panel 62.Wherein, the Voltage-output port 512 in power panel 51 is fixedly connected with by the bipod contact pin structure of power port 21 in its bipod jack structure alignment circuit plate 61, and circuit board 61 is fixing is connected with public panel 62.
Optionally, on the front panel of public panel 62, energization pins can be set, described energization pins is connected with the voltage input end mouth 511 of power panel 51, is used to power panel 51 that input voltage is provided; Communication interface also can be set on the front panel of public panel 62, and described communication interface is connected with the communication interface modules 24 in circuit board 61, for realizing communicating by letter of master control set and external device (ED).The concrete shape of described energization pins and described communication interface can mate according to the device shaped that be connected corresponding to it definite, and the present embodiment is not limited at this.
The master control set that the present embodiment provides utilizes power panel, two-port RAM module, and it is little, simple in structure that bipod jack and contact pin structure and public panel are realized volume, and traffic rate is fast, and the high master control set of stability.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (6)
1. a master control set, is characterized in that, comprising: power port, dual-port random access memory RAM module, CPU module and communication interface modules;
Described power port, is connected with CPU module and communication interface modules, for the operating voltage receiving being offered to described CPU module and described communication interface modules;
Described two-port RAM module, is connected between described CPU module and described communication interface modules, for receiving the control information of described CPU module transmission and the detection information of described communication interface modules transmission and storing;
Described CPU module, the described detection information of storing for reading described two-port RAM module, according to control information described in described detection Information generation, and sends to described two-port RAM module by described control information;
Described communication interface modules, for described detection information is sent to described two-port RAM module, and reads the described control information of storing in described two-port RAM module.
2. device according to claim 1, is characterized in that, described two-port RAM module comprises that two-port RAM main leaf and two-port RAM are from sheet, and described two-port RAM main leaf and described two-port RAM are from sheet parallel connection, and model is identical.
3. device according to claim 1, is characterized in that, described device also comprises: power panel;
Described power panel comprises: voltage input end mouth, Voltage-output port and voltage conversion module;
Described voltage input end mouth, for receiving input voltage;
Described Voltage-output port, is connected with described power port, for exporting described operating voltage to described power port;
Described voltage conversion module, is connected between described voltage input end mouth and described Voltage-output port, for described input voltage is converted into described operating voltage.
4. device according to claim 3, is characterized in that, described operating voltage is 5V.
5. device according to claim 3, is characterized in that, described Voltage-output port is bipod jack structure; Described power port is bipod contact pin structure.
6. according to the device described in claim 1-5 any one, it is characterized in that, described power port, two-port RAM module, CPU module and communication interface modules are integrated on a circuit board.
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| CN201210391073.9A CN103810128A (en) | 2012-10-15 | 2012-10-15 | Main control device |
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| CN201210391073.9A CN103810128A (en) | 2012-10-15 | 2012-10-15 | Main control device |
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Application publication date: 20140521 |
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