CN103795395B - A kind of mould electric installation for anti-shake slot synchronization - Google Patents
A kind of mould electric installation for anti-shake slot synchronization Download PDFInfo
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- CN103795395B CN103795395B CN201410025789.6A CN201410025789A CN103795395B CN 103795395 B CN103795395 B CN 103795395B CN 201410025789 A CN201410025789 A CN 201410025789A CN 103795395 B CN103795395 B CN 103795395B
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Abstract
The invention provides a kind of mould electric installation for anti-shake slot synchronization, comprising: coupling circuit, testing circuit, shaping circuit, hysteresis comparison circuit and voltage-controlled attenuator; Coupling circuit, for the radiofrequency signal that is coupled from radio frequency path to described testing circuit; Testing circuit, sends to shaping circuit for radiofrequency signal being converted to voltage time-domain signal; Shaping circuit, sends to hysteresis comparison circuit for voltage time-domain signal is converted to triangle wave voltage time-domain signal; Hysteresis comparison circuit, for triangle wave voltage time-domain signal relatively, when setting threshold value, output comparative result, to voltage-controlled attenuator, is controlled voltage-controlled attenuator and is carried out decay work. This mould electric installation that the embodiment of the present invention provides has been realized the synchronous of anti-shake time slot signal by hardware circuit completely, because hardware circuit itself is just higher than the real-time of digital form, therefore, mould electric installation provided by the invention not only can be anti-shake, and reaction speed is fast, real-time is high.
Description
Technical field
The present invention relates to Technology of Time Slot field, particularly a kind of mould electricity for anti-shake slot synchronizationDevice.
Background technology
In prior art, in order to ensure that reception and the first frame that analog-digital converter ADC is good do not lose,Require has certain signal to noise ratio in the time ensureing the lower signal of received power, and at the stronger signal of received powerTime, can not produce again too large distorted signal. Therefore, require the power of ADC input signal to be no more than-20dBm. But for received signal strength indicator device (RSSI, ReceivedSignalStrengthIndicator) easily calculate, so electrically controlled attenuator control only has two grades, the thresholding that exceedes setting is openedAttenuator, otherwise turn off attenuator.
At present, in prior art, be all to realize synchronous time domain signal by digital form, for example, based on FPGASynchronization module. Coupling needs synchronous signal, after ADC conversion, sends into FPGA, and FPGA entersAfter the processing such as the collection of row data, data-optimized, data demodulates, carry out again slot synchronization.
But the shortcoming that digital form carries out slot synchronization is: anti-shake property is poor; And react slow,Need to carry out after software calculates judgement moving, real-time is poor again. The poor direct result of real-time can make exactlyADC obliterated data. Therefore, need to provide a kind of device of anti-shake slot synchronization, real-time is higher,Prevent the loss of data.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of mould electric installation for anti-shake slot synchronization,Can carry out quickly slot synchronization, prevent the loss of data.
The embodiment of the present invention provides a kind of mould electric installation of anti-shake slot synchronization, comprising: coupling circuit, inspectionSlowdown monitoring circuit, shaping circuit, hysteresis comparison circuit and voltage-controlled attenuator;
Described coupling circuit, for the radiofrequency signal that is coupled from radio frequency path to described testing circuit;
Described testing circuit, sends to described shaping for described radiofrequency signal is converted to voltage time-domain signalCircuit;
Described shaping circuit, sends for described voltage time-domain signal being converted to triangle wave voltage time-domain signalGive described hysteresis comparison circuit;
Described hysteresis comparison circuit, for more described triangle wave voltage time-domain signal higher than set threshold valueTime, output comparative result is given described voltage-controlled attenuator, controls voltage-controlled attenuator and carries out decay work.
Preferably, also comprise: filter circuit;
Described filter circuit is connected to the output of described testing circuit;
Described filter circuit, for carrying out the voltage time-domain signal of described testing circuit output to send after filteringGive described shaping circuit.
Preferably, described filter circuit is RC filter circuit, comprising: the 11 resistance and the 11 electric capacity;
One end of described the 11 resistance connects the output of described testing circuit, described the 11 resistance anotherOne end ground connection;
One end of described the 11 electric capacity connects the output of described testing circuit, described the 11 electric capacity anotherOne end ground connection.
Preferably, described shaping circuit comprises: the first electric capacity, the second electric capacity, the first resistance, the second resistanceAnd operational amplifier;
The first end of described the first electric capacity connects the output of described testing circuit, second of described the first electric capacityEnd connects the first end of the second electric capacity, and the second end of the second electric capacity connects the positive input of described operational amplifierEnd;
One end of described the first resistance connects the normal phase input end of described operational amplifier, described the first resistanceOther end ground connection;
One end of described the second resistance connects the inverting input of described operational amplifier, described the second resistanceThe other end connects the second end of described the first electric capacity;
The inverting input of the output concatenation operation amplifier of described operational amplifier.
Preferably, described shaping circuit also comprises: the 3rd electric capacity and the 4th electric capacity;
One end of described the 3rd electric capacity connects the working power end of described operational amplifier, described the 3rd electric capacityOther end ground connection;
One end of described the 4th electric capacity connects the working power end of described operational amplifier, described the 4th electric capacityOther end ground connection.
Preferably, described hysteresis comparison circuit comprises: the 3rd resistance, the 4th resistance, the 5th resistance and hysteresisComparator;
One end of described the 4th resistance connects the output of described shaping circuit, the other end of described the 4th resistanceConnect the normal phase input end of described hysteresis loop comparator;
The normal phase input end of described hysteresis loop comparator is by described the 5th resistance eutral grounding;
The output of described hysteresis loop comparator connects the positive of described hysteresis loop comparator by described the 3rd resistanceInput;
The inverting input of described hysteresis loop comparator connects the working power of hysteresis loop comparator by adjustable resistanceEnd.
Preferably, described hysteresis comparison circuit also comprises: the 5th electric capacity and the 6th electric capacity;
One end of described the 5th electric capacity connects the working power end of described hysteresis loop comparator, described the 5th electric capacityOther end ground connection;
One end of described the 6th electric capacity connects the working power end of described hysteresis loop comparator, described the 6th electric capacityOther end ground connection.
Preferably, described setting threshold value comprises threshold ones and wealthy family's limit value;
Described threshold ones is 0.05V, and described wealthy family limit value is 0.85V.
Preferably, described the 3rd resistance is 60 kilohms;
Described the 4th resistance is 15 kilohms;
Described the 5th resistance is 90 kilohms.
Preferably, described coupling circuit comprises coupling capacitance;
One end of described coupling capacitance connects described radio frequency path, and the other end of described coupling capacitance connects instituteState the input of testing circuit.
Compared with prior art, the present invention has the following advantages:
The mould electric installation for anti-shake slot synchronization that the present embodiment provides is logical from radio frequency by coupling circuitThe radiofrequency signal that is coupled on road, is converted to voltage time-domain signal by the radiofrequency signal of coupling and processes, for anti-The mistake that only shake causes, changes again voltage time-domain signal for triangle wave voltage time-domain signal, by stagnantReturn comparison circuit triangle wave voltage time-domain signal is compared with setting threshold value, thereby control voltage-controlled decayWhether device works. This mould electric installation that the embodiment of the present invention provides has been realized anti-shake completely by hardware circuitMove the synchronous of time slot signal, because hardware circuit itself is just higher than the real-time of digital form, therefore, thisThe bright mould electric installation providing not only can be anti-shake, and reaction speed is fast, and real-time is high.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below will be to implementingIn example or description of the Prior Art, the accompanying drawing of required use is briefly described, and apparently, the following describesIn accompanying drawing be only some embodiments of the present invention, for those of ordinary skill in the art, do not payingGo out under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is mould electric installation embodiment mono-schematic diagram for anti-shake slot synchronization provided by the invention;
Fig. 2 is mould electric installation embodiment bis-schematic diagrames for anti-shake slot synchronization provided by the invention;
Fig. 3 is filter circuit schematic diagram provided by the invention;
Fig. 4 is shaping circuit schematic diagram provided by the invention;
Fig. 5 is hysteresis comparison circuit schematic diagram provided by the invention.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clearlyChu, intactly description, obviously, described embodiment is only the present invention's part embodiment, instead ofWhole embodiment. Based on the embodiment in the present invention, those of ordinary skill in the art are not making creationThe every other embodiment obtaining under property work prerequisite, belongs to the scope of protection of the invention.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, below in conjunction with accompanying drawing pairThe specific embodiment of the present invention is described in detail.
Embodiment mono-:
Referring to Fig. 1, this figure is the mould electric installation embodiment mono-for anti-shake slot synchronization provided by the inventionSchematic diagram.
It should be noted that, the mould electric installation of the anti-shake slot synchronization that the embodiment of the present invention provides is applicable toBefore ADC, that is, the signal of mould electric installation output inputs to ADC.
The present embodiment provides a kind of mould electric installation of anti-shake slot synchronization, comprising: coupling circuit 100, inspectionSlowdown monitoring circuit 200, shaping circuit 300, hysteresis comparison circuit 400 and voltage-controlled attenuator 500;
It should be noted that, the radiofrequency signal in radio communication is time slot signal.
Described coupling circuit 100, for the radiofrequency signal that is coupled from radio frequency path to described testing circuit 200;
It should be noted that, the coupling circuit 100 in the present embodiment can be realized by coupling capacitance.
One end of described coupling capacitance connects described radio frequency path, described in the other end of described coupling capacitance connectsThe input of testing circuit 200.
It should be noted that, described radiofrequency signal is input to voltage-controlled attenuator 500. Voltage-controlled attenuator 500Effect is for laggard line output that radiofrequency signal is decayed, for example, and voltage-controlled attenuator 500 inputsThe power of radiofrequency signal is 0dB, and the power of radiofrequency signal after voltage-controlled attenuator 500 output is-10dB.
Described testing circuit 200, for being converted to described radiofrequency signal described in voltage time-domain signal sends toShaping circuit 300;
Because radiofrequency signal is power signal, therefore, need testing circuit 200 that power signal is converted to electricityPress time-domain signal.
Described shaping circuit 300, for being converted to triangle wave voltage time-domain signal by described voltage time-domain signalSend to described hysteresis comparison circuit 400;
The voltage time-domain signal of exporting due to testing circuit 200 easily produces shake in setting threshold value, andVoltage time-domain signal is along with complementary cumulative distribution function (CCDF, ComplementaryCumulativeDistributionFunction) the different jitter range that produce are also different. The error producing in order to eliminate shake,The voltage time-domain signal of in the present invention, testing circuit 200 being exported is converted to triangular wave by shaping circuit 300Voltage time-domain signal.
The triangle wave voltage time-domain signal that export in described shaping loop 300 can be hysteresis comparison circuit 400Highs and lows is provided, and time interval between highs and lows and voltage time-domain signalThe one-period time is the same.
Particularly, triangle wave voltage time-domain signal can be realized by differential circuit in described shaping loop 300Output, time slot waveform occurs that the high point of moment rising edge is become the high point of triangular wave, time slot waveform moment by differentialTrailing edge is become the low spot of triangular wave by differential.
Described hysteresis comparison circuit 400, for entering described triangle wave voltage time-domain signal and setting threshold valueRelatively, output comparative result is given described voltage-controlled attenuator 500 to row, to control whether work of voltage-controlled attenuator 500Do.
It should be noted that, in the present invention, utilize hysteresis comparison circuit 400 by triangle wave voltage time-domain signalComparing with setting threshold value, and there is no the general common comparator of application, is in order to prevent that comparator tooHigh sensitivity, because comparator sensitivity too high easily make the mistake output and the voltage-controlled decay of multiple triggeringDevice.
The effect of this hysteresis comparison circuit 400 is triangle wave voltage time-domain signals that input is received and establishesDetermine threshold value and compare, determine whether output voltage time-domain signal according to comparative structure. For example,, when threeAngle wave voltage time-domain signal is higher than setting when threshold value, and hysteresis comparison circuit 400 is exported high level signal to pressingControlling attenuation device 500, voltage-controlled attenuator 500 is opened and is carried out work, by penetrating of voltage-controlled attenuator 500 inputsFrequently signal is exported after decaying. When triangle wave voltage time-domain signal is lower than setting when threshold value, hysteresis comparisonCircuit 400 output low level signals are to voltage-controlled attenuator 500, and voltage-controlled attenuator 500 is not opened, and does not enterRow decay work, now voltage-controlled attenuator 500 is exported the original signal of radiofrequency signal, and does not decay,For example, the radiofrequency signal of voltage-controlled attenuator 500 inputs is 0dB, and the radiofrequency signal of output is still0dB。
The effect of described voltage-controlled attenuator 500 is for radiofrequency signal is decayed and Domain Synchronous.
The mould electric installation for anti-shake slot synchronization that the present embodiment provides is logical from radio frequency by coupling circuitThe radiofrequency signal that is coupled on road, is converted to voltage time-domain signal by the radiofrequency signal of coupling and processes, for anti-The mistake that only shake causes, changes again voltage time-domain signal for triangle wave voltage time-domain signal, by stagnantReturn comparison circuit triangle wave voltage time-domain signal is compared with setting threshold value, thereby control voltage-controlled decayWhether device works. This mould electric installation that the embodiment of the present invention provides has been realized anti-shake completely by hardware circuitMove the synchronous of time slot signal, because hardware circuit itself is just higher than the real-time of digital form, therefore, thisThe bright mould electric installation providing not only can be anti-shake, and reaction speed is fast, and real-time is high.
Embodiment bis-:
Referring to Fig. 2, this figure is the mould electric installation embodiment bis-for anti-shake slot synchronization provided by the inventionSchematic diagram.
It should be noted that, the mould electric installation that the present embodiment provides is compared with embodiment, and difference is to have increased filterWave circuit 600.
Described filter circuit 600 is connected to the output of described testing circuit 200;
Described filter circuit 600, filters for the voltage time-domain signal that described testing circuit 200 is exportedAfter ripple, send to described shaping circuit 300.
Because the voltage dithering of time slot signal is except the CCDF impact of power supply and signal, testing circuitThe ripple of output is also a key factor that affects voltage dithering, therefore, needs the electricity of testing circuit outputPress the ripple of time-domain signal the smaller the better, therefore, in the present embodiment, be provided with filter circuit 600, by filterShaping circuit 300 is exported in ripple filtering by wave circuit 600 later again.
Embodiment tri-:
Referring to Fig. 3, this figure is filter circuit schematic diagram provided by the invention.
It should be noted that, the filter circuit that the embodiment of the present invention provides is RC filter circuit 600, comprising:The 11 resistance R the 11 and the 11 capacitor C 11;
One end of described the 11 resistance R 11 connects the output of described testing circuit 200, and the described the tenthThe other end ground connection of one resistance R 11;
One end of described the 11 capacitor C 11 connects the output of described testing circuit 200, and the described the tenthThe other end ground connection of one capacitor C 11.
Embodiment tetra-:
Referring to Fig. 4, this figure is shaping circuit schematic diagram provided by the invention.
The mould electric installation of the anti-shake slot synchronization that the present embodiment provides, described shaping circuit comprises: the first electricityHold C1, the second capacitor C 2, the first resistance R 1, the second resistance R 2 and operational amplifier U1;
The first end of described the first capacitor C 1 connects the output (being the Vin in Fig. 4) of described testing circuit,The second end of described the first capacitor C 1 connects the first end of the second capacitor C 2, the second end of the second capacitor C 2Connect the normal phase input end of described operational amplifier U1;
One end of described the first resistance R 1 connects the normal phase input end of described operational amplifier U1, and describedThe other end ground connection of one resistance R 1;
One end of described the second resistance R 2 connects the inverting input of described operational amplifier U1, and describedThe other end of two resistance R 2 connects the second end of described the first capacitor C 1;
The inverting input of the output concatenation operation amplifier U1 of described operational amplifier U1.
Taking Tetra signal frame length as 56.7ms (being that the cycle of signal frame is as 56.7ms) below, signalThe frequency of frame is 17.63668Hz, and Q-Value in Electric Circuit is 0.707 to introduce each ginseng in shaping circuit for exampleThe value of number.
F=1/0.0567*0.707=12.47102 (Hz); F is the signal frame frequency after normalization;
Select the value of C1 and C2 to be 0.4uf;
It should be noted that, the capacitance of C1 and C2 can be selected as required, in the present embodiment, be only with0.4uF is that example is calculated.
The computational methods of input impedance Ro of moving amplifier are as follows:
Ro=1/ (2 π C1*F)=1/[2*3.141593*0.4 (E-6) * 12.471] ≈ 31904.96=31.91 (kilo-ohmNurse);
It should be noted that, E-6 is expressed as 10-6；0.4uf*E＝0.0000004pf。
R1=2Q*Ro=2*0.707*31.91=45.11 (kilohm);
R2=Ro/2Q=31.91/ (2*0.707)=22.56 (kilohm);
Can find out, C1, C2, R1 and the R2 in shaping circuit is combined into differential circuit and removes foldedThe circuit of the high-frequency harmonic adding.
It should be noted that, the shaping circuit that the present embodiment provides also comprises: the 3rd capacitor C 3 and the 4th electricityHold C4; The effect of C3 and C4 is in order to carry out filtering to the working power of operational amplifier U1.
One end of described the 3rd capacitor C 3 connects the working power end of described operational amplifier U1, and describedThe other end ground connection of three capacitor C 3;
One end of described the 4th capacitor C 4 connects the working power end of described operational amplifier U1, and describedThe other end ground connection of four capacitor C 4.
The error producing in order to eliminate shake, in the present invention passes through the voltage time-domain signal of testing circuit outputShaping circuit is converted to triangle wave voltage time-domain signal.
Embodiment five:
Referring to Fig. 5, this figure is hysteresis comparison circuit schematic diagram provided by the invention.
The mould electric installation of the anti-shake slot synchronization that the present embodiment provides, described hysteresis comparison circuit comprises: theThree resistance R 3, the 4th resistance R 4, the 5th resistance R 5 and hysteresis loop comparator U2;
One end of described the 4th resistance R 4 connects the output (being the Vin in Fig. 5) of described shaping circuit,The other end of described the 4th resistance R 4 connects the normal phase input end (being IN+) of described hysteresis loop comparator U2;
The normal phase input end of described hysteresis loop comparator U2 is by described the 5th resistance R 5 ground connection;
Described in the output (being OUT) of described hysteresis loop comparator U2 connects by described the 3rd resistance R 3The normal phase input end of hysteresis loop comparator U2;
The inverting input (being IN-) of described hysteresis loop comparator U2 connects hysteresis ratio by adjustable resistance RPCompared with the working power end of device U2, in Fig. 5, the working power voltage of hysteresis loop comparator U2 is+3V.
Hysteresis loop comparator U2 in the present embodiment can adopt MAX985 as master chip.
It should be noted that, the setting threshold value in hysteresis comparison circuit comprises threshold ones and wealthy family's limit value.For example, when 0dB corresponding voltage 1V, can set the limit value 0.85V of the wealthy family threshold ones of hysteresis loop comparator0.05V, this choosing value can be selected according to concrete signal, needn't limit, because hysteresis loop comparatorOperation principle is well known in the art. For example, wealthy family's limit value can be selected 0.8V, and threshold ones can be selectedSelect 0.1V. As long as ensure that low threshold is less than wealthy family limit value, and wealthy family's limit value is less than the performance number pair of needsThe voltage of answering can (for example 0dB corresponding be 1V, wealthy family's limit value is less than 1V). In practical application,
Can select+3V of the working power of master chip, Vref (reference voltage)=0.6V, VL (low thresholdValue)=0.05, VH (wealthy family's limit value)=0.85, crucial resistance configuration is as follows:
The biasing Bias electric current of the both positive and negative polarity of input hysteresis loop comparator U2 is less than 10nA, does not pass through resistanceElectric current be 10nA, through after hypothesis expand 100 times, be at least 1uA through the electric current I r3 of R3,The error causing to reduce Bias electric current.
R3=Vref/Ir3=0.6/1 (E-6)=600 (kilohm);
R3=(Vcc-Vref)/Ir3=(3.2-0.6)/1 (E-6)=2600000=2600 (kilohm);
Being more than two kinds of modes of calculating R3, is respectively the R3 that VCC calculates to the voltage between Vref,One is the R3 that Vref calculates to the voltage between ground.
R3 gets the minimum of a value in above two kinds of account forms, select R3=600 (kilohm).
R4=R3*[(VH-VL)/Vcc]=600* ((0.85-0.05)/3.2)=150 (kilohm).
R5=1/ ((VH/ (Vref*R1))-1/R1-1/R3)=1/ ((0.85/ (0.6*150))-1/150-1/600)=900 (thousandOhm).
Due to the R3 calculating, R4 and R5 value too large, therefore, unified dwindle 10 times, finally electricityResistance is configured to: R4=15 (kilohm); R5=90 (kilohm); R3=60 (kilohm).
In the present embodiment, be to calculate R3, R4 and R5 as an example of the voltage and current of concrete example example,Be understandable that, those skilled in the art can design other numerical value according to actual needs. The present embodimentIn dwindle 10 times as example taking resistance unification, be understandable that, also can unify to dwindle 100 times,For example last resistance configuration is: R4=1.5 (kilohm); R5=9 (kilohm); R3=6 (kilohm).
In addition, the hysteresis comparison circuit that the present embodiment provides also comprises: the 5th capacitor C 5 and the 6th capacitor C 6;
One end of described the 5th capacitor C 5 connects the working power end of described hysteresis loop comparator U2, and describedThe other end ground connection of five capacitor C 5;
One end of described the 6th capacitor C 6 connects the working power end of described hysteresis loop comparator U2, and describedThe other end ground connection of six capacitor C 6.
It should be noted that, the effect of C5 and C6 is to carry out filtering for the working power of hysteresis loop comparator.
In sum, the mould electric installation of the anti-shake slot synchronization that the above embodiment of the present invention provides is completely logicalCross hardware and realize the anti-shake synchronous of time slot signal, want than the real-time realizing with digital form in prior artHigh a lot, and simple structure, price is also much lower than digital form. If in prior art with FPGA,The integrated chip such as ADC, clock generator, price is very high.
The above, be only preferred embodiment of the present invention, not the present invention done any pro formaRestriction. Although the present invention discloses as above with preferred embodiment, but not in order to limit the present invention. AnyThose of ordinary skill in the art, not departing from technical solution of the present invention scope situation, can utilize above-mentionedThe method and the technology contents that disclose are made many possible variations and modification to technical solution of the present invention, or amendmentFor the equivalent embodiment of equivalent variations. Therefore, every content that does not depart from technical solution of the present invention, according to thisThe technical spirit of invention, to any simple modification made for any of the above embodiments, equivalent variations and modification, all still belongs toIn the scope of technical solution of the present invention protection.
Claims (10)
1. a mould electric installation for anti-shake slot synchronization, is characterized in that, comprising: coupling circuit, inspectionSlowdown monitoring circuit, shaping circuit, hysteresis comparison circuit and voltage-controlled attenuator;
Described coupling circuit, for the radiofrequency signal that is coupled from radio frequency path to described testing circuit;
Described testing circuit, sends to described shaping for described radiofrequency signal is converted to voltage time-domain signalCircuit;
Described shaping circuit, sends for described voltage time-domain signal being converted to triangle wave voltage time-domain signalGive described hysteresis comparison circuit;
Described hysteresis comparison circuit, for more described triangle wave voltage time-domain signal higher than set threshold valueTime, output comparative result is given described voltage-controlled attenuator, controls voltage-controlled attenuator and carries out decay work.
2. the mould electric installation of anti-shake slot synchronization according to claim 1, is characterized in that, alsoComprise: filter circuit;
Described filter circuit is connected to the output of described testing circuit;
Described filter circuit, for carrying out the voltage time-domain signal of described testing circuit output to send after filteringGive described shaping circuit.
3. the mould electric installation of anti-shake slot synchronization according to claim 2, is characterized in that, instituteStating filter circuit is RC filter circuit, comprising: the 11 resistance and the 11 electric capacity;
One end of described the 11 resistance connects the output of described testing circuit, described the 11 resistance anotherOne end ground connection;
One end of described the 11 electric capacity connects the output of described testing circuit, described the 11 electric capacity anotherOne end ground connection.
4. the mould electric installation of anti-shake slot synchronization according to claim 1, is characterized in that, instituteStating shaping circuit comprises: the first electric capacity, the second electric capacity, the first resistance, the second resistance and operational amplifier;
The first end of described the first electric capacity connects the output of described testing circuit, second of described the first electric capacityEnd connects the first end of the second electric capacity, and the second end of the second electric capacity connects the positive input of described operational amplifierEnd;
One end of described the first resistance connects the normal phase input end of described operational amplifier, described the first resistanceOther end ground connection;
One end of described the second resistance connects the inverting input of described operational amplifier, described the second resistanceThe other end connects the second end of described the first electric capacity;
The inverting input of the output concatenation operation amplifier of described operational amplifier.
5. the mould electric installation of anti-shake slot synchronization according to claim 4, is characterized in that, instituteStating shaping circuit also comprises: the 3rd electric capacity and the 4th electric capacity;
One end of described the 3rd electric capacity connects the working power end of described operational amplifier, described the 3rd electric capacityOther end ground connection;
One end of described the 4th electric capacity connects the working power end of described operational amplifier, described the 4th electric capacityOther end ground connection.
6. the mould electric installation of anti-shake slot synchronization according to claim 1, is characterized in that, instituteStating hysteresis comparison circuit comprises: the 3rd resistance, the 4th resistance, the 5th resistance and hysteresis loop comparator;
One end of described the 4th resistance connects the output of described shaping circuit, the other end of described the 4th resistanceConnect the normal phase input end of described hysteresis loop comparator;
The normal phase input end of described hysteresis loop comparator is by described the 5th resistance eutral grounding;
The output of described hysteresis loop comparator connects the positive of described hysteresis loop comparator by described the 3rd resistanceInput;
The inverting input of described hysteresis loop comparator connects the working power of hysteresis loop comparator by adjustable resistanceEnd.
7. the mould electric installation of anti-shake slot synchronization according to claim 6, is characterized in that, instituteStating hysteresis comparison circuit also comprises: the 5th electric capacity and the 6th electric capacity;
One end of described the 5th electric capacity connects the working power end of described hysteresis loop comparator, described the 5th electric capacityOther end ground connection;
One end of described the 6th electric capacity connects the working power end of described hysteresis loop comparator, described the 6th electric capacityOther end ground connection.
8. the mould electric installation of anti-shake slot synchronization according to claim 6, is characterized in that, instituteState setting threshold value and comprise threshold ones and wealthy family's limit value;
Described threshold ones is 0.05V, and described wealthy family limit value is 0.85V.
9. the mould electric installation of anti-shake slot synchronization according to claim 6, is characterized in that, instituteStating the 3rd resistance is 60 kilohms;
Described the 4th resistance is 15 kilohms;
Described the 5th resistance is 90 kilohms.
10. the mould electric installation of anti-shake slot synchronization according to claim 1, is characterized in that, instituteState coupling circuit and comprise coupling capacitance;
One end of described coupling capacitance connects described radio frequency path, described in the other end of described coupling capacitance connectsThe input of testing circuit.
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| CN103795395A (en) | 2014-05-14 |
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