CN103794732A - Bond pad structure and manufacturing method thereof - Google Patents
Bond pad structure and manufacturing method thereof Download PDFInfo
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- CN103794732A CN103794732A CN201210435335.7A CN201210435335A CN103794732A CN 103794732 A CN103794732 A CN 103794732A CN 201210435335 A CN201210435335 A CN 201210435335A CN 103794732 A CN103794732 A CN 103794732A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
Abstract
The invention discloses a bond pad structure and a manufacturing method thereof. The bond pad structure includes: polysilicon layers arranged on a substrate in a strip shape in parallel; and first metal layers located on the polycilicon layers and second metal layers located on the first metal layers; and spacer layers arranged between the first metal layers and the second metal layers, wherein the spacer layers include a plurality of protruding blocks. The surfaces of the second metal layers are provided with a plurality of projections corresponding to the plurality of protruding blocks. The bond pad structure and the manufacturing method thereof improve a bond pad structure and realize a stronger acting force between the surface projections of the bond pad structure and bond lead-out points of an integrated circuit.
Description
Technical field
The present invention relates to the manufacture method of a kind of semiconductor pads structure and this semiconductor pads structure, relate in particular to a kind of bond pad structure and manufacture method thereof of Organic Light Emitting Diode.
Background technology
Along with the development of electronic product, semiconductor technology has been widely used in the manufacture of memory, central processing unit (CPU), liquid crystal display (LCD), light-emitting diode (LED), Organic Light Emitting Diode (OLED), laser diode and other elements or chipset.In order to reach high integration and high-speed object, the size of semiconductor integrated circuit must constantly be dwindled.Propose various materials and technology and reached above-mentioned high integration and high-speed object, and overcome manufacture related to this and hinder.In order to reduce crystallite dimension, can below formed active, functional element or circuit upper area form pad (PAD).
Pad is the metal pins region on chip surface, contacts with the understructure that has formed actual chips in substrate.Thereafter, described metal pins region can contact with outside line, thereby the circuit of chip can electrically contact with external circuit.
Current, bond pad structure of the prior art as shown in Figure 1.
Referring to Fig. 1, bond pad structure of the prior art comprises substrate 101, buffering area 102, the first metal layer 103, wall 104 and the second metal level 105.Wherein, described buffering area 102, the first metal layer 103, wall 104 and the second metal level 105 are formed on described substrate 101 successively.
But there is following various problems in above-mentioned prior art bond pad structure in the time of application:
(1) integrated circuit and flexible circuit board (FPC) being carried out to often can cause off normal when module engages;
(2) in the time that bond pad structure and integrated circuit pad are carried out to stitching operation, pressing resistance is excessive;
(3) in the time that bond pad structure and integrated circuit pad are carried out to stitching operation, the thrust that the acts on integrated circuit specification that is above standard;
(4), in the time that bond pad structure and integrated circuit pad are carried out to stitching operation, the two pressing is inhomogeneous, it is bad to engage, engaging time is longer.
Summary of the invention
The technical issues that need to address of the present invention are by the manufacture method of a kind of improved bond pad structure and corresponding improved bond pad structure, solve one or more in above-mentioned problem.
For achieving the above object, the present invention is achieved through the following technical solutions:
A kind of bond pad structure, is characterized in that, comprises:
Be arranged at the polysilicon layer on substrate, described polysilicon layer is strip and is arranged in parallel;
Be positioned at the first metal layer and the second metal level on described polysilicon layer, and described the second metal level is positioned on described the first metal layer;
Wall between described the first metal layer and described the second metal level, described wall comprises multiple casting lug thereons;
Wherein, described the second layer on surface of metal has the multiple projections corresponding with described multiple casting lug thereons.
Further, described the first metal and described the second metal are metals of the same race.
Further, described bond pad structure also comprises the resilient coating between described polysilicon layer and described substrate.
Further, described resilient coating is made up of at least one in following material: silicon nitride, silicon dioxide.
Further, described bond pad structure also comprises the gate insulator between described polysilicon layer and described the first metal layer.
Further, the thickness of described the first metal layer is
Further, the thickness of described the second metal level is
Further, the thickness of described wall is
Further, described wall is made up of silicon nitride.
Further, described casting lug thereon is terrace with edge.
Further, the coning angle of described terrace with edge is more than or equal to 45 degree and is less than or equal to 80 degree.
Accordingly, the invention allows for a kind of manufacture method of bond pad structure, described manufacture method comprises the following steps successively:
On substrate, form polysilicon layer, to described polysilicon layer expose, development, etching, to make described polysilicon layer form the strip being arranged in parallel;
On described polysilicon layer, form the first metal layer;
On described the first metal layer, form wall by photoetching process, described wall comprises multiple casting lug thereons consistent with the strip width of described polysilicon layer;
On described wall and the first metal layer, form the second metal level, described the second layer on surface of metal presents the multiple projections corresponding with described multiple casting lug thereons.
Further, described the first metal and described the second metal are metals of the same race.
Further, forming before described polysilicon layer, be also included in and on substrate, form resilient coating.
Further, described resilient coating is made up of at least one in following material: silicon nitride, silicon dioxide.
Further, after forming described polysilicon layer, be also included on described polysilicon layer and form gate insulator.
Further, the thickness of described the first metal layer is
Further, the thickness of described the second metal level is
Further, the thickness of described wall is
Further, described wall is made up of silicon nitride.
Further, described casting lug thereon is terrace with edge.
Further, the coning angle of stating terrace with edge is more than or equal to 45 degree and is less than or equal to 80 degree.
The bond pad structure that the present invention proposes has following features:
(1) compared with the bond pad structure of prior art, both do not increase rete, do not changed material yet, but utilized existing technique in forming the each structure of pixel region, the pad structure that forms periphery, viewing area, does not need extra processing step to form separately pad structure;
(2) by normal polysilicon layer, the separator using in the bond pad structure of prior art carried out to salient point etching, that is to say, by polysilicon layer, separator being etched into salient point to raise the position that engages leading point, rat and the integrated circuit of having realized bond pad structure engage the stronger active force between leading point.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of bond pad structure of the prior art;
Fig. 2 is according to the structural representation of a kind of bond pad structure of first embodiment of the invention;
Fig. 3 a-3f is the manufacture schematic diagram according to each layer of a kind of bond pad structure of the present invention;
Fig. 4 is according to the structural representation of a kind of bond pad structure of second embodiment of the invention;
Fig. 5 is according to the structural representation of a kind of bond pad structure of third embodiment of the invention;
Fig. 6 is according to the flow chart of the manufacture process of a kind of bond pad structure of the present invention.
The technical characterictic that Reference numeral in figure refers to is respectively:
101, substrate; 102, buffering area; 103, the first metal layer; 104, wall; 105, the second metal level;
201, substrate; 203, polysilicon layer; 204, the first metal layer; 205, wall casting lug thereon; 206, the second metal level; 207, projection;
301, substrate; 303, polysilicon layer; 304, the first metal layer; 305, wall casting lug thereon; 306, the second metal level; 307, projection;
401, substrate; 402, resilient coating; 403, polysilicon layer; 404, the first metal layer; 405, wall casting lug thereon; 406, the second metal level; 407, projection;
501, substrate; 503, polysilicon layer; 504, the first metal layer; 505, wall casting lug thereon; 506, the second metal level; 507, projection; 508, gate insulator.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, in accompanying drawing, only show part related to the present invention but not entire infrastructure.
Figure 2 illustrates the first embodiment of the present invention.
Fig. 2 is according to the structural representation of a kind of bond pad structure 200 of first embodiment of the invention.As shown in Figure 2, the bond pad structure 200 described in the present embodiment comprises: substrate 201, polysilicon layer 203, the first metal layer 204, the second metal level 206 and walls.Wherein, described polysilicon layer 203 is strip and is arranged in parallel, and is arranged on substrate 201; The first metal layer 204 and the second metal level 206 are positioned on described polysilicon layer 203, and described the second metal level 206 is positioned on described the first metal layer 204; Wall is between described the first metal layer 204 and described the second metal level 206, and described wall comprises the consistent casting lug thereon 205 of strip width of multiple and described polysilicon layer 203; Described the second metal level 206 surfaces have corresponding with described multiple casting lug thereons 205 multiple protruding 207.
As shown in Figure 2, according to the first embodiment of the present invention, described the first metal layer 204 and the second metal level 206 are formed on described polysilicon layer 203 tops.Described the first metal layer 204 and the second metal level 206 can comprise aluminium, thereby also can be called aluminium lamination, but, above-mentioned the first metal layer 204 and the second metal level 206 also can be formed or be included other materials by other materials, as the alloy of copper, silver, gold, nickel, tungsten and above-mentioned other materials.In the present embodiment, the thickness of described the first metal layer 204 is preferably
and the thickness of described the second metal level 206 is preferably
but, it is evident that, described the first metal layer 204 and the second metal level 206 also can need to take other thickness according to technique or function.
In the first embodiment, described wall is made up of silicon nitride and its thickness is preferably
but, needing statement, described wall also can need to take other thickness and material, for example material selection silica according to technique or function.
In the first embodiment, each casting lug thereon 205 of described wall can be made because of different process the various shapes such as cuboid, square, cylinder.
Preferably, described casting lug thereon is terrace with edge shape, and further preferred, and the coning angle (taper angle) of described terrace with edge is more than or equal to 45 degree and is less than or equal to 80 degree.
Preferably, described the first metal and described the second metal are metals of the same race, and for example, described the first metal layer 204 and the second metal level 206 are all to be formed by albronze (AlCu).That is to say, described the first metal layer 204 and the second metal level 206 are formed by metal material of the same race, and the benefit of doing is like this to reduce material selection complexity, has also simplified technique.Certainly, described the first metal and the second metal also can be made up of metal not of the same race as required.
Fig. 6 shows the manufacture process of a kind of bond pad structure provided by the invention, and Fig. 3 a-3f shows the manufacture of each layer of described bond pad structure.Referring to Fig. 6 and Fig. 3 a-3f, above-mentioned bond pad structure manufacture method comprises the following steps:
The first step: form polysilicon layer on substrate, as shown in the step 601 of Fig. 6.
Referring to Fig. 3 a-3b, Fig. 3 a is the schematic top plan view of substrate and the polysilicon layer of bond pad structure in the present embodiment, and Fig. 3 b is substrate in Fig. 3 a and the polysilicon layer generalized section along A-A' line.First, on substrate 301, deposit one deck polysilicon; Then, by photoetching process to described polysilicon layer 303 expose, development, etching operation, to make described polysilicon layer 303 form the strip being arranged in parallel, as shown in Figure 3 a and Figure 3 b shows.The quantity of the strip shape body being arranged in parallel etching can be determined according to the size of this technique or actual engagement pad structure.
Second step: form the first metal layer on described polysilicon layer, as shown in the step 602 of Fig. 6.
Referring to Fig. 3 c, on described polysilicon layer 303, form the first metal layer 304 by kinds of processes known in the art or process combination.Described various techniques include but not limited to sputter, plating, physical vapour deposition (PVD) or evaporation process, and the concrete steps of these techniques are well known to those skilled in the art, do not repeat them here.The thickness of the first metal layer 304 forming is preferably
but, needing statement, described the first metal layer 304 also can need to take other thickness according to technique or function.
The 3rd step: form wall on described the first metal layer, as shown in the step 603 of Fig. 6.
Referring to Fig. 3 d-3e, Fig. 3 d is the schematic top plan view of substrate, polysilicon layer, the first metal layer and the wall of bond pad structure in the present embodiment, and Fig. 3 e is the each layer of generalized section along A-A' line in Fig. 3 a.First, on the first metal layer, cover one deck material spacer layer.Described material spacer layer can be silicon nitride.Then, by photoetching process, to this interlayer interlayer material expose, development, etching, be finally made into the casting lug thereon array that comprises multiple casting lug thereons 305, as shown in Fig. 3 d and Fig. 3 e.Wherein, described casting lug thereon 305 is consistent with the strip width of described polysilicon layer 303.The thickness of the wall forming is preferably
but, needing statement, described wall also can need to take other thickness or material, for example material selection silica according to technique or function.
The 4th step: form the second metal level on described wall and the first metal layer, as shown in the step 604 of Fig. 6.
Further, referring to Fig. 3 f, on described wall and the first metal layer, be conformally formed the second metal level 306 by kinds of processes known in the art or process combination.Described various techniques include but not limited to sputter, plating, physical vapour deposition (PVD) or evaporation process, and the concrete steps of these techniques are well known to those skilled in the art, do not repeat them here.Because described the second metal level 306 is to be conformally formed on described wall, so the surface of described the second metal level 306 will present with described multiple casting lug thereons 305 of described wall in position, shape and size all corresponding multiple protruding 307.
According to the first embodiment of the present invention, the thickness of the second metal level 306 forming is preferably
but, needing statement, described the second metal level 306 also can need to take other thickness according to technique or function.
Preferably, the first metal layer 304 forming and the second metal level 306 are made up of metal material of the same race, and the benefit of doing is like this to reduce material selection complexity, also simplified manufacture craft, certainly,, for specific needs, also can be formed by different metal.
Preferably, described casting lug thereon 305 is terrace with edge shape, and further preferred, and the coning angle (taper angle) of described terrace with edge is more than or equal to 45 degree and is less than or equal to 80 degree.
So far, completed the manufacture according to a kind of bond pad structure of the present invention.
Fig. 4 shows the second embodiment of the present invention.
Fig. 4 is according to the structural representation of a kind of bond pad structure of second embodiment of the invention.As shown in Figure 4, the bond pad structure 400 described in the present embodiment comprises: substrate 401, resilient coating 402, polysilicon layer 403, the first metal layer 404, the second metal level 406 and walls.Wherein, described polysilicon layer 403 is strip and is arranged in parallel, and is arranged on substrate 401; The first metal layer 404 and the second metal level 406 are positioned on described polysilicon layer 403, and described the second metal level 406 is positioned on described the first metal layer 404; Wall is between described the first metal layer 404 and described the second metal level 406, and described wall comprises the consistent casting lug thereon 405 of strip width of multiple and described polysilicon layer 403; Described the second metal level 406 surfaces have corresponding with described multiple casting lug thereons 405 multiple protruding 407.
In a second embodiment, the substrate 401 in above-mentioned bond pad structure 400, polysilicon layer 403, the first metal layer 404, the second metal level 406 and wall are identical with corresponding each structure in the first embodiment, do not repeat them here.
As can be seen from Figure 4, different from the first embodiment, bond pad structure 400 in a second embodiment also comprises the resilient coating 402 being for example arranged at, between described polysilicon layer 403 and described substrate (adopting glass material) 401.Described resilient coating 402 is made up of at least one in following material: silicon nitride, silicon dioxide; Or the sandwich construction that described resilient coating 402 is formed by above-mentioned material forms.Wherein, the thickness of described resilient coating 402 can be looked the specification requirement of bond pad structure and determine.
In a second embodiment, the resilient coating of increase can stop the pollutant from substrate, and can improve the quality of polysilicon layer by the adjustment of buffer layer thickness or deposition conditions.
The manufacture process of the bond pad structure of this embodiment is as follows:
The first step: form resilient coating on substrate.
Described resilient coating 402 is made up of at least one in following material: silicon nitride, silicon dioxide; Or the sandwich construction that described resilient coating 402 is formed by above-mentioned material forms.Wherein, the thickness of described resilient coating 402 can be looked the specification requirement of bond pad structure and determine.
Second step: form polysilicon layer on resilient coating.
First, on described resilient coating 402, deposit one deck polysilicon; Then, by photoetching process to described polysilicon layer 403 expose, development, etching operation, to make described polysilicon layer 403 form the strip being arranged in parallel.The quantity of the strip shape body being arranged in parallel etching can be determined according to the size of this technique or actual engagement pad structure.
The 3rd step: form the first metal layer on described polysilicon layer.
On described polysilicon layer 403, form the first metal layer 404 by kinds of processes known in the art or process combination.Described various techniques include but not limited to sputter, plating, physical vapour deposition (PVD) or evaporation process, and the concrete steps of these techniques are well known to those skilled in the art, do not repeat them here.The thickness of the first metal layer 404 forming is preferably
but, needing statement, described the first metal layer 404 also can need to take other thickness according to technique or function.
The 4th step: form wall on described the first metal layer.
First, on the first metal layer 404, cover one deck material spacer layer.Described material spacer layer can be silicon nitride.Then, by photoetching process, to this interlayer interlayer material expose, development, etching, be finally made into the casting lug thereon array that comprises multiple casting lug thereons 405.Wherein, described casting lug thereon 405 is consistent with the strip width of described polysilicon layer 403.The thickness of the wall forming is preferably
but, needing statement, described wall also can need to take other thickness or material, for example material selection silica according to technique or function.
The 5th step: form the second metal level on described wall and the first metal layer.
On described wall and the first metal layer 404, be conformally formed the second metal level 406 by kinds of processes known in the art or process combination.Described various techniques include but not limited to sputter, plating, physical vapour deposition (PVD) or evaporation process, and the concrete steps of these techniques are well known to those skilled in the art, do not repeat them here.Because described the second metal level 406 is to be conformally formed on described wall, so the surface of described the second metal level 406 will present with multiple casting lug thereons 405 of described wall in position, shape and size all corresponding multiple protruding 407.
So far, completed the manufacture according to another kind of bond pad structure of the present invention.
Fig. 5 shows the third embodiment of the present invention.
Fig. 5 is according to the structural representation of a kind of bond pad structure 500 of third embodiment of the invention.As shown in Figure 5, the bond pad structure 500 described in the present embodiment comprises: substrate 501, polysilicon layer 503, gate insulator 508, the first metal layer 504, the second metal level 506 and walls.Wherein, described polysilicon layer 503 is strip and is arranged in parallel, and is arranged on substrate 501; The first metal layer 504 and the second metal level 506 are positioned on described polysilicon layer 503, and described the second metal level 506 is positioned on described the first metal layer 504; Wall is between described the first metal layer 504 and described the second metal level 506, and described wall comprises the consistent casting lug thereon 505 of strip width of multiple and described polysilicon layer 503; Described the second metal level 506 surfaces have corresponding with described multiple casting lug thereons 505 multiple protruding 507.
In the 3rd embodiment, the substrate 501 of above-mentioned bond pad structure, polysilicon layer 503, the first metal layer 504, the second metal level 506 and wall are identical with corresponding each structure in the first embodiment, do not repeat them here.
As can be seen from Figure 5, different from the first embodiment, the bond pad structure 500 in the 3rd embodiment also comprises the gate insulator 508 being arranged between described polysilicon layer 503 and described the first metal layer 504.This gate insulator 508 can be formed by following material: silica, silicon nitride or aluminium oxide; Or the sandwich construction that this gate insulator 508 is formed by above-mentioned material forms.In the 3rd embodiment, the gate insulator 508 of increase is as insulator.
The manufacture process of the bond pad structure of this embodiment is as follows:
The first step: form polysilicon layer on substrate.
First, on substrate 501, deposit one deck polysilicon 503; Then, by photoetching process to described polysilicon layer 503 expose, development, etching operation, to make described polysilicon layer 503 form the strip being arranged in parallel.The quantity of the strip shape body being arranged in parallel etching can be determined according to the size of this technique or actual engagement pad structure.
Second step: form gate insulator on polysilicon layer.
This gate insulator 508 can be formed by following material: silica, silicon nitride or aluminium oxide; Or the sandwich construction that this gate insulator 508 is formed by above-mentioned material forms.In the present embodiment, the gate insulator 508 of increase can play insulating effect.
The 3rd step: form the first metal layer on described gate insulator.
On described gate insulator 508, form the first metal layer 504 by kinds of processes known in the art or process combination.Described various techniques include but not limited to sputter, plating, physical vapour deposition (PVD) or evaporation process, and the concrete steps of these techniques are well known to those skilled in the art, do not repeat them here.The thickness of the first metal layer 504 forming is preferably
but, needing statement, described the first metal layer 504 also can need to take other thickness according to technique or function.
The 4th step: form wall on described the first metal layer.
First, on the first metal layer 504, cover one deck material spacer layer.Described material spacer layer can be silicon nitride.Then, by photoetching process, to this interlayer interlayer material expose, development, etching, be finally made into the casting lug thereon array that comprises multiple casting lug thereons 505.Wherein, described casting lug thereon 505 is consistent with the strip width of described polysilicon layer 503.The thickness of the wall forming is preferably
but, needing statement, described wall also can need to take other thickness or material, for example material selection silica according to technique or function.
The 5th step: form the second metal level on described wall and the first metal layer.
On described wall and the first metal layer 504, be conformally formed the second metal level 506 by kinds of processes known in the art or process combination.Described various techniques include but not limited to sputter, plating, physical vapour deposition (PVD) or evaporation process, and the concrete steps of these techniques are well known to those skilled in the art, do not repeat them here.Because described the second metal level 506 is to be conformally formed on described wall, so the surface of described the second metal level 506 will present with described multiple casting lug thereons 505 of described wall in position, shape and size all corresponding multiple protruding 507.
So far, completed the manufacture according to another bond pad structure of the present invention.
Bond pad structure proposed by the invention, compared with the bond pad structure of prior art, can, in the situation that both not increasing rete, also not changing material, utilize existing process modification structure, has realized the object that strengthens the performance of bond pad structure.In addition, by normal polysilicon layer, the separator using in the bond pad structure of prior art carried out to salient point etching, that is to say, by polysilicon layer, separator being etched into salient point to raise the position that engages leading point, rat and integrated circuit that bond pad structure proposed by the invention has realized bond pad structure engage the stronger active force between leading point.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious variations, readjust and substitute and can not depart from protection scope of the present invention.Therefore, although the present invention is described in further detail by above embodiment, the present invention is not limited only to above embodiment, in the situation that not departing from the present invention's design, can also comprise more other equivalent embodiment, and scope of the present invention is determined by appended claim scope.
Claims (22)
1. a bond pad structure, is characterized in that, comprises:
Be arranged at the polysilicon layer on substrate, described polysilicon layer is strip and is arranged in parallel;
Be positioned at the first metal layer and the second metal level on described polysilicon layer, and described the second metal level is positioned on described the first metal layer;
Wall between described the first metal layer and described the second metal level, described wall comprises multiple casting lug thereons;
Wherein, described the second layer on surface of metal has the multiple projections corresponding with described multiple casting lug thereons.
2. bond pad structure according to claim 1, is characterized in that, described the first metal and described the second metal are metals of the same race.
3. bond pad structure according to claim 1, is characterized in that, described bond pad structure also comprises the resilient coating between described polysilicon layer and described substrate.
4. bond pad structure according to claim 3, is characterized in that, described resilient coating is made up of at least one in following material: silicon nitride, silicon dioxide.
5. bond pad structure according to claim 1, is characterized in that, also comprises the gate insulator between described polysilicon layer and described the first metal layer.
6. bond pad structure according to claim 1, is characterized in that, the thickness of described the first metal layer is
7. bond pad structure according to claim 1, is characterized in that, the thickness of described the second metal level is
8. bond pad structure according to claim 1, is characterized in that, the thickness of described wall is
9. bond pad structure according to claim 1, is characterized in that, described wall is made up of silicon nitride.
10. bond pad structure according to claim 1, is characterized in that, described casting lug thereon is terrace with edge.
11. bond pad structure according to claim 10, is characterized in that, the coning angle of described terrace with edge is more than or equal to 45 degree and is less than or equal to 80 degree.
The manufacture method of 12. 1 kinds of bond pad structure, it comprises the following steps successively:
On substrate, form polysilicon layer, to described polysilicon layer expose, development, etching, to make described polysilicon layer form the strip being arranged in parallel;
On described polysilicon layer, form the first metal layer;
On described the first metal layer, form wall by photoetching process, described wall comprises multiple casting lug thereons consistent with the strip width of described polysilicon layer;
On described wall and the first metal layer, form the second metal level, described the second layer on surface of metal presents the multiple projections corresponding with described multiple casting lug thereons.
13. manufacture methods according to claim 12, is characterized in that, described the first metal and described the second metal are metals of the same race.
14. manufacture methods according to claim 12, is characterized in that, are forming before described polysilicon layer, are also included in and on substrate, form resilient coating.
15. manufacture methods according to claim 14, is characterized in that, described resilient coating is made up of at least one in following material: silicon nitride, silicon dioxide.
16. manufacture methods according to claim 12, is characterized in that, after forming described polysilicon layer, are also included on described polysilicon layer and form gate insulator.
17. manufacture methods according to claim 12, is characterized in that, the thickness of described the first metal layer is
18. manufacture methods according to claim 12, is characterized in that, the thickness of described the second metal level is
19. manufacture methods according to claim 12, is characterized in that, the thickness of described wall is
20. manufacture methods according to claim 12, is characterized in that, described wall is made up of silicon nitride.
21. manufacture methods according to claim 12, is characterized in that, described casting lug thereon is terrace with edge.
22. manufacture methods according to claim 21, is characterized in that, the coning angle of described terrace with edge is more than or equal to 45 degree and is less than or equal to 80 degree.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002084732A2 (en) * | 2001-04-13 | 2002-10-24 | Koninklijke Philips Electronics N.V. | Method of manufacturing an electronic device |
| TW200516678A (en) * | 2003-11-06 | 2005-05-16 | Ind Tech Res Inst | Bonding structure with compliant bumps |
| CN1855459A (en) * | 2005-04-25 | 2006-11-01 | 中芯国际集成电路制造(上海)有限公司 | Planar pad design and production |
| CN101246865A (en) * | 2007-02-16 | 2008-08-20 | 南茂科技股份有限公司 | Packaging conductive structure and its manufacturing method |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002084732A2 (en) * | 2001-04-13 | 2002-10-24 | Koninklijke Philips Electronics N.V. | Method of manufacturing an electronic device |
| TW200516678A (en) * | 2003-11-06 | 2005-05-16 | Ind Tech Res Inst | Bonding structure with compliant bumps |
| CN1855459A (en) * | 2005-04-25 | 2006-11-01 | 中芯国际集成电路制造(上海)有限公司 | Planar pad design and production |
| CN101246865A (en) * | 2007-02-16 | 2008-08-20 | 南茂科技股份有限公司 | Packaging conductive structure and its manufacturing method |
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