CN103793332A - Data storage method and device based on memory, processor and electronic equipment - Google Patents
Data storage method and device based on memory, processor and electronic equipment Download PDFInfo
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Abstract
The application discloses a data storage method based on a memory and corresponding equipment. In the method, memory domains are respectively allocated to the DRAM and the PRAM; acquiring the address of a virtual space of data to be stored in a memory, and determining a virtual memory area to which the data belongs; and then storing the data into the free memory block in the memory domain corresponding to the virtual memory area. When the virtual address belongs to the virtual memory stack segment, distributing an idle memory block belonging to the DRAM memory domain; and when the virtual address belongs to the virtual memory code segment, the data segment or the shared segment, distributing the idle memory block belonging to the PRAM memory domain. According to the method and the device, data are stored according to the advantages and the disadvantages of the DRAM and the PRAM, the data with different read-write characteristics are stored to the corresponding storage space, the performance advantages of the PRAM and the DRAM in the read and write aspects are exerted, the power consumption of a memory system can be reduced, and the memory capacity is increased.
Description
Technical field
The present invention relates to field of computer, particularly relate to a kind of date storage method, device, processor and electronic equipment based on internal memory.
Background technology
DRAM(Dynamic Random Access Memory, dynamic RAM) be a kind of comparatively common Installed System Memory, for a long time, the task of computer system main memory is taken on by DRAM always.
But, inventor finds in the application's research process, DRAM has volatibility, need continuous charging brush to newly arrive and keep the data wherein stored, possesses the shortcoming that power consumption is high, therefore in current architectural framework, the memory system power consumption based on DRAM is occupied very high ratio in total system power consumption.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of date storage method, device, processor and electronic equipment based on internal memory, to solve in prior art, the memory system based on DRAM has the problem that power consumption is high, and specific embodiments is as follows:
Based on a date storage method for internal memory, be applied to electronic equipment, in described electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM, wherein, the described date storage method based on internal memory comprises:
Be respectively described DRAM and PRAM and set up corresponding management data structures, obtain the internal memory territory that belongs to described DRAM and PRAM;
In the time that needs are stored data, obtain the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determine the affiliated virtual memory region of data of described internal memory to be deposited;
According to the virtual memory region under the data of described internal memory to be deposited, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory corresponding with described virtual memory region.
Preferably,
In the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM;
In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
Preferably, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory corresponding with described virtual memory region, comprise:
According to the virtual memory region under the data of described internal memory to be deposited, it is the corresponding internal memory modifier of data configuration of described internal memory to be deposited;
Obtain the internal memory territory corresponding with described internal memory modifier, and while thering is the free memory block of enough storage spaces in described internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
Preferably, the internal memory territory of dividing as described PRAM is three, and the internal memory territory divided of described DRAM is while being one, described in obtain the internal memory territory corresponding with described internal memory modifier computing formula be:
zone=(GFP_ZONE_TABLE>>(bit*2))&((1<<2)-1)；
Wherein, GFP_ZONE_TABLE is the constant value of setting, the internal memory modifier that bit is described data to be stored, the internal memory Domain Index value in internal memory territory corresponding to data that zone is described internal memory to be deposited.
Preferably, when the internal memory territory of dividing in described PRAM is more than two, and internal memory territory corresponding to described internal memory modifier be the internal memory territory in described PRAM, when the free memory block in described internal memory territory does not have sufficient storage space, obtain behind the internal memory territory that described internal memory modifier is corresponding, also comprise:
51) according to internal memory Domain Index value, obtain the internal memory territory that priority is the highest, as current internal memory territory;
52) search the free memory block in described current internal memory territory, and the storage space that the judges described free memory block data that whether can store described internal memory to be deposited, if, the data of described internal memory to be deposited are stored in the free memory block in described current internal memory territory, if not, carry out next step;
53) if determine the data that the storage space of described free memory block can not be stored described internal memory to be deposited, judge and in described PRAM, whether have priority other internal memory territories inferior to described current internal memory territory, if exist, determine that other the highest internal memory territories of medium priority, internal memory territory are current internal memory territory, and return execution step 52) operation, if do not exist, finish this storage operation.
Preferably, when the internal memory territory of dividing in described DRAM is one, and internal memory territory corresponding to described internal memory modifier be the internal memory territory in described DRAM, when the free memory block in described internal memory territory does not have sufficient storage space, obtain behind the internal memory territory that described internal memory modifier is corresponding, also comprise:
Search the cold internal memory in the internal memory territory that obtains described DRAM;
Obtain the free memory block in the internal memory territory in described PRAM, and by described cold internal memory migration to the free memory block in described PRAM;
The data of described internal memory to be deposited are stored in the described DRAM after cold internal memory migration.
Accordingly, the invention also discloses a kind of data storage device based on internal memory, be applied to electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment, wherein, the described data storage device based on internal memory comprises:
Internal memory territory initialization module, sets up corresponding management data structures for being respectively described DRAM and PRAM, obtains the internal memory territory that belongs to described DRAM and PRAM;
Virtual memory region determination module, in the time that needs are stored data, obtains the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determines the affiliated virtual memory region of data of described internal memory to be deposited;
Data memory module, for according to the virtual memory region under the data of described internal memory to be deposited, is stored to the data of described internal memory to be deposited in the free memory block in the internal memory territory corresponding with described virtual memory region.
Preferably,
In the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM;
In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
Preferably, described data memory module comprises:
Internal memory modifier dispensing unit, for according to the virtual memory region under the data of described internal memory to be deposited, is the corresponding internal memory modifier of data configuration of described internal memory to be deposited;
The first storage unit, for obtaining the internal memory territory corresponding with described internal memory modifier, and while thering is the free memory block of enough storage spaces in described internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
Preferably, the internal memory territory of dividing as described PRAM is three, and the internal memory territory divided of described DRAM is while being one, and in described the first storage unit, the computing formula of obtaining the internal memory territory corresponding with described internal memory modifier is:
zone=(GFP_ZONE_TABLE>>(bit*2))&((1<<2)-1)；
Wherein, GFP_ZONE_TABLE is the constant value of setting, the internal memory modifier that bit is described data to be stored, the internal memory Domain Index value in internal memory territory corresponding to data that zone is described internal memory to be deposited.
Preferably, when the internal memory territory of dividing in described PRAM is more than two, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described PRAM, and when the free memory block in described internal memory territory does not have sufficient storage space, described data memory module also comprises:
The first acquiring unit, for according to internal memory Domain Index value, obtains the internal memory territory that priority is the highest, as current internal memory territory;
The first judging unit, for searching the free memory block in described current internal memory territory, and the storage space that the judges described free memory block data that whether can store described internal memory to be deposited, if, the data of described internal memory to be deposited are stored in the free memory block in described current internal memory territory, if not, carry out the operation of second acquisition unit;
Second acquisition unit, if can not store the data of described internal memory to be deposited for the storage space of definite described free memory block time, judge and in described PRAM, whether have priority other internal memory territories inferior to described current internal memory territory, if exist, determine that other the highest internal memory territories of medium priority, internal memory territory are current internal memory territory, and return to the operation of carrying out the first judging unit, if do not exist, finish this storage operation.
Preferably, when the internal memory territory of dividing in described DRAM is one, and internal memory territory corresponding to described internal memory modifier be the internal memory territory in described DRAM, and when the free memory block in described internal memory territory does not have sufficient storage space, described data memory module also comprises:
Search unit, for searching the cold internal memory in the internal memory territory that obtains described DRAM;
Migration units, for obtaining the free memory block in the internal memory territory of described PRAM, and by described cold internal memory migration to the free memory block in described PRAM;
The second storage unit, for being stored to the data of described internal memory to be deposited described DRAM after cold internal memory migration.
Accordingly, the invention also discloses a kind of processor, be applied to electronic equipment,
In described electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM;
In described processor, be integrated with the data storage device based on internal memory as above.
Accordingly, the invention also discloses a kind of electronic equipment,
In described electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM;
In described electronic equipment, be provided with processor as above.
The date storage method based on internal memory of the application's application, be applied to electronic equipment, and in electronic equipment, be provided with DRAM and PRAM simultaneously, compared with DRAM, PRAM has advantages of that quiescent dissipation is low, storage density large, it is low in energy consumption to read, but writing time delay and writing power consumption of PRAM is larger than DRAM, and PRAM to write the life-span limited.The disclosed method of the application, carry out the storage of data according to the relative merits of described DRAM and PRAM, by the virtual memory region under the data of internal memory to be deposited, can obtain the character of the data of described internal memory to be deposited, the data with different read write attributes are stored in corresponding storage space, thereby can bring into play PRAM and the DRAM performance advantage aspect reading and writing, both can reduce quiescent dissipation, the increase memory size of memory system, can reduce again the dynamic power consumption of memory system.
Further, in prior art, along with reducing of integrated circuit critical size, DRAM memory device has run into great difficulty in the development aspect dimensional contraction and storage density, thereby brings certain restriction to the development of memory system.The disclosed date storage method based on internal memory of the application, in electronic equipment, be provided with DRAM and PRAM, the memory space that has expanded electronic equipment, in memory device dimensional contraction simultaneously, still can keep certain storage density, remove the restriction of the development of internal deposit system.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the workflow schematic diagram of the disclosed a kind of date storage method based on internal memory of the embodiment of the present invention;
Fig. 2 is in the disclosed a kind of date storage method based on internal memory of the embodiment of the present invention, the algorithm design schematic diagram of address, Virtual Space and physical space address;
Fig. 3 is the workflow schematic diagram of disclosed another date storage method based on internal memory of the embodiment of the present invention;
Fig. 4 is the workflow schematic diagram of disclosed another date storage method based on internal memory of the embodiment of the present invention;
The structural representation of the disclosed a kind of data storage device based on internal memory of Fig. 5 embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
In order to solve in prior art, the memory system based on DRAM has the problem that power consumption is high, and the application discloses a kind of date storage method, device and electronic equipment based on internal memory, and its implementation process is referring to following examples.
Embodiment mono-
The application discloses a kind of date storage method based on internal memory, be used for solving prior art, memory system based on DRAM has the problem that power consumption is high, and the method is applied to electronic equipment, is provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment.
Workflow schematic diagram shown in Figure 1, the described date storage method based on internal memory comprises:
Step S11, be respectively described DRAM and PRAM sets up corresponding management data structures, obtain the internal memory territory that belongs to described DRAM and PRAM.
Step S12, in the time that needs are stored data, obtain the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determine the virtual memory region under the data of described internal memory to be deposited.
Virtual memory designs in order to prevent physical memory deficiency.In the time that needs are stored data, the data of internal memory to be deposited are shone upon mutually with the address of Virtual Space, and the address of Virtual Space is mapped to actual physical page frame, finally again the data transmission in this physical address is carried out to actual storage operation to hardware memory.
For example, in Linux process, Virtual Space is divided into five linear virtual memory regions, and described virtual memory region comprises: code segment, data segment, heap section, stack segment and shared segment, its access module is as shown in table 1.
The access module of table 1 virtual memory region
| Memory field | Stored contents | Read operation | Write operation |
| Code segment | The binary code of current operation | Frequently | Without operation |
| Data segment | Storage global variable and static variable | Frequently | Not frequent |
| Heap section | The data of Dynamic Generation | Frequently | Frequently |
| Stack segment | Local variable and realize function call | Frequently | Frequently |
| Shared segment | Parameter list, command line parameter, environmental variance | More frequent | Not frequent |
Because time delay and the power consumption of PRAM write operation will, higher than the time delay of read operation and power consumption, if PRAM page frame frequently carries out write operation, will increase dynamic power consumption and the time delay of main memory so.In addition, because PRAM write operation number of times is limited, too much write operation certainly will will reduce the serviceable life of main memory, therefore, the application is in the time of storage data, the principle of following is: be frequently written as main page frame and be assigned to dram space, can bring into play like this DRAM write low in energy consumption, to write time delay little and without the advantage of age limit; Frequently reading is that main page frame is assigned to PRAM space, can bring into play like this PRAM and read advantage low in energy consumption.Therefore, the symmetrical access module of read-write for data acquisition that stack segment is corresponding, is applicable to being stored in dram space, and code segment, data segment, shared segment data acquisition, with reading to write few access module, are applicable to being stored in PRAM space more.
In the time having data to be stored to internal memory, the respective page in program meeting accesses virtual space, if while not also being mapped to the page frame of physical space, processor will produce a page fault.Address, Virtual Space shown in Figure 2 and the algorithm design schematic diagram of physical space address, when producing when page fault, descriptor memory symbol parameter m m_struct has described the information that produces virtual memory corresponding to the process of page fault.For example, the virtual memory address that code segment starts and finishes is respectively by start_code and end_code mark, and wherein, described start_code and end_code mark are descriptor memory symbol parameter.In addition, program can produce corresponding parameter address, produces the address, Virtual Space of page fault for describing current process.In the time that processor produces the page fault of distribution according to need, page exchange or copy-on-write, by relatively producing the start-stop address of each memory field in the address, Virtual Space of page fault and descriptor memory symbol, just can judge this address, Virtual Space and belong to stack segment or other section, and be its mark correspondence memory modifier.
Step S13, according to the virtual memory region under the data of described internal memory to be deposited, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory corresponding with described virtual memory region.
Wherein, in the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM;
In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
The disclosed date storage method based on internal memory of the application, is applied to electronic equipment, is provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment.In the method, be first respectively described DRAM and PRAM and set up corresponding management data structures, to obtain the internal memory territory of adhering to separately with DRAM and PRAM; In the time that needs are stored data, obtain the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determine the affiliated virtual memory region of data of described internal memory to be deposited; Finally, by described data to be deposited, be stored in the free memory block in the internal memory territory corresponding with described virtual memory region.
The date storage method based on internal memory of the application's application, be applied to electronic equipment, and in electronic equipment, be provided with DRAM and PRAM simultaneously, compared with DRAM, PRAM has advantages of that quiescent dissipation is low, storage density large, it is low in energy consumption to read, but writing time delay and writing power consumption of PRAM is larger than DRAM, and PRAM to write the life-span limited.The disclosed method of the application, carry out the storage of data according to the relative merits of described DRAM and PRAM, by the virtual memory region under the data of internal memory to be deposited, can obtain the character of the data of described internal memory to be deposited, the data with different read write attributes are stored in corresponding storage space, thereby can bring into play PRAM and the DRAM performance advantage aspect reading and writing, both can reduce quiescent dissipation, the increase memory size of memory system, can reduce again the dynamic power consumption of memory system.
Further, the data by described internal memory to be deposited described in step S13 are stored in the free memory block in the internal memory territory corresponding with described virtual memory region, generally include:
First, according to the virtual memory region under the data of described internal memory to be deposited, be, the corresponding internal memory modifier of data configuration of described internal memory to be deposited;
Then, obtain the internal memory territory corresponding with described internal memory modifier, and while thering is the free memory block of enough storage spaces in described internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
In the time that needs are stored data, conventionally according to affiliated virtual memory region, for the corresponding internal memory modifier of data configuration of described internal memory to be deposited, to determine corresponding internal memory territory according to described internal memory modifier.
In the time of practical application, the internal memory territory of conventionally described PRAM being divided is three, and the internal memory territory that described DRAM divides is one.Wherein, internal memory territory in described PRAM can be called to DMA, NORMAL, HIGHMEM, internal memory territory in described DRAM is called to DRAM, and, distribute corresponding internal memory Domain Index value by enumeration structure for each internal memory territory, for example, the internal memory Domain Index value of internal memory territory DMA is 0, and the value that can be characterized by ZONE_DMA is 0; Accordingly, internal memory territory NORMAL, the internal memory Domain Index value of ZONE_NORMAL is 1; Internal memory territory HIGHMEM, the internal memory Domain Index value of ZONE_HIGHMEM is 2; Internal memory territory DRAM, the internal memory Domain Index value of ZONE_DRAM is 3.MAX_NR_ZONES represents the sum in internal memory territory, and its value is 4, represents that the quantity in the internal memory territory of distributing is 4.
Owing to can't processor cores being had any impact in the situation that internal memory territory DRAM and HIGHMEM use up, therefore all belong to high memory and distribute cost minimum; Internal memory territory NORMAL is for storing the necessary data structure of kernel, and it distributes cost moderate; Distribute the highest internal memory territory DMA of cost to be specifically designed to ISA equipment and carry out data transmission.Therefore, the first-selected point corresponding internal memory of the timing territory difference of dissimilar data, and also dissimilar data belong to different virtual memory regions.Conventionally according to above-mentioned disclosed method, by the virtual memory region under the data of described internal memory to be deposited, for the corresponding internal memory modifier of data configuration of described internal memory to be deposited, then obtain the internal memory territory corresponding with described internal memory modifier, and while there is sufficient storage space in this internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
When distributing three internal memory territories for PRAM, while distributing an internal memory territory for DRAM, conventionally the PRAM page frame that internal memory territory DMA comprises 0-16MB, the PRAM page frame that internal memory territory NORMAL comprises 16-896MB, the page frame that internal memory territory HIGHMEM has comprised all residue PRAM, be generally 896MB-1.6GB, internal memory territory DRAM has comprised all DRAM page frames, is generally 1.6GB-2GB.Certainly, also can adopt other page frame allocation scheme, distribute corresponding page frame for each internal memory territory, the application does not limit this.
The internal memory territory of dividing as described PRAM is three, and the internal memory territory divided of described DRAM is while being one, and according to described internal memory territory modifier, the computing formula of obtaining the internal memory territory corresponding with described internal memory modifier is:
zone=(GFP_ZONE_TABLE>>(bit*2))&((1<<2)-1)；
Wherein, GFP_ZONE_TABLE is the constant value of setting, the internal memory modifier that bit is described data to be stored, the internal memory Domain Index value in internal memory territory corresponding to data that zone is described internal memory to be deposited.Described GFP_ZONE_TABLE represents take Bit String (binary value is as 1100100001).
Table 2 discloses the corresponding relation in internal memory modifier and internal memory territory.
The corresponding relation in table 2 internal memory modifier and internal memory territory
In the time determining corresponding internal memory territory, first can determine the highest internal memory territory that will scan by computing formula.With reference to table 2, can, by the corresponding relation of internal memory modifier and bit, obtain corresponding bit value, and by its substitution formula, determine corresponding internal memory territory.
For example, the data optimization of stack segment is stored in DRAM, the internal memory modifier that stack segment is corresponding is GFP_DRAM, its corresponding bit is 0x04u (0100), distributing the 3rd bit flag of mask is 1, bit=0100, by above-mentioned its substitution formula, zone=(1100100001>> (0100*2)) & ((1<<2)-1)=3, because the internal memory Domain Index value of internal memory territory DRAM is 3, determine that its corresponding internal memory territory is DRAM.In the time thering is the free memory block of adequate space in described internal memory territory DRAM, the data of internal memory to be deposited are stored in described internal memory territory DRAM.
In addition, in above table, " BAD " shows that this internal memory modifier is not corresponding with any internal memory territory, belongs to that a kind of abnormal conditions are follow-up can not distribute corresponding free memory block for it.
Three internal memory territory DMA in described PRAM, NORMAL, HIGHMEM, have different priority, and the priority in the internal memory territory that wherein internal memory Domain Index value is the highest is the highest,
In step S13, according to described internal memory modifier, obtain behind its corresponding internal memory territory, the data of internal memory to be deposited can be stored in corresponding internal memory territory.When according to internal memory modifier, determine that first the data of described internal memory to be deposited distribute behind corresponding internal memory territory, can judge whether this internal memory territory has enough storage spaces, if had, described data are stored in the internal memory territory that internal memory modifier is corresponding, if do not had, PRAM and DRAM are adopted to different measures, realize the storage to data.
When the internal memory territory of dividing in described PRAM is more than two, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described PRAM, when free memory block in described internal memory territory does not have sufficient storage space, obtain behind the internal memory territory that described internal memory modifier is corresponding, workflow schematic diagram shown in Figure 3, also comprises:
Step S21, according to internal memory Domain Index value, obtain the internal memory territory that priority is the highest, as current internal memory territory.
Conventionally PRAM can be divided into three internal memory territories, and described three internal memory territories are called to DMA, NORMAL, HIGHMEM, and distribute corresponding internal memory Domain Index value by enumeration structure for each internal memory territory, wherein the internal memory Domain Index value of internal memory territory DMA is 0, the internal memory Domain Index value of internal memory territory NORMAL is 1, and the internal memory Domain Index value of internal memory territory HIGHMEM is 2.And in PRAM, internal memory Domain Index value is larger, the priority in internal memory territory is higher.
Step S22, search the free memory block in described current internal memory territory, and judge the data whether storage space of described free memory block can store described internal memory to be deposited, if so, perform step the operation of S25, if not, perform step the operation of S23;
If step S23 is according to judged result, determine that the storage space of described free memory block can not store the data of described internal memory to be deposited, judge and in described PRAM, whether have priority other internal memory territories inferior to described current internal memory territory, if exist, perform step the operation of S24, if do not exist, perform step the operation of S26;
Step S24, when according to judged result, determine in described PRAM and have priority other internal memory territories inferior to described current internal memory territory, determine that in described other internal memory territories, the internal memory territory that priority is the highest is current internal memory territory, and return to the operation of execution step S22;
If step S25 according to the judged result of step S22, determines when the storage space of described free memory block can be stored the data of described internal memory to be deposited, the data of described internal memory to be deposited are stored in the free memory block in described current internal memory territory;
If step S26 according to the judged result of step S23, determines while not having priority inferior to other internal memory territories in described current internal memory territory in described PRAM, finishes this storage operation.
When the internal memory territory corresponding with internal memory modifier is the internal memory territory in PRAM, and while not thering is sufficient storage space in this internal memory territory, according to step S21 to the disclosed scheme of step S26, determine the priority in each internal memory territory in PRAM according to internal memory Domain Index value, and judge in turn in each internal memory territory whether there is sufficient storage space according to priority, and according to judged result, determine while thering is sufficient storage space in a certain internal memory territory, the data of internal memory to be deposited are stored in this internal memory territory, if each internal memory territory does not all have enough storage spaces in PRAM, finish this storage operation, thereby the internal memory territory of distributing in first-selection is the internal memory territory in PRAM, and while thering is no sufficient storage space in the first-selected internal memory territory of distributing, carry out the storage of data according to the priority ranking in internal memory territory.
In addition, when the internal memory territory of dividing in described DRAM is one, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described DRAM, when free memory block in described internal memory territory does not have sufficient storage space, obtain behind the internal memory territory that described internal memory modifier is corresponding, workflow schematic diagram shown in Figure 4, also comprises:
Step S31, search the cold internal memory in the internal memory territory that obtains described DRAM;
Step S32, obtain the free memory block in the internal memory territory in described PRAM, and by described cold internal memory migration to the free memory block in described PRAM;
In the time carrying out the migration of cold internal memory, conventionally according to the priority in each internal memory territory in described PRAM, judge successively whether each internal memory territory has sufficient storage space, for example, according to internal memory Domain Index value, first judge in the HIGHMEM of internal memory territory and whether there is sufficient storage space, if had, by cold internal memory migration in described internal memory territory HIGHMEM, if do not had, judge in the NORMAL of internal memory territory and whether there is sufficient storage space, if there is sufficient storage space in the NORMAL of internal memory territory, by cold internal memory migration in described internal memory territory NORMAL, if do not had, continue to judge in the DMA of internal memory territory whether there is sufficient storage space.
Step S33, the data of described internal memory to be deposited are stored in the described DRAM after cold internal memory migration.
Wherein, cold internal memory refers to less accessed internal memory page frame recently.When according to internal memory modifier, determine when the first-selected internal memory territory of distributing is the internal memory territory in DRAM, and described DRAM is not while possessing sufficient storage space, need to carry out cold internal memory migration to PRAM, so that described DRAM obtains enough storage spaces.
Operation by step S31 to step S33, when internal memory territory corresponding to internal memory modifier is the internal memory territory in described DRAM, and when the internal memory territory that described internal memory modifier is corresponding does not have sufficient storage space, can be by the cold internal memory migration in DRAM to PRAM, so that DRAM obtains sufficient storage space, storage data.
In addition, when according to the lookup result of step S31, determine when each internal memory territory in PRAM does not have sufficient storage space, finish this storage operation.
The application's embodiment mono-discloses a kind of date storage method based on internal memory, and the method is applied to electronic equipment, and in described electronic equipment, is provided with dynamic storage DRAM and phase transition storage PRAM.In the method, be respectively described DRAM and PRAM and set up corresponding management data structures, obtain the internal memory territory that belongs to described DRAM and PRAM; In the time that needs are stored data, obtain the address of the Virtual Space of the data of internal memory to be deposited, determine the virtual memory region under the data of described internal memory to be deposited according to the address of described Virtual Space; Then the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory corresponding with described virtual memory region.Wherein, in the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM; In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, corresponding with described virtual memory region internal memory territory is the internal memory territory being arranged in PRAM.
In the time that the data of described internal memory to be deposited are stored to the free memory block in the internal memory territory corresponding with described virtual memory region, first according to the virtual memory region under the data of described internal memory to be deposited, determine corresponding internal memory modifier, then according to described internal memory modifier, determine the internal memory territory that described internal memory modifier is corresponding, using internal memory territory corresponding described internal memory modifier as first-selected internal memory territory, in the time that described first-selected internal memory territory has the free memory block of enough storage spaces, data are stored in described free memory block.
When internal memory territory corresponding to described internal memory modifier, be while not thering is the free memory block of enough storage spaces in first-selected internal memory territory, if the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in PRAM, and the internal memory territory that described PRAM divides is when more than two, according to internal memory Domain Index value, determine the priority in each internal memory territory, judge successively in each internal memory territory in described PRAM whether there is sufficient storage space by priority, while having, the data of described internal memory to be deposited are stored in the free memory block in this internal memory territory, if when each internal memory territory in described PRAM does not all have sufficient storage space, finish this storage operation.
When internal memory territory corresponding to described internal memory modifier, be while not thering is the free memory block of enough storage spaces in first-selected internal memory territory, if the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in DRAM, by the cold internal memory migration in described DRAM to PRAM, then the data of internal memory to be deposited are stored in the described DRAM after cold internal memory migration.If do not there is the storage space that holds described cold internal memory in PRAM, finish this storage operation.
The disclosed method of the application, carry out the storage of data according to the relative merits of described DRAM and PRAM, the data with different read write attributes are stored in corresponding storage space, thereby can bring into play PRAM and the DRAM performance advantage aspect reading and writing, both quiescent dissipation, the increase memory size of memory system can be reduced, the dynamic power consumption of memory system can be reduced again.
Further, in prior art, along with reducing of integrated circuit critical size, DRAM memory device has run into great difficulty in the development aspect dimensional contraction and storage density, thereby brings certain restriction to the development of memory system.The disclosed date storage method based on internal memory of the application, in electronic equipment, be provided with DRAM and PRAM, the memory space that has expanded electronic equipment, in memory device dimensional contraction simultaneously, still can keep certain storage density, remove the restriction of the development of internal deposit system.
Embodiment bis-
The application's embodiment bis-discloses the data storage device based on internal memory, and for solving prior art, the memory system based on DRAM has the problem that power consumption is high.The described data storage device based on internal memory is applied to electronic equipment, is provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment.
Structural representation shown in Figure 5, the described data storage device based on internal memory comprises: internal memory territory initialization module 100, virtual memory region determination module 200 and data memory module 300, wherein,
Described internal memory territory initialization module 100, sets up corresponding management data structures for being respectively described DRAM and PRAM, obtains the internal memory territory that belongs to described DRAM and PRAM;
Described virtual memory region determination module 200, in the time that needs are stored data, obtains the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determines the affiliated virtual memory region of data of described internal memory to be deposited;
Described data memory module 300, for according to the virtual memory region under the data of described internal memory to be deposited, is stored to the data of described internal memory to be deposited in free memory block in the internal memory territory corresponding with described virtual memory region.
Wherein, in the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM;
In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
Further, described data memory module comprises:
Internal memory modifier dispensing unit, for according to the virtual memory region under the data of described internal memory to be deposited, is the corresponding internal memory modifier of data configuration of described internal memory to be deposited;
The first storage unit, for obtaining the internal memory territory corresponding with described internal memory modifier, and while thering is the free memory block of enough storage spaces in described internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
Wherein, the internal memory territory of dividing as described PRAM is three, and the internal memory territory divided of described DRAM is while being one, and in described the first storage unit, the computing formula of obtaining the internal memory territory corresponding with described internal memory modifier is:
zone=(GFP_ZONE_TABLE>>(bit*2))&((1<<2)-1)；
Wherein, GFP_ZONE_TABLE is the constant value of setting, the internal memory modifier that bit is described data to be stored, the internal memory Domain Index value in internal memory territory corresponding to data that zone is described internal memory to be deposited.
Further,
When the internal memory territory of dividing in described PRAM is more than two, and internal memory territory corresponding to described internal memory modifier be the internal memory territory in described PRAM, and when the free memory block in described internal memory territory does not have sufficient storage space, described data memory module also comprises:
The first acquiring unit, for according to internal memory Domain Index value, obtains the internal memory territory that priority is the highest, as current internal memory territory;
The first judging unit, for searching the free memory block in described current internal memory territory, and the storage space that the judges described free memory block data that whether can store described internal memory to be deposited, if, the data of described internal memory to be deposited are stored in the free memory block in described current internal memory territory, if not, carry out the operation of second acquisition unit;
Second acquisition unit, if can not store the data of described internal memory to be deposited for the storage space of definite described free memory block time, judge and in described PRAM, whether have priority other internal memory territories inferior to described current internal memory territory, if exist, determine that other the highest internal memory territories of medium priority, internal memory territory are current internal memory territory, and return to the operation of carrying out the first judging unit, if do not exist, finish this storage operation.
Further, when the internal memory territory of dividing in described DRAM is one, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described DRAM, and when the free memory block in described internal memory territory does not have sufficient storage space, described data memory module also comprises:
Search unit, for searching the cold internal memory in the internal memory territory that obtains described DRAM;
Migration units, for obtaining the free memory block in the internal memory territory of described PRAM, and by described cold internal memory migration to the free memory block in described PRAM;
The second storage unit, for being stored to the data of described internal memory to be deposited described DRAM after cold internal memory migration.
The application's embodiment bis-discloses a kind of data storage device based on internal memory, and this application of installation is in electronic equipment, and in described electronic equipment, is provided with dynamic storage DRAM and phase transition storage PRAM.In this device, internal memory territory initialization module is respectively described DRAM and PRAM sets up corresponding management data structures, obtains the internal memory territory that belongs to described DRAM and PRAM; In the time that needs are stored data, virtual memory region determination module obtains the address of the Virtual Space of the data of internal memory to be deposited, determines the virtual memory region under the data of described internal memory to be deposited according to the address of described Virtual Space; Then data memory module is stored to the data of described internal memory to be deposited in free memory block in the internal memory territory corresponding with described virtual memory region.Wherein, in the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM; In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
The disclosed device of the application, carry out the storage of data according to the relative merits of described DRAM and PRAM, the data with different read write attributes are stored in corresponding storage space, thereby can bring into play PRAM and the DRAM performance advantage aspect reading and writing, both quiescent dissipation, the increase memory size of memory system can be reduced, the dynamic power consumption of memory system can be reduced again.
Further, in prior art, along with reducing of integrated circuit critical size, DRAM memory device has run into great difficulty in the development aspect dimensional contraction and storage density, thereby brings certain restriction to the development of memory system.The disclosed date storage method based on internal memory of the application, in electronic equipment, be provided with DRAM and PRAM, the memory space that has expanded electronic equipment, in memory device dimensional contraction simultaneously, still can keep certain storage density, remove the restriction of the development of internal deposit system.
Accordingly, disclosed herein as well is a kind of processor, described processor is applied to electronic equipment, is provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment; And in described processor, be integrated with the data storage device based on internal memory as above.
Accordingly, disclosed herein as well is a kind of electronic equipment, in described electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM; And, in described electronic equipment, be provided with processor as above.
Those of ordinary skills can recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein, can realize with the combination of electronic hardware or computer software and electronic hardware.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can realize described function with distinct methods to each specifically should being used for, but this realization should not thought and exceeds scope of the present invention.
Those skilled in the art can be well understood to, and for convenience and simplicity of description, the specific works process of the system of foregoing description, device and unit, can, with reference to the corresponding process in preceding method embodiment, not repeat them here.
In the several embodiment that provide in the application, should be understood that disclosed system, apparatus and method can realize by another way.For example, device embodiment described above is only schematic, for example, the division of described unit, be only that a kind of logic function is divided, when actual realization, can have other dividing mode, for example multiple unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.
The described unit as separating component explanation can or can not be also physically to separate, and the parts that show as unit can be or can not be also physical locations, can be positioned at a place, or also can be distributed in multiple network element.Can select according to the actual needs some or all of unit wherein to realize the object of the present embodiment scheme.
In addition, the each functional unit in each embodiment of the present invention can be integrated in a processing unit, can be also that the independent physics of unit exists, and also can be integrated in a unit two or more unit.
If described function realizes and during as production marketing independently or use, can be stored in a computer read/write memory medium using the form of SFU software functional unit.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words or the part of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprise that some instructions (can be personal computers in order to make a computer equipment, server, or the network equipment etc.) carry out all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, ROM (read-only memory) (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CDs.
To the above-mentioned explanation of the disclosed embodiments, make professional and technical personnel in the field can realize or use the present invention.To be apparent for those skilled in the art to the multiple modification of these embodiment, General Principle as defined herein can, in the situation that not departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (14)
1. the date storage method based on internal memory, is applied to electronic equipment, it is characterized in that, is provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment, and wherein, the described date storage method based on internal memory comprises:
Be respectively described DRAM and PRAM and set up corresponding management data structures, obtain the internal memory territory that belongs to described DRAM and PRAM;
In the time that needs are stored data, obtain the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determine the affiliated virtual memory region of data of described internal memory to be deposited;
According to the virtual memory region under the data of described internal memory to be deposited, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory corresponding with described virtual memory region.
2. method according to claim 1, is characterized in that,
In the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM;
In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
3. according to the method described in claim 1 and 2, it is characterized in that, the data of described internal memory to be deposited be stored in the free memory block in the internal memory territory corresponding with described virtual memory region, comprising:
According to the virtual memory region under the data of described internal memory to be deposited, it is the corresponding internal memory modifier of data configuration of described internal memory to be deposited;
Obtain the internal memory territory corresponding with described internal memory modifier, and while thering is the free memory block of enough storage spaces in described internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
4. method according to claim 3, is characterized in that, the internal memory territory of dividing as described PRAM is three, and the internal memory territory divided of described DRAM is while being one, described in obtain the internal memory territory corresponding with described internal memory modifier computing formula be:
zone=(GFP_ZONE_TABLE>>(bit*2))&((1<<2)-1)；
Wherein, GFP_ZONE_TABLE is the constant value of setting, the internal memory modifier that bit is described data to be stored, the internal memory Domain Index value in internal memory territory corresponding to data that zone is described internal memory to be deposited.
5. method according to claim 3, it is characterized in that, when the internal memory territory of dividing in described PRAM is more than two, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described PRAM, when free memory block in described internal memory territory does not have sufficient storage space, obtain behind the internal memory territory that described internal memory modifier is corresponding, also comprise:
51) according to internal memory Domain Index value, obtain the internal memory territory that priority is the highest, as current internal memory territory;
52) search the free memory block in described current internal memory territory, and the storage space that the judges described free memory block data that whether can store described internal memory to be deposited, if, the data of described internal memory to be deposited are stored in the free memory block in described current internal memory territory, if not, carry out next step;
53) if determine the data that the storage space of described free memory block can not be stored described internal memory to be deposited, judge and in described PRAM, whether have priority other internal memory territories inferior to described current internal memory territory, if exist, determine that other the highest internal memory territories of medium priority, internal memory territory are current internal memory territory, and return execution step 52) operation, if do not exist, finish this storage operation.
6. method according to claim 3, it is characterized in that, when the internal memory territory of dividing in described DRAM is one, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described DRAM, when free memory block in described internal memory territory does not have sufficient storage space, obtain behind the internal memory territory that described internal memory modifier is corresponding, also comprise:
Search the cold internal memory in the internal memory territory that obtains described DRAM;
Obtain the free memory block in the internal memory territory in described PRAM, and by described cold internal memory migration to the free memory block in described PRAM;
The data of described internal memory to be deposited are stored in the described DRAM after cold internal memory migration.
7. the data storage device based on internal memory, is applied to electronic equipment, it is characterized in that, is provided with dynamic storage DRAM and phase transition storage PRAM in described electronic equipment, and wherein, the described data storage device based on internal memory comprises:
Internal memory territory initialization module, sets up corresponding management data structures for being respectively described DRAM and PRAM, obtains the internal memory territory that belongs to described DRAM and PRAM;
Virtual memory region determination module, in the time that needs are stored data, obtains the address of the Virtual Space of the data of internal memory to be deposited, and according to the address of described Virtual Space, determines the affiliated virtual memory region of data of described internal memory to be deposited;
Data memory module, for according to the virtual memory region under the data of described internal memory to be deposited, is stored to the data of described internal memory to be deposited in the free memory block in the internal memory territory corresponding with described virtual memory region.
8. device according to claim 7, is characterized in that,
In the time that the virtual memory region under the data of described internal memory to be deposited is stack segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in DRAM;
In the time that the virtual memory region under the data of described internal memory to be deposited is code segment, data segment or shared segment, the internal memory territory corresponding with described virtual memory region is the internal memory territory being arranged in PRAM.
9. according to the device described in claim 7 and 8, it is characterized in that, described data memory module comprises:
Internal memory modifier dispensing unit, for according to the virtual memory region under the data of described internal memory to be deposited, is the corresponding internal memory modifier of data configuration of described internal memory to be deposited;
The first storage unit, for obtaining the internal memory territory corresponding with described internal memory modifier, and while thering is the free memory block of enough storage spaces in described internal memory territory, the data of described internal memory to be deposited are stored in the free memory block in the internal memory territory that described internal memory modifier is corresponding.
10. device according to claim 9, it is characterized in that, the internal memory territory of dividing as described PRAM is three, and the internal memory territory divided of described DRAM is while being one, in described the first storage unit, the computing formula of obtaining the internal memory territory corresponding with described internal memory modifier is:
zone=(GFP_ZONE_TABLE>>(bit*2))&((1<<2)-1)；
Wherein, GFP_ZONE_TABLE is the constant value of setting, the internal memory modifier that bit is described data to be stored, the internal memory Domain Index value in internal memory territory corresponding to data that zone is described internal memory to be deposited.
11. devices according to claim 9, it is characterized in that, when the internal memory territory of dividing in described PRAM is more than two, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described PRAM, when free memory block in described internal memory territory does not have sufficient storage space, described data memory module also comprises:
The first acquiring unit, for according to internal memory Domain Index value, obtains the internal memory territory that priority is the highest, as current internal memory territory;
The first judging unit, for searching the free memory block in described current internal memory territory, and the storage space that the judges described free memory block data that whether can store described internal memory to be deposited, if, the data of described internal memory to be deposited are stored in the free memory block in described current internal memory territory, if not, carry out the operation of second acquisition unit;
Second acquisition unit, if can not store the data of described internal memory to be deposited for the storage space of definite described free memory block time, judge and in described PRAM, whether have priority other internal memory territories inferior to described current internal memory territory, if exist, determine that other the highest internal memory territories of medium priority, internal memory territory are current internal memory territory, and return to the operation of carrying out the first judging unit, if do not exist, finish this storage operation.
12. devices according to claim 9, it is characterized in that, when the internal memory territory of dividing in described DRAM is one, and the internal memory territory that described internal memory modifier is corresponding is the internal memory territory in described DRAM, when free memory block in described internal memory territory does not have sufficient storage space, described data memory module also comprises:
Search unit, for searching the cold internal memory in the internal memory territory that obtains described DRAM;
Migration units, for obtaining the free memory block in the internal memory territory of described PRAM, and by described cold internal memory migration to the free memory block in described PRAM;
The second storage unit, for being stored to the data of described internal memory to be deposited described DRAM after cold internal memory migration.
13. 1 kinds of processors, are applied to electronic equipment, it is characterized in that,
In described electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM;
In described processor, be integrated with if claim 7 is to the data storage device based on internal memory as described in claim 12 any one.
14. 1 kinds of electronic equipments, is characterized in that,
In described electronic equipment, be provided with dynamic storage DRAM and phase transition storage PRAM;
In described electronic equipment, be provided with processor as claimed in claim 13.
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| CN105786725A (en) * | 2014-12-25 | 2016-07-20 | 研祥智能科技股份有限公司 | Memory management method and system based on heterogeneous hybrid memory |
| WO2016206421A1 (en) * | 2015-06-26 | 2016-12-29 | 中兴通讯股份有限公司 | Memory access processing method and device, and storage medium |
| CN107203477A (en) * | 2017-06-16 | 2017-09-26 | 深圳市万普拉斯科技有限公司 | Memory allocation method, device, electronic equipment and readable storage medium storing program for executing |
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| CN111104062A (en) * | 2019-11-22 | 2020-05-05 | 中科寒武纪科技股份有限公司 | Storage management method, device and storage medium |
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| US8613074B2 (en) * | 2010-09-30 | 2013-12-17 | Micron Technology, Inc. | Security protection for memory content of processor main memory |
| CN102508787B (en) * | 2011-11-29 | 2014-09-03 | 清华大学 | System and method for memory allocation of composite memory |
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| CN105786725A (en) * | 2014-12-25 | 2016-07-20 | 研祥智能科技股份有限公司 | Memory management method and system based on heterogeneous hybrid memory |
| CN105786725B (en) * | 2014-12-25 | 2020-10-27 | 研祥智能科技股份有限公司 | Memory management method and system based on heterogeneous hybrid memory |
| WO2016206421A1 (en) * | 2015-06-26 | 2016-12-29 | 中兴通讯股份有限公司 | Memory access processing method and device, and storage medium |
| CN110413339A (en) * | 2015-11-12 | 2019-11-05 | 华为技术有限公司 | The method and apparatus for loading software module |
| CN107203477A (en) * | 2017-06-16 | 2017-09-26 | 深圳市万普拉斯科技有限公司 | Memory allocation method, device, electronic equipment and readable storage medium storing program for executing |
| US11106574B2 (en) | 2017-06-16 | 2021-08-31 | Oneplus Technology (Shenzhen) Co., Ltd. | Memory allocation method, apparatus, electronic device, and computer storage medium |
| CN111104062A (en) * | 2019-11-22 | 2020-05-05 | 中科寒武纪科技股份有限公司 | Storage management method, device and storage medium |
| CN113641490A (en) * | 2021-07-30 | 2021-11-12 | 联想(北京)有限公司 | Data scheduling method and device |
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