CN103782400A - Monolithic multi-junction light emitting devices including multiple groups of light emitting diodes - Google Patents
Monolithic multi-junction light emitting devices including multiple groups of light emitting diodes Download PDFInfo
- Publication number
- CN103782400A CN103782400A CN201280042881.2A CN201280042881A CN103782400A CN 103782400 A CN103782400 A CN 103782400A CN 201280042881 A CN201280042881 A CN 201280042881A CN 103782400 A CN103782400 A CN 103782400A
- Authority
- CN
- China
- Prior art keywords
- led
- sub
- base station
- contact point
- string
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 27
- 239000002184 metal Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 27
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 51
- 238000005538 encapsulation Methods 0.000 claims description 21
- 230000004888 barrier function Effects 0.000 claims description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 17
- 229910052710 silicon Inorganic materials 0.000 claims description 17
- 239000010703 silicon Substances 0.000 claims description 17
- 230000005611 electricity Effects 0.000 claims description 10
- 230000003287 optical effect Effects 0.000 claims description 8
- 230000008878 coupling Effects 0.000 claims description 5
- 238000010168 coupling process Methods 0.000 claims description 5
- 238000005859 coupling reaction Methods 0.000 claims description 5
- 239000012812 sealant material Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 30
- 239000008393 encapsulating agent Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 107
- 239000012212 insulator Substances 0.000 description 23
- 238000001802 infusion Methods 0.000 description 22
- 238000009413 insulation Methods 0.000 description 20
- 238000000034 method Methods 0.000 description 19
- 238000000576 coating method Methods 0.000 description 17
- 239000011248 coating agent Substances 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 12
- 238000002955 isolation Methods 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 12
- 150000004767 nitrides Chemical class 0.000 description 10
- 230000007547 defect Effects 0.000 description 8
- 229910010271 silicon carbide Inorganic materials 0.000 description 8
- 230000008901 benefit Effects 0.000 description 7
- 239000007787 solid Substances 0.000 description 6
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 5
- 239000003086 colorant Substances 0.000 description 5
- 230000004907 flux Effects 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- -1 such as Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 238000001652 electrophoretic deposition Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910017083 AlN Inorganic materials 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 239000011135 tin Substances 0.000 description 3
- 229910052727 yttrium Inorganic materials 0.000 description 3
- 229910052688 Gadolinium Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910010413 TiO 2 Inorganic materials 0.000 description 2
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000007943 implant Substances 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000009940 knitting Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 229910019655 synthetic inorganic crystalline material Inorganic materials 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052765 Lutetium Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- CSBHIHQQSASAFO-UHFFFAOYSA-N [Cd].[Sn] Chemical compound [Cd].[Sn] CSBHIHQQSASAFO-UHFFFAOYSA-N 0.000 description 1
- RENIMWXTRZPXDX-UHFFFAOYSA-N [Ti].[Ni].[W] Chemical compound [Ti].[Ni].[W] RENIMWXTRZPXDX-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000007767 bonding agent Substances 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910019990 cerium-doped yttrium aluminum garnet Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000000295 emission spectrum Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 1
- 229910000480 nickel oxide Inorganic materials 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
A packaged light emitting diode (LED) includes a submount, a monolithic multi-junction LED on the submount, and an encapsulant material on the monolithic multi-junction LED. The monolithic multi-junction LED includes a substrate, a plurality of sub-LEDs on the submount, a plurality of conductive metal interconnects coupled to the sub-LEDs and connecting the sub-LEDs in a predetermined arrangement including an anode contact and a cathode contact, and an electrostatic discharge protection circuit in the substrate and coupled in parallel with the arrangement of sub-LEDs.
Description
The cross reference of related application
The application is that the people's such as Ibbetson title is the U.S. Patent application No.12/814 of " High Voltage Low Current Surface Emitting LED ", 241 part continuation application also requires its rights and interests, this U.S. Patent application No.12/814,241 self is that the people's such as Ibbetson title is the U.S. Patent application No.12/418 of " High Voltage Low Current Surface Emitting LED ", and 816 part continuation application also requires its rights and interests.
Technical field
The present invention relates to light-emitting diode (LED) chip, relate to particularly and there is the LED chip that interconnects the multiple tandem junctions that allow high voltage low current operation.
Background technology
The solid-state device that light-emitting diode (one or more LED) is is light by electric energy conversion, and, generally include one or more active layers of the semi-conducting material being sandwiched between contrary doped layer.In the time applying bias voltage across doped layer, hole and electronics are injected into active layer, and in active layer, hole and electron recombination are to produce light.From active layer utilizing emitted light, and, from all surfaces utilizing emitted light of LED.
In order similarly to use LED chip in layout at circuit or other, be known that LED chip is enclosed in encapsulation, so that environment and/or mechanical protection, color selection, light focusing etc. to be provided.LED encapsulation can also comprise for LED being encapsulated to the electrical lead, contact point or the trace that are electrically connected with external circuit.Fig. 1 illustrates traditional LED encapsulation, and it generally includes by solder bonds or conductive epoxy resin and is arranged on the single led chip 12 on reflector 13.One or more closing line 11 is connected the ohmic contact point of LED chip 12 with lead-in wire 15A and/or 15B, lead-in wire 15A and/or 15B can be attached to reflector 13 or become one with reflector 13.Reflector 13 can be filled with encapsulating material 16, and this encapsulating material 16 can comprise material for transformation of wave length, for example, and phosphor.Can be absorbed by phosphor with the light of the first wavelength emission by LED, this phosphor can be responsively with second wave length utilizing emitted light.Then encapsulate whole assembly with transparent protection resin 14, this protection resin 14 is molded in the top of LED chip 12 with the shape of lens.
Fig. 2 illustrates another kind of traditional LED encapsulation 20, and this LED encapsulation 20 can be more suitable in the high power operation that can produce more heat.In LED encapsulation 20, one or more LED chips 22 are installed on carrier, substrate or the base station (submount) 23 such as printed circuit board (PCB) (PCB) carrier.Reflector 24 can be included on base station 23, and it surrounds LED chip 22 and the light of being launched by LED chip 22 is reflected away from encapsulating 20.Can use different reflectors, for example, solid metal reflector, omni-directional reflector (ODR) and distributed Bragg reflector (DBR).Reflector 24 can also provide mechanical protection to LED chip 22.Electric trace 25A on ohmic contact point on LED chip 22 and base station 23, forms one or more closing line and connects 11 between 25B.Then, cover the LED chip 22 of installation with sealant 26, sealing agent 26 can provide environment and mechanical protection to chip, also serves as lens simultaneously.Solid metal reflector 24 is conventionally engaged and is attached to carrier by scolder or resene.
Attempt realizing in the following way High Light Output for many LED parts of solid luminescent application: operate single LED chip with high as far as possible electric current and to be generally used for the low-voltage of each LED.Fig. 3 and 4 be illustrated under EZ700.TM.LED product title from
an available commercially available LED30.LED comprise single led knot 32 and at its top with expansion the current-dispersing structure 34 from the electric current of apical grafting contact 36.Current extending is also included.The concrete voltage level that is used for the unijunction LED chip of these types can depend on for the concrete material system of LED with based on the required voltage of junction voltage.For example, some LED based on III group-III nitride can have the junction voltage in the scope of 2.5 to 3.5 volts, and realizes the luminous flux of the increase of these LED by applying the current level of raising.A shortcoming of this method is, in system level, high current practice needs relatively costly driver, thinks that such parts provide stable DC current source.In addition, can be restricted to being applied to the level of electric current of these LED chips, and if unijunction failure, chip can be unavailable so.
By several LED encapsulation are installed on single circuit board, can realize higher light output in component level.Fig. 5 illustrates a kind of cross-sectional view of so distributed integrated LED array of packages 50, and this LED array of packages 50 comprises and is installed to substrate/base station 54 to realize more multiple LED encapsulation 52 of high light flux.Typical array comprises many LED encapsulation, and Fig. 5 only illustrates two, so that easy to understand and diagram.Or, the array that single led cavity is installed in each cavity by adopting provide more the parts of high flow capacity (for example, by Lamina, the TitanTurbo that Inc. provides
tMlED photo engine).By multiple LED encapsulation of suitable rated current are in series assembled at circuit board level, this many LED parts are arranged and can also be allowed to operate under high voltage and low current.Drive solid luminescent parts that driver solution the final system cost that reduces more cheaply can be provided with high voltage and low current.But the lower driver cost of such solution can be overspend due to the expensive of multiple single parts.
The compactedness of these LED array solutions can be more lower slightly than what expect, and this is not luminous " dead space (the dead space) " that extension is provided between adjacent LED encapsulation and cavity due to it.This dead space is provided for larger device, and can limit the ability that output beam is configured as to specific angular distribution by the single compact optical element that is similar to collimating lens or reflector.This makes to provide the structure of the solid-state lighting lamp of the light output of the directed or collimation in the form factor of existing lamp or even less form factor to be difficult to provide.This has just proposed such challenge,, provides the compact LED modulated structure that has been incorporated to LED parts that is, and these LED parts are supplied the luminous flux level of 1000 lumens and the higher scope from small light source.
Summary of the invention
A kind of monolithic electro-optical device (LED) of binding up one's hair, comprising: base station more; Multiple sub-LED on base station, each in described multiple sub-LED comprises anode contact point and negative electrode contact point; And multiple conductive metal interconnect parts, couple with sub-LED and according to the predetermined layout connexon LED that comprises many string LED that electricity is connected in series.
This monolithic bind up one's hair more electro-optical device can also comprise the first string LED and second string LED, this first string LED comprise anode contact point and negative electrode contact point, and, this second string LED comprise anode contact point and negative electrode contact point.
Combined light by the first string LED and the sub-LED transmitting of the second string comprises white light.
The sub-LED of the first string launches the light of the first color when by energizing quantity, and the sub-LED of the second string launches the light of second color different from the sub-LED of the first string when by energizing quantity.
The first LED of string in LED comprises active region structure, and the LED in the second string LED comprises the active region structure identical with LED in the first string LED.
LED in the first string LED comprises the first phosphor, and the LED in the second string LED comprises second phosphor different from the first phosphor.
The first phosphor comprises red-emitting phosphor, and the second phosphor comprises green phosphor.
This monolithic electro-optical device of binding up one's hair can also comprise more: for each the corresponding joint sheet of the sub-LED of many strings.
A kind of encapsulating light emitting device (LED), comprising: base station; And monolithic on this base station is tied LED more.This monolithic is tied LED more and is comprised: substrate, the multiple sub-LED on base station, and multiple conductive metal interconnect part, couple with sub-LED and according to the predetermined layout connexon LED that comprises anode contact point and negative electrode contact point.This device also comprises: in base station, tie the Zener device of LED coupled in parallel with monolithic more; And tie the sealant material on LED at monolithic more.
This encapsulating light emitting device can also comprise: the first and second joint sheets on base station; And bridge rectifier, comprise the input terminal coupling with the first and second joint sheets and the lead-out terminal coupling with corresponding anode and the negative electrode contact point of Zener device.
This encapsulating light emitting device can also comprise the photoelectric sensor on base station.
This encapsulating light emitting device can also comprise the temperature sensor on base station.
Sub-LED is connected in series between anode contact point and negative electrode contact point.
This base station comprises the silicon with the first conduction type, and Zener device comprise have with the silicon submount of the second conduction type of the first conductivity type opposite in doped region.
This encapsulating light emitting device can also comprise insulating barrier on base station and the multiple joint sheets on this insulating barrier, and the first joint sheet in joint sheet extends through insulating barrier, and contacts with the doped region in silicon submount.
This encapsulating light emitting device can also comprise second doped region with the second conduction type in silicon submount, and the second joint sheet in joint sheet extends through insulating barrier, and contacts with the second doped region in silicon submount.
The first joint sheet is electrically connected with the anode contact point that monolithic is tied LED more, and the negative electrode contact point that the second joint sheet is tied LED with monolithic more is electrically connected.
According to detailed description below with the accompanying drawing of feature of the present invention is shown by way of example, these and other aspect of the present invention and advantage will become apparent.
Accompanying drawing explanation
Fig. 1 illustrates the sectional view of prior art LED encapsulation.
Fig. 2 illustrates the sectional view of another kind of prior art LED encapsulation.
Fig. 3 illustrates according to the vertical view of the prior art LED chip of some embodiment.
Fig. 4 is the end view of the LED chip in Fig. 3.
Fig. 5 is according to the sectional view of the prior art LED encapsulation of some embodiment.
Fig. 6 is according to the vertical view of the LED chip of some embodiment embodiment.
Fig. 7 is the sectional view along the LED chip of Fig. 6 of hatching 7-7.
Fig. 8 is the schematic diagram of the interconnection in the LED chip illustrating in Fig. 6.
Fig. 9 is the schematic diagram illustrating according to the interconnection between another embodiment of the LED chip of some embodiment.
Figure 10 is the schematic diagram illustrating according to the interconnection between another embodiment of the LED chip of some embodiment.
Figure 11 is the schematic diagram illustrating according to the interconnection between another embodiment of the LED chip of some embodiment.
Figure 12 is the schematic diagram illustrating according to the interconnection between another embodiment of the LED chip of some embodiment.
Figure 13 is according to the sectional view of another embodiment of the single chip LED chip of some embodiment.
Figure 14 is according to the sectional view of another embodiment of the single chip LED chip of some embodiment.
Figure 15 is according to the sectional view of another embodiment of the single chip LED chip of some embodiment.
Figure 16 is according to the sectional view of another embodiment of the single chip LED chip of some embodiment.
Figure 17 is according to the sectional view of the embodiment of the single chip LED chip that utilizes through hole of some embodiment.
Figure 18 is according to the sectional view of another embodiment of the single chip LED chip that utilizes through hole of some embodiment.
Figure 19 is according to the vertical view of the LED chip of some embodiment.
Figure 20 is according to the vertical view of another LED chip of some embodiment.
Figure 21 A is according to the vertical view of the LED chip of some embodiment.
Figure 21 B is the sectional view of the packaging LED chips of Figure 21 A.
Figure 22 is according to the vertical view of the LED chip of some embodiment.
Figure 23 A-23C is the sectional view illustrating according to the formation of the LED chip of some embodiment.
Figure 24 is according to the vertical view of the packaging LED chips of some embodiment.
Figure 25 is the sectional view of the packaging LED chips of Figure 24.
Embodiment
The present invention comprises the multiple LED knot that is arranged on substrate/base station (" base station ") or single chip LED chip or the parts of sub-LED, to produce single compact light source element.As used in this application, monolithic refers to that wherein reflector is installed in the LED chip on a substrate or base station.According to the present invention, at least some in multiple knots or sub-LED are disposed on base station, and wherein different embodiment provides the interconnection of multi-series or the combination of series connection/parallel connection interconnection.Can launch the light of different colours according to LED chip of the present invention, some embodiment transmitting white wherein.
In one embodiment, provide and have the size identical with the high output of tradition unijunction LED or the LED chip of the area of coverage (footprint), the high output of this tradition unijunction LED uses low-voltage and high current practice so that high light flux operation to be provided.The active region of such traditional LED chip covers its base station substantially.According to the present invention, use such as the distinct methods of standard etching, photoetching or Implantation this region is divided into multiple knots or sub-LED(" sub-LED ").Can provide the cross tie part of conduction and the combination of dielectric features, with the sub-LED that in series interconnects on base station.
Owing to providing electric power with high AC voltage, therefore operate from traditional unijunction LED and the LED luminescent system of grid and need transformer and the converter circuit of certain type, its cost can be high, and volume meeting is large and loss meeting is large.The invention provides novel LED chip framework, this LED chip framework is designed to operate under high voltage and low current, rather than existing low-voltage and high current arrangements.Equal integral LED performance can be kept, and keeps the entirety size of LED chip and for contacting the requirement of LED chip simultaneously.By the function element of existing unijunction LED chip being incorporated in every sub-LED and knot thereof, equal performance is implemented.By being connected in series each sub-LED on the identical base station for unijunction LED chip, high voltage and low current operation are implemented.Preferably, each sub-LED encapsulated (pack) thick and fast to maximize active emitting area for given chip covering.According to one embodiment of present invention, with the alignment tolerance of the critical dimension of each manufacture level be 2 μ m or less, thereby make to waste hardly active region between adjacent bonds.
The quantity of sub-LED can be customized or is customized to meet available voltage level, or voltage level can be customized to meet the quantity of the knot being presented by sub-LED.According to available operating voltage, the quantity of the sub-LED on base station may diminish to three or also can be for hundreds of.By selecting quantity and the size of suitable sub-LED of each chip, LED chip operating voltage can be customized for final application.For example, the how sub-LED matrix (for example, using 15 sub-LED) of 16 × 225 μ m × 225 μ m that operate under 50 volts and 22mA can operate with the identical output characteristic of single junction devices with the similar size operating under 3V and 350mA.
The present invention can be used for manufacturing many different LED chips, these chips have with many commercially available unijunction LED chips (such as, can be from
the EZ that Inc buys
eZ700 and EZ1000LED chip) essentially identical size and the area of coverage.EZ700 can have the active tie region of chip area and about 650 × 650 μ m of about 680 × 680 μ m.EX1000LED chip can have the active tie region of chip area and about 950 × 950 μ m of about 980 × 980 μ m.The two provides unijunction all commercially, and according to the present invention, this unijunction is arranged and can be replaced by the in series multiple sub-LED of interconnection.
In the identical manufacturing process of maintenance, by changing simply the manufacture mask layout that is used to form sub-LED and conductive interconnect, can realize sub-LED and terminal objective operating voltage and the electric current of varying number.For example, single chip LED chip according to the present invention can have 20 sub-LED that are connected in series.The system that is used for the different materials of every sub-LED can present different sub-LED junction voltages.For the sub-LED of III group-III nitride, the driving voltage of about 60 volts (or each knot 3 volts) can use together with the operating current of about 20mA.In other application of U.S.'s electrical network that uses about 150 volts (peak is to paddy), with 3 volts of each knots, single chip LED chip can comprise 50 sub-LED that are connected in series.For the European electrical network that exceedes about 350 volts (peak is to paddy), monolithic chip can comprise and exceed 100 sub-LED that are connected in series.High voltage and low current LED chip allow to use more efficient drive circuit in high-power light emitting system.
Can also on single base station, comprise the sub-LED being connected in series more than a group according to the different embodiment of single chip LED chip of the present invention.According to the quantity of the sub-LED in each string being connected in series, this can require the voltage of two identical or different level to be applied to base station, to drive the sub-LED being connected in series.Other embodiment can comprise the various combination of the sub-LED of series and parallel connections interconnection.In another embodiment, LED chip can be provided with etched sub-LED, and can the quantity of sub-LED based in series interconnection determine operating voltage.This allows the standard LED chip of the sub-LED with standard number to be provided, and these LED chips have the different cross tie parts that are connected in series some or all sub-LED, to realize the operating voltage of expectation.But the method can cause using and being less than all sub-LED on LED chip.
Be different from many aspects traditional LED chip framework and technology according to embodiments of the invention.The present invention allows unijunction LED to resolve into two or more sub-LED that are connected in series on monolithic surface light emitting chip.By the various combination of conduction and electric insulation layer and feature, every sub-LED can with other sub-LED electric insulation (away from trace).In different embodiment, this insulation can also require to insert electrical insulator layer between knot and conductive submount or back face metalization, and produces independent ohmic contact point for each knot.
Due to its intrinsic defect tolerance, another advantage of many knot designs is that process rate (the good chip of each wafer) can improve.Although single short circuit (shorting) knot defect will make single knot device failure, the identical shortening defect in one of them of the multiple knots in many knot devices will only can make independent knot failure.The signal of telecommunication will be tied through defect, and although defect knot can be not luminous, remaining knot can normal running.Remaining all equates, the higher output (yield) that the present invention allows can reduce the luminous cost of LED of the lumen based on dollar.
In addition, for example, compare with the replaceable scheme (, bulb) that multiple little LED chips or LED encapsulation is in series stringed together to realize high voltage/low current operation in system level, by making light-emitting junction more close, the present invention allows much smaller source size.This causes more approaching the source of point source, thereby allows larger efficiency and flexibility in the secondary optical design of controlling irradiation pattern (radiation pattern).Another advantage is, by drive the monolithic chip that more approaches traditional electrical network with power signal, loss when conversion electrical network can be lowered.Only as reducing the result of transition loss, different embodiment according to the subject invention can cause system operating efficiency up to percent 7 raising.The present invention also allows big or small the reducing of conversion driving circuit, and this has reduced again the entirety size of emitter package or solid luminescent encapsulation.
The present invention can be applied to LED chip rank, to replace unijunction LED chip with the many knots LED chip being connected in series.Or the present invention can be applied to more large-area application, such as, being connected in series of multiple LED, sub-LED or knot formed at the each several part of wafer level or wafer.The amount of area can depend on different factors, such as, the operating voltage of expectation and the area being covered by difference knot.Different embodiments of the invention also can have the sub-LED that covers the wafer of LED wafer level or the zones of different of base station.
Describe the present invention with reference to some embodiment in this article, but should be appreciated that the present invention can realize in many different forms, and should not be construed as limited to the embodiment setting forth in this article.Especially, the description of this invention is to carry out about multiple sub-LED that are connected in series of difference configuration below, but should be appreciated that the present invention can be used in many other configurations.Sub-LED and different parts can have and exceed illustrated different shape and size, and the sub-LED of varying number can be included in array.Some or all in sub-LED can be coated with the down converter coating that can comprise phosphor loading bonding agent (phosphor loaded binder) (" phosphor/adhesive coating ").
It is also understood that when be mentioned such as the element of layer, region or substrate another element " on " time, it can be directly on this another element, or, also can there is intermediate layer.In addition, such as " interior ", " outward ", " on ", " top ", D score, " ... under " and the relative terms of " below " and similarly term can be used to describe in this article the relation in a layer or another region.Should be appreciated that the orientation except describing in the drawings, wish that these terms comprise the different orientation of device.
Although can various elements, parts, region, layer and/or part be described by first, second grade of term in this article,, these elements, parts, region, layer and/or part should not be subject to the restriction of these terms.These terms are only used for an element, parts, region, layer or part and another element, parts, region, layer or part to distinguish.Therefore,, in the situation that not departing from instruction of the present invention, the first element discussed below, parts, region, layer or part can be called as the second element, parts, region, layer or part.
In this article, with reference to the cross-sectional view diagram of the graphical representation of exemplary as the embodiment of the present invention, the embodiment of the present invention is described.Like this, the actual (real) thickness of each layer can be different, and for example, as the result of manufacturing process and/or tolerance, can expect with illustrated shape different.The embodiment of the present invention should not be built as the given shape that is limited to the region illustrating herein, but should comprise the deviation by the shape for example causing.Due to normal manufacturing tolerance, the region that is illustrated or is described as square or rectangle will have round or bending feature conventionally.Therefore, the region illustrating is in the drawings in fact schematically, and their shape is not intended to the accurate shape in the region that device is shown and is not intended to limit the scope of the invention.
Fig. 6 and Fig. 7 illustrate according to being arranged on the high voltage of the multiple sub-LED62a-c that are connected in series on base station 64 and an embodiment of low current single chip LED chip 60 of the present invention comprising.Should be appreciated that in other embodiments, base station 64 can comprise the growth substrate for LED chip 60.The present embodiment relates to replacement and has the single chip LED chip 60 of the unijunction LED chip of the active region of covered substrate 64 (for example, as shown in Figure 3 and Figure 4) substantially.Multiple sub-LED62a-c that are connected in series are arranged to cover same surf zone or the area of coverage of unijunction LED, the interconnected in series that can be removed to separate sub-LED62a-c and allow sub-LED62a-c except some part of active region.Although only show three sub-LED62a-c, should be appreciated that the different factors according to all operating voltages as desired, can comprise two or more sub-LED.As mentioned above, the present invention and the embodiment describing in this article can be applied to more large-area layout equally, such as, the each several part of wafer level or wafer.
Fig. 8 illustrates the schematic diagram of an embodiment of the interconnected in series between the sub-LED62a-c in LED chip 60.As mentioned above, more LED chip can provide with different serial or parallel connection interconnection forms.Fig. 9 illustrates the schematic diagram having more than another embodiment of the LED chip 90 of three sub-LED92 that are connected in series according to of the present invention.Figure 10 illustrates the schematic diagram that has another embodiment of the LED chip 93 of the string being connected in series of two sub-LED chips 94 that are connected in parallel according to of the present invention between single input and output contact point 95a, 95b.Figure 11 illustrates according to the schematic diagram of another embodiment of the LED chip 96 of the string being connected in series of two sub-LED chips 98 that comprise input and output contact point 99a, the 99b both with himself of the present invention.Figure 12 illustrates according to the schematic diagram of another embodiment of the LED chip 100 with the sub-LED circuit 102 being connected in parallel being connected in series between input and output contact point 104,106 of the present invention.This layout can provide fault-tolerant interconnection, and wherein, if one of them failure of the sub-LED in parallel circuit, remaining sub-LED can continue luminous.These are only some in the many different series and parallel connections layout that can provide in LED chip according to the present invention.For example, in the above-described embodiments, every sub-LED can comprise the serial or parallel connection circuit of the sub-LED of himself, or the combination of any series connection of sub-LED/parallel circuits.
Refer again to Fig. 6 and Fig. 7, every sub-LED62a-c can have and the similar feature of unijunction LED and the characteristic that cover whole base station 64.Sub-LED62a-c can have the many different semiconductor layer of arranging by different way.Manufacture and the operation of the layer that comprises LED and sub-LED62a-c are normally known in the art, only do in this article concise and to the point discussion.The layer of sub-LED62a-c can be manufactured by known treatment, and wherein a kind of suitable processing is to use metal organic chemical vapor deposition (MOCVD).The layer of sub-LED62a-c comprises the active layer/region being clipped between the first and second contrary doped epitaxial layers that all form continuously on growth substrate conventionally.
Should be appreciated that additional layer and element also can be included in every sub-LED62a-c, include but not limited to buffering, nucleation, contact and current extension layer, and light-extraction layer and element.It is also understood that contrary doped layer can comprise multiple layers and sublayer, and superlattice structure and interlayer.Active region can comprise: single quantum well (SQW), Multiple Quantum Well (MQW), double-heterostructure or superlattice structure.The order of layer can be different, and in the illustrated embodiment, first or bottom epitaxial loayer can be N-shaped doped layer, second or top epitaxial layer can be p-type doped layer, although in other embodiments, ground floor can be that p-type doped layer and the second layer can be N-shaped doped layers.Wherein p-type layer is that to be conventionally arranged on the sub-LED of the flip-chip on base station 64 corresponding with conduct for the embodiment of bottom layer.In flip-chip embodiment, should be appreciated that top layer can be growth substrate, and in different embodiment, all or part of of growth substrate can be removed.In removed those embodiment of growth substrate therein, N-shaped doped layer is used as upper surface and exposes.In another embodiment, it is upper that multiple parts of growth substrate can be left on sub-LED62a-c, and in certain embodiments, multiple parts of growth substrate can be formed or form texture and extract to strengthen light.
The layer of sub-LED62a-c can be manufactured with different material systems, and wherein, preferred treatment system is the material system based on III group-III nitride.III group-III nitride refers to those semiconducting compounds that form between the element (normally aluminium (Al), gallium (Ga) and indium (In)) in the III of nitrogen and periodic table of elements family.This term also refers to ternary and quaternary compound, such as, aluminium gallium nitride alloy (AlGaN) and aluminum indium nitride gallium (AlInGaN).According to one embodiment of present invention, N-shaped and p-type layer are that gallium nitride (GaN) and active region are InGaN, but be to be understood that, these embodiment can comprise the extra play with different compositions, such as, AlGaN resilient coating, the cover layer that there is the superlattice structure of GaN/InGaN layer and contain AlGaN.In optional embodiment, N-shaped and p-type layer can be AlGaN, aluminum gallium arsenide (AlGaAs) or Al-Ga-In-As phosphide (AlGaInAsP).The difference composition of III group nitride material system can have different junction voltages, such as, in the scope of 2.5 to 3.5 volts.
Sub-LED growth substrate (not shown) can be made up of many materials, such as, sapphire, silicon, carborundum, aluminium nitride (AlN), GaN, wherein, applicable substrate is the 4H polytype of carborundum, although other carborundum polytype also can be used (comprising 3C, 6H and 15R polytype).Carborundum has some advantage, such as, the crystal lattices more closely of mating with III group-III nitride compared with sapphire, and cause higher-quality III nitride films.Carborundum also has very high heat conductivity, thereby makes the gross output of the III group-III nitride on carborundum not be subject to the heat radiation of substrate to limit (can be identical with the situation of some device forming) on sapphire.SiC substrate can be from Cree Research, Inc., of Durham, N.C. obtains, and for the production of its method in scientific and technical literature and U.S.Pat.Nos.Re.34,861; 4,946,547; With 5,200, set forth in 022.
Every sub-LED62a-c can have the first and second contact points, and in this embodiment illustrating, sub-LED62a-c has vertical geometry.As mentioned below, as traditional perpendicular geometry device, sub-LED62a-c can be touched on their upper surface and on their basal surface.As what further describe in other embodiment hereinafter, the present invention can also use the LED with horizontal geometry, wherein, sub-LED can be touched from a side or the surface of sub-LED, rather than on upper surface or basal surface, is touched as in the situation of perpendicular geometry.The first and second contact points can comprise many different materials, such as, gold (Au), copper (Cu), nickel (Ni), indium (In), aluminium (Al), silver (Ag) or its combination.Other embodiment can comprise conductive oxide and transparent conductive oxide, such as, tin indium oxide, nickel oxide, zinc oxide, cadmium tin, titanium tungsten nickel, indium oxide, tin oxide, magnesium oxide, ZnGa
2o
4, ZnO
2/ Sb, Ga
2o
3/ Sn, AglnO
2/ Sn, In
2o
3/ Zn, CuA1O
2, LaCuOS, CuGaO
2and SrCu
20
2.The selection of the material using can be according to the electrical characteristics of the position of contact point and expectation, such as, transparency, junction resistance rate and sheet resistance.
Some embodiment of sub-LED62a-c can have further feature, and, for example, sub-LED based on III group-III nitride can have further feature and be particularly useful for current expansion to p-type III group-III nitride from contact point extend current this point with help, and current-dispersing structure can comprise the thin translucent current extending of cover part or whole p-type layer.These layers can comprise different materials, and these materials include but not limited to such as the metal of platinum (Pt) or such as the transparent conductive oxide of tin indium oxide (ITO).
As mentioned above, sub-LED62a-c is in the embodiment shown the flip-chip that is installed to base station 64.It can occur in wafer level or chip level.For the flip-chip of installing at wafer level, many wafer joining techniques can be used, and, in the illustrated embodiment, metal bond heap 68 is included between sub-LED62a-c and base station 64, wherein, one or more layers metal bond heap 68 on sub-LED62a-c and one or more layers metal bond heap 68 on base station 64.Group LED62a-c is while being installed to the flip-chip of base station 64, from the metal level of sub-LED62a-c with contact from the metal level of base station 64.Enough heat is applied in to make metal level to be joined together, and in the time that heat is removed, sub-LED62a-c is fixed to base station 64 by metal bond heap 68.Engaging heap layer can be made up of different materials, such as, Ni, Au and Sn, or its combination.After wafer level engages, LED chip 60 can be from wafer-separate out.Should be appreciated that this flip-chip bond can also occur in the each several part place of LED chip rank or wafer level.
As mentioned above, in traditional low-voltage and high electric current unijunction LED chip, LED active layer can be continuous across whole or most of base station 64, thereby unijunction list LED is provided.Then, in certain embodiments, under the help of current-dispersing structure and feature, the signal of telecommunication is applied to single LED.In LED chip 60, the multiple sub-LED62a-c(that unijunction LED chip is divided on insulator layer 70 is described below).Can realize this separation with many diverse ways, and in one embodiment, the each several part of LED layer can etch away with known etch process continuously, so that the physical separation between sub-LED62a-c to be provided.In other embodiments, use known photoetching technique, each several part can be removed.In one embodiment, the each several part of LED active region and doped layer is etched to insulating barrier 70 to form the open area between adjacent LED 62a-c.In other embodiments, before being installed to base station 64, sub-LED62a-c can be from unijunction LED separately.
The more quantity of the opening forming between sub-LED that can cause of quantity that should be appreciated that sub-LED62a-c is more.In each opening, the part in luminescence activity region is removed, thereby makes compared with covering single junction devices of the same area, can have the active region for LED chip still less.Along with sub-LED quantity becomes more, active light-emitting zone has corresponding minimizing conventionally.The minimizing of this active light-emitting zone can cause the corresponding raising of current density and the luminous reduction of LED chip.The minimizing of active light-emitting zone more, active region utilance (, the ratio of the active region of sub-LED matrix compared with the LED area of coverage) is less.In order to minimize the minimizing of active light-emitting zone, the alignment tolerance between sub-LED should be as far as possible little, thereby make the amount of removed active region between sub-LED as far as possible little.Alignment tolerance between sub-LED should be less than 5 microns, and wherein, preferably tolerance is for being less than 2 microns.Active region utilance should be greater than 50%, and wherein, applicable embodiment has the active region utilance that is greater than 75%.
In the illustrated embodiment, sub-LED62a-c is connected in series, thereby makes the signal that is applied to the first sub-LED62a through arriving remaining sub-LED62b, 62c being connected in series.In order to allow such being connected in series, sub-LED62a-c and conductive features electric insulation below metal bond heap 68.In other embodiments, base station 64 also can conduct electricity, thereby sub-LED62a-c also should be insulated with base station 64.For this electric insulation is provided, base insulator layer 70 can be included between sub-LED62a-c and jointing metal heap 68 and base station 64 below.It is upper that base insulator layer 70 can use conventional method to be deposited over sub-LED62a-62c, and can before sub-LED62a-62c flip-chip is installed to base station 64 and before the deposition of metal bond heap 68, be deposited.Insulating barrier 70 can be made up of many different insulative materials, includes but not limited to: silicon nitride (SiN), aluminium nitride (AlN), silicon dioxide (SiO
2), titanium dioxide (TiO
2) or aluminium oxide (Al
2o
3).In certain embodiments, insulating barrier 70 can also serve as for etched etching stopping layer, single led knot is divided into multiple sub-LED.
Insulating barrier 70 can have much different thickness, and thickness is wherein enough to bear the voltage that is applied to the sub-LED62a-c being connected in series.For example, be applied in the LED chip embodiment of 50 volts for its sub-LED, can there are 1000 to 10000 dusts
siN thickness of insulating layer.But, should be appreciated that insulating barrier can also have much different thickness.Thicker layer can provide the extra advantage to compensating in the little manufacturing defect forming in insulating barrier between depositional stage.But thicker layer can also reduce LED chip heat is expanded to from sub-LED the ability of base station.Therefore,, in the time determining the optimum thickness of specific LED chip, between defect tolerance and heat radiation, there is balance.
Conduction end contact layer 72a-c is included, and wherein, every one deck is all between one of them and the insulator layer 70 of sub-LED62a-c.Each end contact layer 72a-c comprises electric conducting material with the bottom to every sub-LED62a-c by current expansion, and wherein, applicable material is the above-mentioned material for the first and second contact points of listing.End contact layer 72a-c can use such as the already known processes of sputter or electron beam (ebeam) technique and manufacture.
Some or all sub-LED62a-c can be coated with one or more phosphors, and wherein, phosphor absorbs at least part of LED light and launches the light of different wave length, thereby make the combination of LED transmitting from the light of LED and phosphor.As mentioned above from unijunction segregant LED62a-c, this coating can be applied to sub-LED.Different embodiment according to the subject invention comprises white luminous sub-LED, the light of its transmitting blue wavelength spectrum, and wherein, phosphor absorbs some blue light and again launches sodium yellow.The white light combination of sub-LED62a-c transmitting blue light and sodium yellow.In one embodiment, although use by based on (Gd, Y)
3(Al, Ga)
5o
12: Ce system (such as, Y
3al
5o
12: Ce (YAG)) the conversion particle made of phosphor, FR wide area yellow spectrum transmitting is possible, but phosphor comprises commercially available YAG:Ce.Other can comprise for the yellow phosphor of white luminous LED chip: Tb
3- xrE
xo
12: Ce (TAG); RE=Y, Gd, La, Lu; Or Sr
2-x-yba
xca
ysiO
4: Eu.
Should be appreciated that different sub-LED62a-c can be coated with dissimilar phosphor to absorb LED light and to launch the light of different colours.For example, can use and in blueness and/or UV emission spectrum, show the different yellow, green or the red-emitting phosphor that excite.Many peak emission that expectation is provided in these phosphors, have efficient light conversion and have acceptable Stokes shift (Stokes shift).
Sub-LED62a-c can use many distinct methods to be capped phosphor, wherein, a kind of applicable method is at U.S. Patent application Ser.No.11/656,759 and 11/899, in 790, be described, both be named as " Wafer Level Phosphor Coating Method and Devices Fabricated Utilizing Method ", and be both incorporated to by reference herein.Or, LED can use such as other method of electrophoretic deposition (EPD) and cover, wherein, applicable EPD method is being named as the U.S. Patent application Ser.No.11/473 of " Close Loop Electrophoretic Deposition of Semiconductor Devices ", in 089, be described, it is also incorporated to herein by reference.Should be appreciated that LED encapsulation according to the present invention can also have multiple LED of different colours, one or more can be transmitting white.
In order to allow interconnected in series, every sub-LED62a-c can also have the first side insulator 74 and the second side insulator 76.Each the first side insulator 74 for example, provides electric insulation with the signal of telecommunication being sent between the contact point of upper surface (, N-shaped layer) of sub-LED62a-c or trace in one of them of its sub-LED62a-c.The signal of telecommunication that has prevented from being like this applied to top layer is shorted to the contact point of undesirable layer or LED.For example, the first sub-LED62a has and one of them top closing line pad 78 electrically contacting of the first sub-LED contact point.The first insulator 74 on sub-LED62a is side surface and end contact point 72a and closing line pad 78 electric insulations, thereby the signal of telecommunication that is applied to closing line pad 78 is expanded in the top layer of sub-LED62a.
The first electric connector trace 80 is connected to the end contact point 72a from the first sub-LED62a the top layer of the second sub-LED62b.The first insulator 74 on the second sub-LED62b is the side surface of the second sub-LED62b and the first electric connector trace 80 electric insulations, thereby makes to expand in the upper surface of the second sub-LED62b from the signal of telecommunication of end contact point 72a.Similarly, the first side insulator layer 74 on the 3rd sub-LED62c insulate the side of the 3rd sub-LED62c and the second electric trace 82 that the end contact point of the second sub-LED is connected to the upper surface of the 3rd sub-LED62c.
The second side insulation layer 76 on the first sub-LED62a insulate the side surface of the first sub-LED62a and the first electric trace 80, to prevent that trace 80 is shorted to the first sub-LED62a.Similarly, the second side insulation layer 76 on the second sub-LED62b prevents that the second electric trace 82 is shorted to the second sub-LED62b.Be included in for the second closing line pad 84 on the end contact point 72c of the 3rd sub-LED62c and the second side insulation layer 76 on the 3rd sub-LED62c the 3rd sub-LED62c and the second closing line pad 84 are insulated.The layout of this side insulator, joint sheet and electric trace allows the signal of telecommunication that is applied to LED chip 60 correctly in series to send by sub-LED62a-c. Side insulator layer 74,76 can be made up of many different materials'use already known processes depositions, such as, those include but not limited to SiN, AlN, SiO for the material of base station insulator layer 70
2, TiO
2or Al
2o
3.
Each end contact layer 72a-c can also comprise with sub-LED62a-c in the adjacent speculum contact point 86 of one or more basal surfaces.This speculum can cover the whole basal surface of sub-LED62a-c or the region that can cover is less than whole basal surface, thereby make it aim at (, this part of upper surface is not engaged line pad, trace and insulating material covering) with the luminous opening of every sub-LED upper surface.Speculum contact point 86 can comprise the many different material such as reflecting material, or can comprise the catoptric arrangement such as distributed bragg reflection device (DBR).Except serving as the ohmic contact point of bottom of sub-LED62a-c, each speculum is arranged to one of them the light of active region transmitting from sub-LED62a-c is reflected to base station 64, thereby this light is made contributions to one of them the useful transmitting of upper surface from sub-LED62a-c.
In operation, closing line can be coupled to the first closing line pad 78 and the second closing line pad 84, thereby makes the signal of telecommunication can be applied to sub-LED62a-c.This signal of telecommunication passes the first sub-LED62a, and is transmitted to the second sub-LED62b along the first electric trace 80.This signal of telecommunication passes the second sub-LED62b, and is transmitted to the 3rd sub-LED along the second electric trace 82.Then, signal is through the 3rd sub-LED62c, and wherein, all sub-LED are in response to the signal of telecommunication utilizing emitted light that is applied to closing line pad 78,84.
Figure 13 illustrates according to another embodiment of the single chip LED chip 110 that comprises sub-LED112a-c of the present invention.LED chip 110 has many and the similar feature of LED chip 60 and for these similar features, identical Reference numeral will be used to the description of the present embodiment (and subsequent embodiment), is to be understood that foregoing description is equally applicable to the present embodiment.LED chip 110 comprises base station 64, and wherein, jointing metal heap 68 and base station insulator layer 70 are arranged on base station 64 continuously.Contact point 72a-d is included at the end, and wherein, each is between one of them and the insulator layer 70 of sub-LED112a-c.
Sub-LED112a-c can have the feature identical with the sub-LED62a-c describing, and it comprises semiconductor layer, contact point, phosphor, resilient coating, nucleating layer, contact layer and current extending and light-extraction layer and element.Sub-LED112a-c can also be the flip-chip that is arranged on base station 64 as above, and wherein, sub-LED112a-c separates and is in series coupled in together from unijunction LED.But sub-LED112 has horizontal geometry rather than perpendicular geometry, thereby the contact point of every sub-LED can be approached from every sub-LED basal surface.In an embodiment of horizontal geometry device, the p-type layer of every sub-LED and a part for active region are removed, such as, by being etched with the contact table top (mesa) exposing on N-shaped layer.On the table top of N-shaped layer, provide contact area, thereby make sub-LED from same side (basal surface in this case) contact contact point.These contact points form before insulated body layer 70 covers and before flip-chip is arranged on base station 64.
Insulating regions 118 is included, with adjacent with closing line pad 78,84 and first, second, and third table top, with by the adjacent semiconductor layer insulation of they and sub-LED112a-c.The less desirable layer that has prevented like this these features and sub-LED112a-c is short-circuited.Insulator region 118 can be made up of the materials'use already known processes deposition identical with above-mentioned side insulator, and described material includes but not limited to SiN, AlN, SiO
2, TiO
2or Al
2o
3.
Identical with above-mentioned LED chip 60, closing line can be coupled to closing line pad 78,84, and the signal of telecommunication in series passes through sub-LED112a-c from closing line pad 78,84.Signal passes to the first end contact point 72a from closing line pad 78, by sub-LED112a and arrive the first contact table top 114a., and continue similarly to arrive the second closing line pad 84 by sub-LED112b, 112c to the second end contact point 72b in the signal extension at the first contact table top 114a place.LED chip 110 is provided, and does not need closing line or covers the conductive trace of sub-LED112a-c.
Figure 14 illustrates another embodiment according to LED chip 130 of the present invention, and it has the sub-LED132a-c of perpendicular geometry of series connection manufacture the interconnection identical with the mode of the sub-LED62a-c in above-mentioned LED chip 60.But in the present embodiment, base station 134 comprises insulating material, and corresponding feature does not need to be included to sub-LED132a-c and base station 134 are insulated.Otherwise sub-LED can use the dielectric wafer knitting layer 136 between base station 134 and sub-LED132a-c to be installed to base station 134.The signal of telecommunication is in series expanded by sub-LED132a-c from die bond pad 78, by end contact point 72a-c, by the first electric trace 80 and the second electric trace 82, and arrives the second closing line pad 84.Because base station 134 insulate, therefore through the signal of telecommunication of these features not can with base station short circuit.In addition,, because base station 134 insulate, therefore the Dielectric Breakdown Character of dielectric layer 136 is not too important.
Figure 15 illustrates another embodiment according to single chip LED chip 160 of the present invention, and it depends on other method and carrys out segregant LED162a-c.Sub-LED162a-c has horizontal geometry, although the present embodiment is equally applicable to the device of perpendicular geometry.Sub-LED162a-c utilizes metal bond heap 68 and base station insulator layer 70 to be arranged on base station 64 by flip-chip.Each end contact point 72a-d by with and Figure 12 shown in the similar mode of layout of LED chip 100 be arranged between sub-LED162a-c.The first closing line pad 78 is on end contact point 72a, and the second closing line pad 84 is on end contact point 72d.
Replace mechanically from unijunction LED segregant LED162a-c, use isolation infusion (implants) by zones of different electricity isolation mutually, to form insulation or semi-insulating region in the semi-conducting material of LED.Different infusions is also used to produce the conductive path through LED semi-conducting material, to allow the horizontal geometry operation of sub-LED in the situation that needn't forming contact table top.
In the illustrated embodiment, first, second, and third conduction infusion 164a-c is included in sub-LED162a-c, wherein, each conduction infusion 164a-c provides respectively one of them one of them the conductive path to the doped layer in every sub-LED from first, second, and third end contact point 72a-c.For the sub-LED of flip-chip, conductive path is advanced to n doped layer from end contact point 72a-c.Conductive path can be used such as the n+ compound of silicon and oxygen and implant to form, although other V or VI family element also can be used.Can use known ion injection method, and in certain embodiments, n+ infusion may need to activate by annealing.Conduction infusion 164a-c provides just has advantages of the conductive path that arrives n doping semiconductor layer in the situation that needn't forming conduction table top.But, should be appreciated that this layout can also be used in the embodiment with conduction table top as above.
Can use degree of depth isolation infusion 166a, 166b so that electricity isolation to be provided between sub-LED162a-c, wherein, each infusion extends through the semi-conducting material of LED.Many different materials can be used to isolate infusion, include but not limited to nitrogen or iron.These infusions 166a, 166b comprise semi-insulating or insulating regions, this semi-insulating or insulating regions with and mechanically separate closely similar mode and stop the conduction between adjacent sub-LED.
In sub-LED162a-c on each space of shallow isolation infusion 168a-c between end contact point 72a-d, be provided, wherein, each shallow isolation infusion 168a-c is upward through one of them the end doped layer of its sub-LED162a-c.In the illustrated embodiment, end doped layer comprises p-type doped layer.Shallow isolation infusion 168a-c stops the contact point of the adjacent end that is shorted to conduction infusion 164a-c and end contact point 72b-d through the signal of telecommunication of each p-type layer.It provides path through every sub-LED162a-c so that the signal of telecommunication is launched for the signal of telecommunication, and wherein, sub-LED162a-c is in series electrically connected between the first closing line pad 78 and the second closing line pad 84.
Figure 16 illustrates according to another embodiment of the LED180 with sub-LED182a-c of the present invention, and it also depends on infusion and in the semi-conducting material of LED, forms insulation or semi-insulating region, and depends on infusion and produce conductive path.But in the present embodiment, unijunction LED comprises insulation or semi-insulating resilient coating 184.In order to form necessary insulation between adjacent sub-LED182a-c, the isolation infusion 186a, the 186b that arrive resilient coating through semi-conducting material are included.By isolation infusion 186a, 186b and resilient coating 184, block current flow is passed between sub-LED182a-c.Shallow isolation infusion 188a-c is similar to the shallow isolation infusion 168a-c in LED chip 160, and by p-type layer and the isolation of n contact point electricity.Conduction infusion 190a-c is also included, and it is similar to conduction infusion 164a-c, and is provided to the electrical connection of N-shaped layer by other semiconductor layer of LED chip 180.This layout also provides path through every sub-LED182a-c so that the signal of telecommunication is launched for the signal of telecommunication, and wherein, sub-LED182a-c is in series electrically connected between the first closing line pad 78 and the second closing line pad 84.
As discussed above, realize the operation of high voltage and low current by be connected in series each sub-LED on base station, wherein, some embodiment has and the same or similar base station of base station for unijunction LED chip.In order to realize valid function, should maximize for the active light-emitting zone of given chip covering.As mentioned above, in certain embodiments, and alignment tolerance between the critical dimension of each manufacture level is 2 μ m or less, thereby makes to waste hardly active region between adjacent bonds.Do like this and contribute to maximize according to the active light-emitting zone of LED chip of the present invention.Other embodiment can have further feature and the framework of further maximization active region.
Figure 17 illustrates another embodiment according to single chip LED chip 200 of the present invention, wherein, can increase active light-emitting zone by minimizing the area being occupied by joint sheet.LED chip 200 is similar to the single chip LED chip 60 shown in Fig. 7, and is included in the sub-LED202a-c on base station 64.LED chip 200 also comprises and is arranged in continuously jointing metal on base station 64 heap 68 and base station insulator layer 70 between base station 64 and sub-LED202a-c.Contact point 72a-c is included at the end, and wherein, each is between one of them and the insulator layer 70 of sub-LED202a-c.The first sub-LED202a can have one of them the top closing line pad 78 electrically contacting with the first sub-LED contact point.In order to allow interconnected in series, every sub-LED202a-c can also have the first side insulator 74 and the second side insulator 76, and wherein, trace 80,82 interconnects sub-LED.
Should be appreciated that closing line pad can have many different shapes and size, wherein, a traditional joint sheet has the area of about 150 squares of μ m.In embodiment shown in Figure 17, the active light-emitting zone of sub-LED202c is removed (that is, etching away), thinks that the second contact point 84 leaves table top.Do like this that reduced can be for luminous active region.
Refer again to Figure 17, this minimizing of the active emitting area causing while forming the second joint sheet table top in order to help to be minimized in can comprise the conductive through hole 204 that replaces joint sheet, to make to be electrically connected to end contact point 72c in LED chip 200.In the illustrated embodiment, through hole 204 arrives metal stack 68 through insulating barrier 70, but should be appreciated that through hole in other embodiments can further extend, such as, extend to base station 64 and/or partly pass base station 64.Through hole 204 has the lateral part 204a extending on the upper surface of end contact point 72c, provides good electrically contacting with between.
Identical with the LED60 in Fig. 7, closing line can be coupled to the first joint sheet 78, thereby makes the signal of telecommunication can be applied to sub-LED202a-c.But, in the present embodiment,
Signal is applied to sub-LED202a-c across joint sheet 78 and base station 64.
This signal of telecommunication passes the first joint sheet 78 by the first sub-LED202a, and is transmitted to the second sub-LED202b along the first electric trace 80.Signal passes the second sub-LED202b, and is transmitted to the 3rd sub-LED202c along the second electric trace 82.Then, this signal is through the 3rd sub-LED202c.Different from the LED60 in Fig. 7, this signal is not delivered to joint sheet and closing line from the 3rd sub-LED202c.Otherwise signal is through through hole 204 and arrive conducting metal heap 68.Then, this signal is through base station 64, and this base station is electrically coupled to allow this signal to leave LED200 by base station.In certain embodiments, LED chip 200 can be installed to printed circuit board (PCB) (PCB), radiator or have other similar structure of the conductive features that is couple to base station 64.In the illustrated embodiment, all sub-LED202a-c comes luminous in response to the signal of telecommunication that is applied to closing line pad 78 and base station 64.
By utilizing the joint sheet at through hole rather than sub-LED202c place, active region still less need to be removed.With needs 150 μ m or more compared with the long-pending joint sheet of multiaspect, the part that through hole only need to this area.In certain embodiments, through hole needs about 40 μ m or area still less, and in other embodiments, it can need about 30 μ m or area still less.In another embodiment, it can need about 20 μ m or area still less.This compared with closing line pad reduction in size caused the increase of sub-LED active region and the corresponding increase of efficiency.
Can use conventional method to form according to through hole of the present invention, such as, be formed for through hole opening etching and be used to form the photoetching treatment of through hole.Should be appreciated that this via arrangement can be used similarly in above-mentioned any LED embodiment with conductive submount.For example, the LED110 of Figure 13 can provide through hole rather than closing line pad 84, and the layout of the through hole 204 in through hole and Figure 17 is wherein similar.Through hole can also provide in the LED160 in Figure 15 and Figure 16 and 180 respectively, replaces closing line pad 84.
Can also be used to have according to via arrangement of the present invention in the embodiment of electrically insulating base.Figure 18 illustrates the LED chip 210 that is similar to the LED130 shown in Figure 14, and LED chip 210 comprises the first, second, and third sub-LED212a-c and the insulation base station 134 that are arranged on dielectric wafer knitting layer 136.The signal of telecommunication is expanded by sub-LED212a-c, by end contact point 72a-c, by the first electric trace 80 and the second electric trace 82 serially from wafer pad 78.But this embodiment does not have the second closing line pad, the substitute is the through hole 214 having through dielectric layer 136 and base station 134.This through hole also has the lateral part 214a of the excellent electric contact that is provided to end contact point 72c.Because base station 134 is electric insulations, therefore this through hole should pass and arrive the basal surface of base station 134.Make like this through hole 214 can be used for electrically contacting of LED basal surface.In certain embodiments, contact layer 216 can be included on the basal surface of the base station 64 electrically contacting with through hole 214, has with through hole 214 and effectively electrically contacts allowing in the bottom surface of LED.
Same as the previously described embodiments, this through hole only takies a part for closing line pad required area on LED chip.By using through hole to replace closing line pad, active region is still less removed.Stay so more LED active region for luminous, thereby improved the whole efficiency of LED chip.
It is also understood that different embodiment can have more than one through hole, and these through holes can be positioned at many different positions.In those embodiment with multiple through holes, these through holes can have different shapes and size, and can in LED, extend to different depth.It is also understood that different embodiment also can comprise the through hole that replaces the first closing line pad to use.
As mentioned above, an advantage of the present invention is the fault-tolerance (failure tolerance) of the raising compared with unijunction LED chip.With reference now to Figure 19,, single chip LED chip 220 is shown having the multiple sub-LED222 that are connected in series on base station 224.Sub-LED222a is shown as the sub-LED with fault knot.In the time that this sub-LED knot breaks down, sub-LED222a can be not luminous, but it still can conduct electricity, thereby the signal of telecommunication that makes to be applied to sub-LED222a will be transmitted to and be connected in series ensuing its minor LED.Consequently, except a sub-LED222a of fault, all sub-LED222 can be luminous.
In many application, the reduction of the luminous flux being caused by the sub-LED of single fault is acceptable.On the contrary, when tie fault in unijunction LED chip time, this device is not luminous and can not be used.
Different embodiments of the invention can comprise the further feature of further raising fault-tolerance.Figure 20 illustrates another embodiment according to LED chip 230 of the present invention, and it is with similar at the LED chip 60 shown in Fig. 6 and Fig. 7 as mentioned above.It comprises the first, second, and third sub-LED232a-c being arranged on insulating barrier 70, and insulating barrier 70 is on metal stack and base station (invisible in the view illustrating).LED chip 230 also comprises the first closing line pad 78 and the second closing line pad 84.But in the present embodiment, LED chip can be included in the multiple interconnect traces between sub-LED232a-c, wherein, the embodiment illustrating has two interconnect traces.The first electric trace 80a and 80b can be included between the first sub-LED232a and the second sub-LED232b and be interconnected, and the second electric trace 82a and 82b can be included between the second sub-LED232b and the 3rd sub-LED232c and by its interconnection.LED chip 230 can also comprise the first and second side insulation layers as above, to provide electric insulation between joint sheet or between first and second electric trace of upper surface that the signal of telecommunication is sent to sub-LED232a-c.
Between sub-LED, provide multiple spaces independently electrical interconnection produce and there is defect or the fault-tolerant LED chip of raising.For example, if failure between in described sub-LED two of in electric trace one,, establishes road by cable and failure owing to becoming, another electric trace between identical LED can transmit the signal of telecommunication between these two LED.Even one of them failure of the trace between two sub-LED, this layout also allows LED chip still can operate.Should be appreciated that according to LED chip of the present invention and can there is the electric trace that is greater than two between adjacent sub-LED, and between different LED traces, can comprise the trace of varying number.It is also understood that other sub-LED feature is also unnecessary to improving fault-tolerance, such as, above-mentioned closing line pad and/or through hole.
Other embodiments of the invention are shown in Figure 21 A, and it is the vertical view that comprises monolithic unijunction light-emitting diode (LED) 300A of the multiple independent string 65a-65c of sub-LED62a-62c.LED300A comprises base station 64 and the multiple sub-LED62a-62i on this base station.Every sub-LED62a-62i comprises anode contact point and negative electrode contact point.Multiple conductive metal interconnect part 80a-c, 82a-c are coupled to sub-LED62a-62i, and to comprise the predetermined layout connexon LED62a-62i of the multiple sub-LED string 65a-65c that electricity is connected in series.Each string comprises anode contact point 78a-78c and negative electrode contact point 84a-84c separately.Therefore, the first string 65a comprises sub-LED62a-62c, and has anode contact point 78a and negative electrode contact point 84a.The second string 65b comprises sub-LED62d-62f, and has anode contact point 78b and negative electrode contact point 84b, and the 3rd string 65c comprises sub-LED62g-62i, and has anode contact point 78c and negative electrode contact point 84c.
As shown in Figure 21 B, every sub-LED can comprise phosphor coating 63a-63c.Phosphor coating 63a-63c can comprise YAG phosphor as above.Therefore, sub-LED62a-62i can transmitting white.
In certain embodiments, as shown in figure 22, different phosphor coatings can be applied to each string 65a-65c.For example, the first phosphor coating 67a can be applied to the first string 65a, and the second phosphor coating 67b can be applied to the second string 65b, and the 3rd phosphor coating 67c can be applied to the 3rd string 65c.Or phosphor coating can be applied to one or more strings, and one or more other string can not have phosphor coating.
First, second and/or the 3rd phosphor can be included in the different phosphor of the light of launching different colours while being excited.For example, the first phosphor can comprise blue phosphor, and the second phosphor can comprise red-emitting phosphor, and the 3rd phosphor can comprise green phosphor.In other embodiments, the first and second phosphors can comprise white emitting phosphor, and the 3rd phosphor can comprise red-emitting phosphor.
Therefore can be, the combination of different colours by the light of device 300B transmitting.In addition, due to the separative anode of each string 65a-65c tool and negative electrode contact point, therefore these strings can drive with different current levels, thereby can allow the relative intensity of adjusting by the light of every kind of color emission.Therefore, the color dot (color point) of whole device 300B can be adjusted by suitably adjusting through the level of the electric current of each string.
Some embodiment provides and comprises the monolithic that is arranged on the multiple sub-LED on the base station with the protection of the built-in Electrostatic Discharge optical diode of binding up one's hair more.Being formed on shown in Figure 23 A-23C of such device.With reference to figure 23A, base station 360 is provided.Base station 360 can comprise the semi-conducting material such as silicon.Insulating barrier 312 is arranged on base station 360, and multiple joint sheet 310a is provided on insulating barrier 312 to 310d.
A pair of doped region 305a, 305d are provided, and form Zener diode therein in base station 360.Doped region 305a, 305d are couple to joint sheet 310a, 310d by each conductive through hole 342a, 342d.Although only show two doped region 305a, 305d, a pair of doped region can be provided for every sub-LED string in the device that will be included in.
With reference to figure 23B, comprise that the optical diode of binding up one's hair of multiple sub-LED62a-62c is manufactured more and join base station 360 to.
With reference to figure 23C, the substrate 60 of the optical diode of binding up one's hair can be removed more, and anode contact point 314a and negative electrode contact point 314d can be formed on respectively on joint sheet 310a, 310d.
Comprise that according to some embodiment encapsulating light emitting device 400 that monolithic ties LED more is shown in Figure 24 and Figure 25.With reference to Figure 24 and Figure 25, encapsulating light emitting device 400 comprises the substrate 410 that can comprise silicon, and on substrate 410, monolithic is tied LED450 more and is mounted.Monolithic is tied LED450 more and is comprised substrate 460 and the multiple sub-LED405 on it, and this little LED405 can be with single string, go here and there or the step of any other expectation couples more.
The ESD protection circuit 435 that comprises one or more Zener diodes is provided in base station 410.Encapsulation LED also comprises the first joint sheet 411 and the second joint sheet 412 on base station 410, and bridge rectifier 430, this bridge rectifier 430 comprises the input terminal that couples with the first and second joint sheets and the lead-out terminal coupling with corresponding anode and the negative electrode contact point of ESD circuit 435 respectively.
Encapsulation LED can also comprise the optical sensor 420 on base station 410, and is connected to lead-in wire 424a, the 424b of optical sensor 420.
Encapsulation LED can also comprise the temperature sensor 433 on base station 410, and is connected to lead-in wire 434a, the 434b of temperature sensor 433.
This base station can comprise the silicon with the first conduction type, and esd protection circuit 435 can comprise have with the silicon submount 410 of the second conduction type of the first conductivity type opposite in doped region.
In other embodiments, as shown in Figure 23 C, esd protection circuit can omit from base station 410, and is included in monolithic and ties in the substrate 460 of LED450 more.
Embodiments of the invention can be used to many different luminous application, and particularly those use the luminous application of the high output light source of small size.Wherein some include but not limited to street lamp, architectural lighting, family and office lighting, display lighting and backlight.
Although the present invention be have been described in detail with reference to some preferred disposition of the present invention, other form is also possible.Therefore, the spirit and scope of the present invention should not be restricted to above-mentioned version.
Claims (19)
1. the monolithic electro-optical device (LED) of binding up one's hair, comprises more:
Base station;
Multiple sub-LED on base station, each in described multiple sub-LED comprises anode contact point and negative electrode contact point; And
Multiple conductive metal interconnect parts, couple with described sub-LED, and connect described sub-LED according to the predetermined arrangement that comprises many string LED that electricity is connected in series.
2. the monolithic according to claim 1 electro-optical device of binding up one's hair, also comprises the first string LED and the sub-LED of the second string more, and the sub-LED of this first string comprises anode contact point and negative electrode contact point, and the sub-LED of this second string comprises anode contact point and negative electrode contact point.
3. the monolithic according to claim 2 electro-optical device of binding up one's hair, wherein, comprises white light by the combined light of the first string LED and the sub-LED transmitting of the second string more.
4. the monolithic according to claim 2 electro-optical device of binding up one's hair, wherein, the sub-LED of the first string launches the light of the first color when by energizing quantity, and the sub-LED of the second string launch the light of going here and there the second different color of sub-LED from first when by energizing quantity more.
5. the monolithic according to claim 4 electro-optical device of binding up one's hair, wherein, the LED in the first string LED comprises active region structure, and the LED in the second string LED comprises the active region structure identical with LED in the first string LED more.
6. the monolithic according to claim 4 electro-optical device of binding up one's hair, wherein, the LED in the first string LED comprises the first phosphor, and the LED in the second string LED comprises second phosphor different from the first phosphor more.
7. the monolithic according to claim 6 electro-optical device of binding up one's hair, wherein, the first phosphor comprises red-emitting phosphor, and the second phosphor comprises green phosphor more.
8. the monolithic according to claim 1 electro-optical device of binding up one's hair, also comprises more:
Be used for the corresponding joint sheet of every a string sub-LED of the sub-LED of described many strings.
9. the monolithic according to claim 1 electro-optical device of binding up one's hair, wherein, the sub-LED electricity of respectively going here and there is connected in series, and does not use closing line between sub-LED more.
10. the light-emitting device (LED) through encapsulation, comprising:
Base station;
Monolithic on base station is tied LED more, and this monolithic is tied LED more and comprised:
Substrate,
Multiple sub-LED on base station, and
Multiple conductive metal interconnect parts, couple with sub-LED and according to the predetermined arrangement connexon LED that comprises anode contact point and negative electrode contact point;
In base station and with monolithic, tie the Zener device of LED coupled in parallel more; And
Tie the sealant material on LED at monolithic more.
11. encapsulating light emitting devices according to claim 10, also comprise:
The first and second joint sheets on base station; And
Bridge rectifier, comprises the input terminal coupling with the first and second joint sheets and the lead-out terminal coupling with corresponding anode and the negative electrode contact point of Zener device.
12. encapsulating light emitting devices according to claim 10, also comprise: the optical sensor on base station.
13. encapsulating light emitting devices according to claim 10, also comprise: the temperature sensor on base station.
14. encapsulating light emitting devices according to claim 10, wherein, sub-LED is connected in series between anode contact point and negative electrode contact point by electricity.
15. encapsulating light emitting devices according to claim 10, wherein, base station comprises the silicon with the first conduction type, and Zener device comprises the doped region in silicon submount having with the second conduction type of the first conductivity type opposite.
16. encapsulating light emitting devices according to claim 10, also comprise: the insulating barrier on base station and the multiple joint sheets on this insulating barrier, wherein, the first joint sheet in joint sheet extends through insulating barrier, and contacts with the doped region in silicon submount.
17. encapsulating light emitting devices according to claim 16, also comprise: second doped region with the second conduction type in silicon submount, wherein, the second joint sheet in joint sheet extends through insulating barrier, and contacts with the second doped region in silicon submount.
18. encapsulating light emitting devices according to claim 17, wherein, the first joint sheet is electrically connected with the anode contact point that monolithic is tied LED more, and the second joint sheet is electrically connected with the negative electrode contact point that monolithic is tied LED more.
19. encapsulating light emitting devices according to claim 10, wherein, sub-LED is connected according to described predetermined arrangement, and does not use closing line between sub-LED.
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/190,108 US20120049214A1 (en) | 2009-04-06 | 2011-07-25 | Monolithic Multi-Junction Light Emitting Devices Including Multiple Groups of Light Emitting Diodes |
| US13/190,126 | 2011-07-25 | ||
| US13/190,094 | 2011-07-25 | ||
| US13/190,108 | 2011-07-25 | ||
| US13/190,094 US9093293B2 (en) | 2009-04-06 | 2011-07-25 | High voltage low current surface emitting light emitting diode |
| US13/190,126 US8530921B2 (en) | 2009-04-06 | 2011-07-25 | High voltage low current surface emitting LED |
| PCT/US2012/048004 WO2013016355A1 (en) | 2011-07-25 | 2012-07-24 | Monolithic multi-junction light emitting devices including multiple groups of light emitting diodes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103782400A true CN103782400A (en) | 2014-05-07 |
Family
ID=47601498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201280042881.2A Pending CN103782400A (en) | 2011-07-25 | 2012-07-24 | Monolithic multi-junction light emitting devices including multiple groups of light emitting diodes |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103782400A (en) |
| WO (2) | WO2013016355A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107924661A (en) * | 2015-08-19 | 2018-04-17 | 韩国荪迪奥德公司 | The method for driving display |
| CN110235522A (en) * | 2016-07-28 | 2019-09-13 | 亮锐有限责任公司 | Dimming LED (Light Emitting Diode) circuit augmentation DC/DC controller IC |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102013101367A1 (en) | 2013-02-12 | 2014-08-14 | Osram Opto Semiconductors Gmbh | Semiconductor chip |
| US10959306B2 (en) * | 2016-07-28 | 2021-03-23 | Lumileds Llc | Dimming LED circuit augmenting DC/DC controller integrated circuit |
| US11373991B2 (en) * | 2020-02-06 | 2022-06-28 | Lumileds Llc | Methods of manufacturing light-emitting devices with metal inlays and bottom contacts |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1930695A (en) * | 2003-12-09 | 2007-03-14 | 克里公司 | Semiconductor light emitting devices and submounts and methods for forming the same |
| US20100252840A1 (en) * | 2009-04-06 | 2010-10-07 | Cree, Inc. | High voltage low current surface emitting led |
| CN101859758A (en) * | 2009-04-06 | 2010-10-13 | 美商克立股份有限公司 | High voltage low current surface emitting LED |
| CN101889345A (en) * | 2007-12-07 | 2010-11-17 | 奥斯兰姆有限公司 | Substrate for an led submount, and led submount |
| CN101930972A (en) * | 2009-06-23 | 2010-12-29 | 西铁城电子股份有限公司 | Light-emitting diode assembly |
| US20110006312A1 (en) * | 2009-07-07 | 2011-01-13 | Epistar Corporation | Light-emitting device |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6547249B2 (en) * | 2001-03-29 | 2003-04-15 | Lumileds Lighting U.S., Llc | Monolithic series/parallel led arrays formed on highly resistive substrates |
| JP2004127988A (en) * | 2002-09-30 | 2004-04-22 | Toyoda Gosei Co Ltd | White light emitting device |
| US7518158B2 (en) * | 2003-12-09 | 2009-04-14 | Cree, Inc. | Semiconductor light emitting devices and submounts |
| WO2008031280A1 (en) * | 2006-09-13 | 2008-03-20 | Helio Optoelectronics Corporation | Light emitting diode structure |
| US7964888B2 (en) * | 2007-04-18 | 2011-06-21 | Cree, Inc. | Semiconductor light emitting device packages and methods |
| GB0721957D0 (en) * | 2007-11-08 | 2007-12-19 | Photonstar Led Ltd | Ultra high thermal performance packaging for optoelectronics devices |
| KR100982986B1 (en) * | 2008-04-17 | 2010-09-17 | 삼성엘이디 주식회사 | Submount, LED Package and Manufacturing Method Thereof |
| US8611057B2 (en) * | 2008-09-09 | 2013-12-17 | Inshore Holdings, Llc | LED module for sign channel letters and driving circuit |
| US10290788B2 (en) * | 2009-11-24 | 2019-05-14 | Luminus Devices, Inc. | Systems and methods for managing heat from an LED |
-
2012
- 2012-07-24 CN CN201280042881.2A patent/CN103782400A/en active Pending
- 2012-07-24 WO PCT/US2012/048004 patent/WO2013016355A1/en active Application Filing
- 2012-07-24 WO PCT/US2012/047992 patent/WO2013016346A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1930695A (en) * | 2003-12-09 | 2007-03-14 | 克里公司 | Semiconductor light emitting devices and submounts and methods for forming the same |
| CN101889345A (en) * | 2007-12-07 | 2010-11-17 | 奥斯兰姆有限公司 | Substrate for an led submount, and led submount |
| US20100252840A1 (en) * | 2009-04-06 | 2010-10-07 | Cree, Inc. | High voltage low current surface emitting led |
| CN101859758A (en) * | 2009-04-06 | 2010-10-13 | 美商克立股份有限公司 | High voltage low current surface emitting LED |
| CN101930972A (en) * | 2009-06-23 | 2010-12-29 | 西铁城电子股份有限公司 | Light-emitting diode assembly |
| US20110006312A1 (en) * | 2009-07-07 | 2011-01-13 | Epistar Corporation | Light-emitting device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107924661A (en) * | 2015-08-19 | 2018-04-17 | 韩国荪迪奥德公司 | The method for driving display |
| CN110235522A (en) * | 2016-07-28 | 2019-09-13 | 亮锐有限责任公司 | Dimming LED (Light Emitting Diode) circuit augmentation DC/DC controller IC |
| CN110235522B (en) * | 2016-07-28 | 2022-01-14 | 亮锐控股有限公司 | Dimming LED circuit amplification DC/DC controller integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2013016355A1 (en) | 2013-01-31 |
| WO2013016346A1 (en) | 2013-01-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101859758B (en) | High voltage low current surface emitting LED | |
| US9093293B2 (en) | High voltage low current surface emitting light emitting diode | |
| US8476668B2 (en) | High voltage low current surface emitting LED | |
| US10347804B2 (en) | Light source package and display device including the same | |
| CN103339729B (en) | High voltage is without wire bond LED | |
| CN100487932C (en) | Light emitting device with multiple light emitting units and package for mounting the same light emitting device | |
| US8742438B2 (en) | Semiconductor light-emitting device, method for manufacturing the same, and light-emitting apparatus including the same | |
| US8089074B2 (en) | Light emitting device having vertically stacked light emitting diodes | |
| US20120049214A1 (en) | Monolithic Multi-Junction Light Emitting Devices Including Multiple Groups of Light Emitting Diodes | |
| CN109429532A (en) | Light emitting device package and light source equipment | |
| KR20060087620A (en) | Light emitting device having a plurality of light emitting cells and package mounting the same | |
| CN109757120A (en) | Light emitting device package | |
| CN103782400A (en) | Monolithic multi-junction light emitting devices including multiple groups of light emitting diodes | |
| CN105529385A (en) | Light emitting device, light emitting device package, and lighting apparatus including the package | |
| JP2020533778A (en) | Light emitting element package | |
| US8455882B2 (en) | High efficiency LEDs | |
| US20210305475A1 (en) | Light emitting device package and light source module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140507 |