CN103747559B - Adopt the flyback topology structure circuit that former limit controls - Google Patents
Adopt the flyback topology structure circuit that former limit controls Download PDFInfo
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- CN103747559B CN103747559B CN201310613120.4A CN201310613120A CN103747559B CN 103747559 B CN103747559 B CN 103747559B CN 201310613120 A CN201310613120 A CN 201310613120A CN 103747559 B CN103747559 B CN 103747559B
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Abstract
The invention discloses a kind of flyback topology structure circuit adopting former limit to control, integrating circuit is connected on peak current comparator, peak current comparator is connected on inductive energy storage circuit, the bridge rectifier output of inductive energy storage circuit is connected on the first former limit of transformer, the other end on the first former limit is connected on the source electrode of N-type field effect transistor, one end ground connection on the second former limit of transformer, the other end is in series with resistance R1 and resistance R2, the common port of resistance R1 and resistance R2 is connected on peak current comparator, grid and the drain electrode of N-type field effect transistor are all connected on peak comparator, the drain electrode of N-type field effect transistor is connected to the ground by resistance R3, secondary one end ground connection of transformer, the other end is connected with the anode of diode D5, electric capacity is connected with between the earth terminal of secondary and the negative electrode of diode D5.Its advantage is: make this circuit design can be used for chip internal integrated, has nothing to do with peripheral chip parameter, reduces development difficulty.
Description
Technical field
The present invention relates to semiconductor integrated circuit field, relate to a kind of flyback topology structure circuit adopting former limit to control in particular.
Background technology
In recent years because the environmental protection consciousness in the whole world progressively improves, LED illumination product obtains exploitation energetically, and starts to come into huge numbers of families gradually.In LED illumination product, the LED drive power circuit of AC-DC provides power supply for LED, and due to LED(Light Emitting Diode) be current mode device, luminosity affects comparatively large by electric current, therefore LED drive power needs for LED provides stable constant current to export.
Extensively adopt critical current conduction mode (BCM) and cutout control model (DCM) to realize constant current output in current LED illumination power drives to control.In order to realize higher power-efficient, some power drives chips have employed quasi-resonance control model, a kind of control model between BCM and DCM.
This according to different current conduction mode and the system topology that adopts, need different control chips to have employed various different constant current algorithm and circuit to realize output constant current.These different algorithms and circuit considerably increase cycle and the complexity of chip research and development, and the open loop constant current algorithm simultaneously had also brings low precision, problem such as difference line regulation and load regulation etc.
Summary of the invention
The invention provides a kind of flyback topology structure circuit adopting former limit to control, it adopts the flyback topology structure circuit of the quasi-resonance control model controlled with former limit, and circuit is simple, makes this circuit design can be used for chip internal integrated, have nothing to do with peripheral chip parameter, reduce development difficulty.
For solving above-mentioned technical problem, the present invention by the following technical solutions:
Adopt the flyback topology structure circuit that former limit controls, it comprises integrating circuit, described integrating circuit is connected on peak current comparator, described peak current comparator is connected on inductive energy storage circuit, described inductive energy storage circuit is connected on the input of integrating circuit, described inductive energy storage circuit comprises bridge rectifier and transformer, described bridge rectifier output is connected on the first former limit Np of transformer, the other end of the first former limit Np is connected on the source electrode of N-type field effect transistor, one end ground connection of the second former limit Na of described transformer, the other end is in series with resistance R1 and resistance R2, described resistance R1 and the common port of resistance R2 are connected on peak current comparator, grid and the drain electrode of described N-type field effect transistor are all connected on peak comparator, the drain electrode of described N-type field effect transistor is connected to the ground by resistance R3, secondary Ns one end ground connection of described transformer, the other end is connected with the anode of diode D5, electric capacity Cout is connected with between the earth terminal of described secondary Ns and the negative electrode of diode D5.
Further technical scheme is:
Described peak current comparator comprises operational amplifier A 2, trigger, trailing edge testing circuit and drive circuit, the in-phase input end of described operational amplifier A 2 is connected in the drain electrode of N-type field effect transistor, the output of described operational amplifier A 2 is connected on the S end of trigger, described trailing edge testing circuit and drive circuit be connected to trigger R end and Q end on, described drive circuit is connected on the grid of N-type field effect transistor, and described trailing edge testing circuit is connected on the common port of resistance R1 and resistance R2.
Described integrating circuit comprises single-pole double-throw switch (SPDT) S1, resistance R6, resistance R5, operational amplifier A 1 and P type field effect transistor, the output of described computing operational amplifier A 1 is connected on the grid of P type field effect transistor, and the inverting input of described operational amplifier A 1 is connected to by electric capacity C1 on the source electrode of P type field effect transistor; Described resistance R6 is parallel with electric capacity C2, and one end is connected to the source electrode of P type field effect transistor by resistance R5, other end ground connection, two of described single-pole double-throw switch (SPDT) S1 not moved end be connected with the source electrode of ground with P type field effect transistor respectively, the moved end of described single-pole double-throw switch (SPDT) S1 is connected on the inverting input of operational amplifier A 1 by resistance R4.
Described resistance R6 and the ratio of resistance R5 are 3.
Compared with prior art, the invention has the beneficial effects as follows:
The flyback topologies structure of the quasi-resonance control model that the present invention's employing controls with former limit, this circuit is simple, makes this circuit design can be used for chip internal integrated, has nothing to do with peripheral chip parameter, reduces development difficulty.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
Fig. 1 is peak current comparator of the present invention and inductive energy storage circuit connection circuit figure.
Fig. 2 is the circuit diagram of integrating circuit of the present invention.
Fig. 3 is the theory diagram of peak current comparator of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further illustrated.Embodiments of the present invention include but not limited to the following example.
[embodiment]
The flyback topology structure circuit that the former limit of employing as shown in Figure 1 controls, it comprises integrating circuit, described integrating circuit is connected on peak current comparator, described peak current comparator is connected on inductive energy storage circuit, described inductive energy storage circuit is connected on the input of integrating circuit, described inductive energy storage circuit comprises bridge rectifier and transformer, described bridge rectifier output is connected on the first former limit Np of transformer, the other end of the first former limit Np is connected on the source electrode of N-type field effect transistor, one end ground connection of the second former limit Na of described transformer, the other end is in series with resistance R1 and resistance R2, described resistance R1 and the common port of resistance R2 are connected on peak current comparator, grid and the drain electrode of described N-type field effect transistor are all connected on peak comparator, the drain electrode of described N-type field effect transistor is connected to the ground by resistance R3, secondary Ns one end ground connection of described transformer, the other end is connected with the anode of diode D5, electric capacity Cout is connected with between the earth terminal of described secondary Ns and the negative electrode of diode D5.
Described peak current comparator comprises operational amplifier A 2, trigger, trailing edge testing circuit and drive circuit, the in-phase input end of described operational amplifier A 2 is connected in the drain electrode of N-type field effect transistor, the output of described operational amplifier A 2 is connected on the S end of trigger, described trailing edge testing circuit and drive circuit be connected to trigger R end and Q end on, described drive circuit is connected on the grid of N-type field effect transistor, and described trailing edge testing circuit is connected on the common port of resistance R1 and resistance R2.
Described integrating circuit comprises single-pole double-throw switch (SPDT) S1, resistance R6, resistance R5, operational amplifier A 1 and P type field effect transistor, the output of described computing operational amplifier A 1 is connected on the grid of P type field effect transistor, and the inverting input of described operational amplifier A 1 is connected to by electric capacity C1 on the source electrode of P type field effect transistor; Described resistance R6 is parallel with electric capacity C2, and one end is connected to the source electrode of P type field effect transistor by resistance R5, other end ground connection, two of described single-pole double-throw switch (SPDT) S1 not moved end be connected with the source electrode of ground with P type field effect transistor respectively, the moved end of described single-pole double-throw switch (SPDT) S1 is connected on the inverting input of operational amplifier A 1 by resistance R4.
Described resistance R6 and the ratio of resistance R5 are 3.
The operation principle of the present embodiment is as follows:
Load is connected in parallel on electric capacity Cout, and reg_ctrl signal controls single-pole double-throw switch (SPDT) S1, controls to make the voltage of the normal phase input end of operational amplifier A 1 and inverting input equal to the duty ratio of single-pole double-throw switch (SPDT) S1.Reg_ctrl signal is input to the reference voltage V ref for generation of operational amplifier A 2 inverting input in integrating circuit.The normal phase input end of amplifier is connected on Vbg power supply, and when reg-ctrl signal is high level, single-pole double-throw switch (SPDT) S1 is connected to the source electrode of P type field effect transistor, when reg-ctrl signal is low level, and single-pole double-throw switch (SPDT) S1 ground connection.The control of reg-ctrl signal to integrating circuit makes the output Vx=Vbg/* ((Ton+Toff)/Ton) of the source electrode of P type field effect transistor, and Vref is R6, the dividing potential drop of R7 and C4 and filtering export Vref=Vbg/4* ((Ton+Toff)/Ton), are constant.This circuit can detect resonance time, current lead-through Toff and the Ton time of secondary Ns accurately can be obtained in conjunction with former limit Continuity signal, namely required reg_ctrl signal, is input to reg_ctrl signal in integrating circuit and can obtains required Vref, final current constant position I=1/8*Vbg/R3.As can be seen here, user only need select suitable resistance R3 and input Vbg power supply can realize, with the constant current output that other conditions are irrelevant by the current value needed for LED.
Be embodiments of the invention as mentioned above.The present invention is not limited to above-mentioned execution mode, and anyone should learn the structural change made under enlightenment of the present invention, and every have identical or close technical scheme with the present invention, all falls within protection scope of the present invention.
Claims (1)
1. adopt the flyback topology structure circuit that former limit controls, it is characterized in that: it comprises integrating circuit, described integrating circuit is connected on peak current comparator, described peak current comparator is connected on inductive energy storage circuit, described inductive energy storage circuit is connected on the input of integrating circuit, described inductive energy storage circuit comprises bridge rectifier and transformer, described bridge rectifier output is connected on the first former limit Np of transformer, the other end of the first former limit Np is connected on the source electrode of N-type field effect transistor, one end ground connection of the second former limit Na of described transformer, the other end is in series with resistance R1 and resistance R2, described resistance R1 and the common port of resistance R2 are connected on peak current comparator, grid and the drain electrode of described N-type field effect transistor are all connected on peak comparator, the drain electrode of described N-type field effect transistor is connected to the ground by resistance R3, secondary Ns one end ground connection of described transformer, the other end is connected with the anode of diode D5, electric capacity Cout is connected with between the earth terminal of described secondary Ns and the negative electrode of diode D5, described peak current comparator comprises operational amplifier A 2, trigger, trailing edge testing circuit and drive circuit, the in-phase input end of described operational amplifier A 2 is connected in the drain electrode of N-type field effect transistor, the output of described operational amplifier A 2 is connected on the S end of trigger, described trailing edge testing circuit and drive circuit be connected to trigger R end and Q end on, described drive circuit is connected on the grid of N-type field effect transistor, described trailing edge testing circuit is connected on the common port of resistance R1 and resistance R2, described integrating circuit comprises single-pole double-throw switch (SPDT) S1, resistance R6, resistance R5, operational amplifier A 1 and P type field effect transistor, the output of described computing operational amplifier A 1 is connected on the grid of P type field effect transistor, the inverting input of described operational amplifier A 1 is connected to by electric capacity C1 on the source electrode of P type field effect transistor, described resistance R6 is parallel with electric capacity C2, and one end is connected to the source electrode of P type field effect transistor by resistance R5, other end ground connection, two of described single-pole double-throw switch (SPDT) S1 not moved end be connected with the source electrode of ground with P type field effect transistor respectively, the moved end of described single-pole double-throw switch (SPDT) S1 is connected to by resistance R4 on the inverting input of operational amplifier A 1, and described resistance R6 and the ratio of resistance R5 are 3.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310613120.4A CN103747559B (en) | 2013-11-28 | 2013-11-28 | Adopt the flyback topology structure circuit that former limit controls |
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| CN201310613120.4A CN103747559B (en) | 2013-11-28 | 2013-11-28 | Adopt the flyback topology structure circuit that former limit controls |
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| CN103747559A CN103747559A (en) | 2014-04-23 |
| CN103747559B true CN103747559B (en) | 2015-07-29 |
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| AU2002253775A1 (en) * | 2002-04-19 | 2003-11-11 | Perkinelmer Singapore Pte Ltd. | Trigger circuit for an electronic flash device |
| CN101835314B (en) * | 2010-05-19 | 2013-12-04 | 成都芯源系统有限公司 | LED drive circuit with dimming function and lamp |
| CN102685982A (en) * | 2012-04-10 | 2012-09-19 | 苏州聚元微电子有限公司 | Primary side feedback constant current control circuit |
| CN103166465B (en) * | 2013-04-09 | 2016-06-01 | 上海晶丰明源半导体有限公司 | line input voltage compensation circuit |
| CN203574911U (en) * | 2013-11-28 | 2014-04-30 | 成都岷创科技有限公司 | Primary-side-control flyback topology circuit |
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Effective date of registration: 20160418 Address after: 201204 Zhang Heng road Shanghai, Pudong New Area Zhangjiang hi tech Park Lane 666 No. 2 floor 504-511 room 5 Patentee after: Shanghai Bright Power Semiconductor Co.,Ltd. Address before: West high tech Zone Fucheng Road in Chengdu city of Sichuan province 610000 399 No. 6 Building 1 unit 10 floor No. 2 Patentee before: Chengdu Minchuang Science & Technology Co., Ltd. |
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Address after: 5 room 504-511, room 2, Lane 666, Zhang Heng Road, Pudong New Area, China (Shanghai) free trade zone, Shanghai, China () Patentee after: Shanghai semiconducto Limited by Share Ltd Address before: 201204 Zhang Heng road Shanghai, Pudong New Area Zhangjiang hi tech Park Lane 666 No. 2 floor 504-511 room 5 Patentee before: Shanghai Bright Power Semiconductor Co.,Ltd. |