CN103745952B - With the preparation method of the mixed crystal substrate of insulating buried layer - Google Patents

With the preparation method of the mixed crystal substrate of insulating buried layer Download PDF

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Publication number
CN103745952B
CN103745952B CN201310724870.9A CN201310724870A CN103745952B CN 103745952 B CN103745952 B CN 103745952B CN 201310724870 A CN201310724870 A CN 201310724870A CN 103745952 B CN103745952 B CN 103745952B
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layer
device layer
substrate
crystal orientation
preparation
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CN103745952A (en
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魏星
陈达
薛忠营
狄增峰
方子韦
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Shanghai Simgui Technology Co Ltd
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Shanghai Simgui Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283Lateral isolation by refilling of trenches with dielectric material

Abstract

The invention provides a kind of preparation method of the mixed crystal substrate with insulating buried layer, comprise the steps: to provide the first substrate and the second substrate, described first substrate comprises the first supporting layer, the first buried regions of the first support layer surface and first device layer on the first buried regions surface, described first device layer has the first crystal orientation, described second substrate comprises the second supporting layer, the second buried regions of the second support layer surface and second device layer on the second buried regions surface, and described second device layer has the second crystal orientation; Separator is formed on the surface of the first device layer and/or the second device layer; Take separator as intermediate layer, by the first substrate together with the second substrate bonding; Remove the second supporting layer and the second buried regions; Window is formed, to expose the first device layer in the second device layer and separator; Epitaxial growth the 3rd device layer in the window, described 3rd device layer has the first crystal orientation.The invention has the advantages that two kinds of crystal mass that can improve in mixed crystal substrate.

Description

With the preparation method of the mixed crystal substrate of insulating buried layer
Technical field
The present invention relates to field of semiconductor materials, particularly relate to a kind of preparation method of the mixed crystal substrate with insulating buried layer.
Background technology
Isolate supports (SOI) substrate, as a kind of semi-conducting material with insulating buried layer, is regarded as one of important materials of future microelectronics technical development.
In the prior art, the top layer silicon of SOI substrate is all single crystal orientation, and such as patent CN101996922A discloses a kind of SOI wafer and forming method thereof, and its top silicon layer is the silicon layer in single crystal orientation.And crystallographic orientation novel channel material and Platform integration, thus make full use of ripe silicon microelectronic technique and equipment, become one of trend of current integrated circuit development.Different components can be prepared on the material of particular crystal orientation by we, plays the advantage of particular crystal orientation separately.Such as: we can make NFET on the surface at (l00), and prepare PFET on the surface in (110), such as described in patent CN1681124A, first kind transistor is formed in the substrate surface in the first crystal orientation, and the transistor of Second Type is formed in the substrate surface in the second crystal orientation.(100) crystal orientation provides and has high performance NFET, and (110) crystal orientation provides and has high performance PFET.But the mode be prepared in by different components on the material of different crystal orientations must need a kind of backing material that can comprise multiple crystal orientation, i.e. so-called mixed crystal substrate.But comprise different crystal orientations in a substrate and will certainly influence each other, cause serious lattice adaptive, cause crystal mass to decline.
Therefore, it is possible to propose a kind of method preparing high-quality mixed crystal SOI substrate, it is prior art urgent problem.
Summary of the invention
Technical problem to be solved by this invention is, provides a kind of preparation method of the mixed crystal substrate with insulating buried layer, can improve two kinds of crystal mass in mixed crystal substrate.
In order to solve the problem, the invention provides a kind of preparation method of the mixed crystal substrate with insulating buried layer, comprise the steps: to provide the first substrate and the second substrate, described first substrate comprises the first supporting layer, the first buried regions of the first support layer surface and first device layer on the first buried regions surface, described first device layer has the first crystal orientation, described second substrate comprises the second supporting layer, the second buried regions of the second support layer surface and second device layer on the second buried regions surface, and described second device layer has the second crystal orientation; Separator is formed on the surface of the first device layer and/or the second device layer; Take separator as intermediate layer, by the first substrate together with the second substrate bonding; Remove the second supporting layer and the second buried regions; Window is formed, to expose the first device layer in the second device layer and separator; Epitaxial growth the 3rd device layer in the window, described 3rd device layer has the first crystal orientation.
Optionally, form window in the second device layer and separator after, the surface being included in window sidewall and the second device layer further forms the step of protective layer.
Optionally, the material of described protective layer is selected from any one in silica and silicon nitride.
Optionally, comprise the steps: further to form groove in the interface of the 3rd device layer and the second device layer after formation the 3rd device layer; Fill described groove, form side wall.
Optionally, described first crystal orientation is (100) crystal orientation, and the second crystal orientation is (110) crystal orientation.
Optionally, described first crystal orientation is (110) crystal orientation, and the second crystal orientation is (100) crystal orientation.
Optionally, after formation the 3rd device layer, comprise the step on the surface of polishing second device layer and the 3rd device layer further.
The invention has the advantages that, the 3rd device layer in mixed crystal is by the direct epitaxial growth of the first device layer comes, and the lattice of the second device layer is not affected in whole technological processes, therefore improves two kinds of crystal mass in mixed crystal substrate.
Accompanying drawing explanation
Accompanying drawing 1 is the implementation step schematic diagram of the specific embodiment of the invention.
It is the process schematic representation of the specific embodiment of the invention shown in accompanying drawing 2A to accompanying drawing 2J.
Embodiment
Elaborate below in conjunction with the embodiment of accompanying drawing to the preparation method of the mixed crystal substrate with insulating buried layer provided by the invention.
Accompanying drawing 1 is the implementation step schematic diagram of the specific embodiment of the invention, comprise: step S10, first substrate and the second substrate are provided, described first substrate comprises the first supporting layer, the first buried regions of the first support layer surface and first device layer on the first buried regions surface, described first device layer has the first crystal orientation, described second substrate comprises the second supporting layer, the second buried regions of the second support layer surface and second device layer on the second buried regions surface, and described second device layer has the second crystal orientation; Step S11, forms separator on the surface of the first device layer and/or the second device layer; Step S12 take separator as intermediate layer, by the first substrate together with the second substrate bonding; Step S13, removes the second supporting layer and the second buried regions; Step S14, forms window in the second device layer and separator, to expose the first device layer; Step S15, forms protective layer on the surface of window sidewall and the second device layer; Step S16, in the window epitaxial growth the 3rd device layer, described 3rd device layer has the first crystal orientation; Step S17, the surface of polishing second device layer and the 3rd device layer; Step S18, forms groove in the interface of the 3rd device layer and the second device layer; Step S19, fills described groove, forms side wall.
It is the process schematic representation of the specific embodiment of the invention shown in accompanying drawing 2A to accompanying drawing 2J.
Shown in accompanying drawing 2A, refer step S10, first substrate 10 and the second substrate 20 is provided, described first substrate 10 comprises first buried regions 12 on the first supporting layer 11, first supporting layer 11 surface and first device layer 13 on the first buried regions surface 12, described first device layer 13 has the first crystal orientation, described second substrate 20 comprises second buried regions 22 on the second supporting layer 21, second supporting layer 21 surface and second device layer 23 on the second buried regions 22 surface, and described second device layer 23 has the second crystal orientation.
Described first substrate 10 and the second substrate 20 can be the SOI materials adopting isolation from oxygen injection (SIMOX) technique to prepare.
The material of described first supporting layer 11 can be comprise any one common semi-conducting materials such as monocrystalline silicon, sapphire and carborundum, and this embodiment is monocrystalline silicon.The material of described first buried regions 12 can be silica or silicon nitride, and this embodiment is silica.The material of described first device layer 13 can be any one common semi-conducting materials such as monocrystalline silicon, monocrystalline germanium, germanium silicon, and this embodiment is monocrystalline silicon, and the first crystal orientation is (100) crystal orientation.
The material of described second supporting layer 21 can be comprise any one common semi-conducting materials such as monocrystalline silicon, sapphire and carborundum, and this embodiment is monocrystalline silicon.The material of described second buried regions 22 can be silica or silicon nitride, and this embodiment is silica.The material of described second device layer 23 can be any one common semi-conducting materials such as monocrystalline silicon, monocrystalline germanium, germanium silicon, and this embodiment is monocrystalline silicon, and the second crystal orientation is (110) crystal orientation.
Shown in accompanying drawing 2B, refer step S11, forms separator 40 on the surface of the first device layer 13 and/or the second device layer 23.The surface that this embodiment is selected at the first device layer 13 forms separator 40, in other embodiment, also can be form separator 40 on the surface of the second device layer 23, or all form separator on the surface of the first device layer 13 and the second device layer 23.Bond strength is strengthened in the effect that separator 40 plays, and isolation has the first device layer 13 and the second device layer 23 of different crystal orientations, avoids both to produce defect in interface due to lattice mismatch.Therefore the material of separator 40 can be silica or silicon nitride etc., this embodiment is silica.
Shown in accompanying drawing 2C, refer step S12, with separator 40 for intermediate layer, is bonded together the first substrate 10 and the second substrate 20.Bonding can adopt electrostatic bonding or plasmaassisted bonding etc.
Shown in accompanying drawing 2D, refer step S13, removes the second supporting layer 21 and the second buried regions 22.The method removing said structure of dry etching or wet etching can be adopted.Also thinning second supporting layer 21 of the method for grinding can first be adopted, to reduce the time of subsequent corrosion.
Shown in accompanying drawing 2E, refer step S14, forms window in the second device layer 23 and separator 40, to expose the first device layer 13.Forming window can adopt the method for photoetching to form mask layer (not shown), and adopts the second device layer 23 and the separator 40 at the method removing window place of dry etching or wet etching, to the surface exposing the first device layer 13.
Shown in accompanying drawing 2F, refer step S15, forms protective layer 50 at the sidewall of window and the surface of the second device layer 23.This step is optional step.Need by window grown epitaxial layer due to follow-up, and the crystal orientation of epitaxial loayer and the second device layer 23 are different, the protective layer 50 therefore on sidewall is conducive to preventing from producing defect due to lattice mismatch between the two.The protective layer on the second device layer 23 surface can prevent the surface of the second device layer 23 from also continuing epitaxial growth and being thickened.
Shown in accompanying drawing 2G, refer step S16, in the window epitaxial growth the 3rd device layer 33, described 3rd device layer 33 has the first crystal orientation.Because the 3rd device layer 33 grows from the first device layer 13, therefore both should have identical crystal orientation.So far, with insulating buried layer mixed crystal substrate and prepared, the first buried regions 12 is described insulating buried layer, and second device layer 23 on its surface has the second crystal orientation, and the 3rd device layer 33 has the first crystal orientation.3rd device layer 33 is by the first device layer 13 directly epitaxial growth come, and therefore crystal mass is higher.Follow-up step is optional step, is intended to reduce the defect of above-mentioned mixed crystal substrate or improves its surface smoothness.
Shown in accompanying drawing 2H, refer step S17, the surface of polishing second device layer 23 and the 3rd device layer 33.The surface being difficult to control the 3rd device layer 33 and the second device layer 23 due to epitaxial growth is in same level, therefore can carry out polishing to its surface.If there is growth protecting layer 50 before, this step can also play the effect of the protective layer 50 on removal second device layer 23 surface further.
Shown in accompanying drawing 2I, step S18, forms groove in the interface of the 3rd device layer 33 and the second device layer 23.The mode of photoetching can be adopted to form mask layer (not shown), and adopt the method for dry etching or wet etching to form groove 60.
Shown in accompanying drawing 2J, step S19, fills described groove, forms side wall 70.The packing material of this step can be silica or silicon nitride.Because protective layer 50 is formed on sidewall, thickness is restricted, and in order to ensure the isolation effect of the 3rd device layer 33 and the second device layer 23, can select again to form side wall 70 and isolating both.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (7)

1., with a preparation method for the mixed crystal substrate of insulating buried layer, it is characterized in that, comprise the steps:
First substrate and the second substrate are provided, described first substrate comprises the first supporting layer, the first buried regions of the first support layer surface and first device layer on the first buried regions surface, described first device layer has the first crystal orientation, described second substrate comprises the second supporting layer, the second buried regions of the second support layer surface and second device layer on the second buried regions surface, and described second device layer has the second crystal orientation;
Separator is formed on the surface of the first device layer and/or the second device layer;
Take separator as intermediate layer, by the first substrate together with the second substrate bonding;
Remove the second supporting layer and the second buried regions;
Window is formed, to expose the first device layer in the second device layer and separator;
Epitaxial growth the 3rd device layer in the window, described 3rd device layer has the first crystal orientation.
2. the preparation method of the mixed crystal substrate with insulating buried layer according to claim 1, is characterized in that, form window in the second device layer and separator after, the surface being included in window sidewall and the second device layer further forms the step of protective layer.
3. the preparation method of the mixed crystal substrate with insulating buried layer according to claim 2, is characterized in that, the material of described protective layer be selected from silica and silicon nitride any one.
4. the preparation method of the mixed crystal substrate with insulating buried layer according to claim 1, is characterized in that, comprises the steps: further after formation the 3rd device layer
Groove is formed in the interface of the 3rd device layer and the second device layer;
Fill described groove, form side wall.
5. the preparation method of the mixed crystal substrate with insulating buried layer according to claim 1, is characterized in that, described first crystal orientation is (100) crystal orientation, and the second crystal orientation is (110) crystal orientation.
6. the preparation method of the mixed crystal substrate with insulating buried layer according to claim 1, is characterized in that, described first crystal orientation is (110) crystal orientation, and the second crystal orientation is (100) crystal orientation.
7. the preparation method of the mixed crystal substrate with insulating buried layer according to claim 1, is characterized in that, comprises the step on the surface of polishing second device layer and the 3rd device layer after formation the 3rd device layer further.
CN201310724870.9A 2013-12-25 2013-12-25 With the preparation method of the mixed crystal substrate of insulating buried layer Active CN103745952B (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101692440A (en) * 2009-10-13 2010-04-07 上海新傲科技股份有限公司 Mixed crystal orientation strain silicon substrate and method for preparing same
CN101692436A (en) * 2009-10-13 2010-04-07 上海新傲科技股份有限公司 Method for preparing mixed crystal orientation strain silicon substrate with insulated buried layer
CN102768983A (en) * 2012-07-12 2012-11-07 上海新傲科技股份有限公司 Method for preparing mixed crystal orientation substrate with insulating buried layer
CN102790004A (en) * 2011-05-16 2012-11-21 中国科学院上海微系统与信息技术研究所 Preparation method of full-isolation mixed crystal orientation crystal orientation silicon-on-insulator (SOI)
CN103295951A (en) * 2012-02-27 2013-09-11 中国科学院上海微系统与信息技术研究所 Device system structure and preparing method based on mixed crystal orientation SOI

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050116290A1 (en) * 2003-12-02 2005-06-02 De Souza Joel P. Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101692440A (en) * 2009-10-13 2010-04-07 上海新傲科技股份有限公司 Mixed crystal orientation strain silicon substrate and method for preparing same
CN101692436A (en) * 2009-10-13 2010-04-07 上海新傲科技股份有限公司 Method for preparing mixed crystal orientation strain silicon substrate with insulated buried layer
CN102790004A (en) * 2011-05-16 2012-11-21 中国科学院上海微系统与信息技术研究所 Preparation method of full-isolation mixed crystal orientation crystal orientation silicon-on-insulator (SOI)
CN103295951A (en) * 2012-02-27 2013-09-11 中国科学院上海微系统与信息技术研究所 Device system structure and preparing method based on mixed crystal orientation SOI
CN102768983A (en) * 2012-07-12 2012-11-07 上海新傲科技股份有限公司 Method for preparing mixed crystal orientation substrate with insulating buried layer

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