CN103745939B - Packaging structure forming method - Google Patents
Packaging structure forming method Download PDFInfo
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- CN103745939B CN103745939B CN201310654106.9A CN201310654106A CN103745939B CN 103745939 B CN103745939 B CN 103745939B CN 201310654106 A CN201310654106 A CN 201310654106A CN 103745939 B CN103745939 B CN 103745939B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
Abstract
The invention discloses a packaging structure forming method. The forming method comprises the following steps: a lead frame metal layer is provided; the lead frame metal layer is etched to form a plurality of discrete pins, wherein an opening is formed between every two neighboring pins; the openings are filled with plastic packaged materials to form a first plastic packaged layer; metal bumps are formed on surfaces of the pins; a semiconductor chip is provided, wherein bonding pads are formed on the surface of the semiconductor chip, and a solder layer is formed on the bonding pads; and the semiconductor chip is arranged over the pins in a flipping manner, and the solder layer on the semiconductor chip and the metal bump are soldered together. According to the packaging structure formed through the method of the invention, advantages of small occupied size and high integration level can be realized.
Description
Technical field
The present invention relates to field of semiconductor package, particularly to a kind of forming method of encapsulating structure.
Background technology
Towards miniaturization, portable, the ultrathin with electronic product such as mobile phone, notebook computer etc., multimedization and
The inexpensive direction meeting public demand is developed, the packing forms of high density, high-performance, high reliability and low cost and its assembling
Technology has obtained quick development.With expensive BGA（Ball Grid Array）Compare Deng packing forms, in recent years soon
The novel encapsulated technology of speed development, such as four side flat non-pin QFN（Quad Flat No-leadPackage）Encapsulation, due to it
There is good hot property and electrical property, size be little, low cost and high production rate etc. are numerous, caused microelectronics envelope
One new revolution of dress technical field.
Fig. 1 is the structural representation of existing QFN encapsulating structure, and described QFN encapsulating structure includes：Semiconductor chip 14,
On described semiconductor chip 14, there is pad 15；Pin 16（Lead frame）, described pin 16 is around described semiconductor chip 14
Surrounding arrangement；Plain conductor 17, plain conductor 17 is by the pad 15 of semiconductor chip 14 and around described semiconductor chip 14
Pin 16 electrically connect；Capsulation material 18, semiconductor chip 15, metal wire 17 and pin 16 are sealed by described capsulation material 18,
The surface exposure of pin 16 in the bottom surface of capsulation material, realizes being electrically connected of semiconductor chip 14 and external circuit by pin 16
Connect.
The volume that existing encapsulating structure occupies is larger, is unfavorable for the raising of encapsulating structure integrated level.
Content of the invention
The problem that the present invention solves is how to improve the integrated level of encapsulating structure.
For solving the above problems, the invention provides a kind of forming method of encapsulating structure, including：Leadframe metal is provided
Layer；Etch described leadframe metal layer, form some discrete pins, there is between adjacent leads opening；In described opening
The full capsulation material of filling, forms the first plastic packaging layer；Form metal coupling on the surface of described pin；Semiconductor chip, institute are provided
The surface stating semiconductor chip is formed with pad, and described pad is formed with solder layer；Semiconductor chip is inverted on pin
Side, the solder layer on semiconductor chip and metal coupling are welded together.
Optionally, the forming process of described pin is：Described leadframe metal layer includes first surface and and first surface
Relative second surface, the first surface of etch lead frame metal level, form some first openings in leadframe metal layer；Carve
The second surface of erosion leadframe metal layer, forms some second openings, the first opening and the second opening in leadframe metal layer
Mutually run through, the first opening and the second opening constitute opening, be pin between adjacent apertures.
Optionally, the width of described first opening is less than the width of the second opening, and described metal coupling is located at the of pin
On one surface.
Optionally, described metal coupling includes body and the tip being located on body, and described most advanced and sophisticated volume is less than body
Volume.
Optionally, the formation process of described metal coupling is lead key closing process, when carrying out wire bonding, metal wire is worn
Cross bonding head and reach its top；The metal wire melting stretched out in bonding head forms the body of metal coupling；Bonding head is by body pressure
It is combined on the first surface of pin；Bonding head moves to the direction away from pin, exposes the part metals line on body；Bonding head
In chopper cut-out metal wire, on body remaining metal wire constitute most advanced and sophisticated.
Optionally, also include：Form the second plastic packaging layer sealing described semiconductor chip, metal coupling and solder layer, the
One plastic packaging layer and the second plastic packaging layer constitute plastic packaging layer.
Optionally, the melting temperature of described metal coupling material is more than the melting temperature of solder layer material.
Present invention also offers a kind of forming method of encapsulating structure, including：Leadframe metal layer is provided；Draw described in etching
Wire frame metal level, forms some discrete pins, has opening between adjacent leads；Fill expendable material in described opening,
Form sacrifice layer；Form metal coupling on the surface of described pin；Remove described sacrifice layer；Offer semiconductor chip, described half
The surface of conductor chip is formed with pad, and described pad is formed with solder layer；Semiconductor chip is inverted in above pin, will
Solder layer on semiconductor chip and metal coupling weld together；Formed and seal described semiconductor chip, metal coupling and weldering
The bed of material, and fill the plastic packaging layer of full gate mouth.
Optionally, described opening includes the first opening mutually running through and the second opening, and the width of described first opening is little
In the width of the second opening, described metal coupling is located on the surface away from the second opening for the pin.
Optionally, the material of described sacrifice layer is resin.
Compared with prior art, technical scheme has advantages below：
Semiconductor chip is inverted in above pin the forming method of the embodiment of the present invention, by metal coupling and solder layer
Pad on semiconductor chip is electrically connected with the pin and is so that the horizontal area that the encapsulating structure that formed occupies reduces, entirely
The small volume of encapsulating structure, improves the integrated level of encapsulating structure, and forms metal coupling on pin, on the one hand, gold
Belong to the presence of projection, when when being inverted in semiconductor chip on pin, described metal coupling can play the effect of positioning, another
Aspect, the presence of metal coupling, it is directly welded on pin compared to by the solder layer on semiconductor chip, pin is formed
Make when being welded after metal coupling, the gradient steepening of the attachment structure between semiconductor chip and pin, attachment structure
The area of the pin surface occupying reduces, another further aspect, the presence of metal coupling so that between semiconductor chip and pin away from
From increase, when forming the second plastic packaging layer sealing described semiconductor chip, metal coupling and solder layer, prevent in semiconductor core
Form the defects such as space in the second plastic packaging layer between piece and pin.
Further, described opening includes the first opening and the second opening, and the width of the first opening is less than the width of the second opening
Degree, the area of the first surface of the pin of formation is more than the area of second surface, forms metal convex on the first surface of pin
Block, because the area of the first surface of pin is larger, when metal coupling is formed using lead key closing process, the first table of pin
Face can be born larger pressure and be had larger contact area, reduce the difficulty forming metal coupling using lead key closing process
Degree, the area of the second surface of pin is less so that the distance between second surface of adjacent leads is larger, by the second of pin
Surface and external circuit（Such as pcb board circuit）When connected, prevent the short circuit between adjacent leads.
Further, described metal coupling includes body and the tip being located on body, and described most advanced and sophisticated volume is less than body
Volume so that metal coupling surface area increase, subsequently semiconductor chip is inverted in, above pin, semiconductor chip being welded
So that metal coupling is increased with the contact area of solder layer when solder layer on disk is welded with metal coupling, and metal coupling
Tip go deep in solder layer, improve the adhesion between metal coupling and solder layer and mechanical stability.
Further, forming described metal coupling is lead key closing process, process is simple, and efficiency is higher, and will not bring
Pollution.
The forming method of the encapsulating structure of the present invention, fills sacrifice layer, described sacrifice layer energy in the opening between pin
The adjacent pin of fixation simultaneously prevents pin hanging, when forming metal coupling on pin it is therefore prevented that the pin that prevents of pin exists
By external pressure shift or deformation, after forming metal coupling, remove described sacrifice layer, again expose opening between pin
Mouthful, when forming plastic packaging layer, because the first opening and the second opening are not filled by other materials, the first opening and the second opening with
Space between semiconductor chip and pin is connection, is conducive to the filling of capsulation material, prevents in semiconductor chip and draws
The defects such as space are produced in capsulation material between pin, and because the formation of whole plastic packaging layer is to incite somebody to action half by reflux technique
The metal coupling on solder layer and pin on conductor chip is formed so that forming having relatively of plastic packaging layer after welding together
Good quality and isolating seal performance.
Brief description
Fig. 1 is the structural representation of prior art encapsulating structure；
Fig. 2～Fig. 8 is the cross-sectional view of the forming process of embodiment of the present invention encapsulating structure.
Specific embodiment
The integrated level of existing encapsulating structure is relatively low, refer to Fig. 1, and the pin 16 in existing encapsulating structure is cincture
It is arranged in semiconductor chip 14 around, the pad 15 on semiconductor chip 14 needs the pin by plain conductor 17 and surrounding
16 electrical connections, so that the volume that entirely encapsulating structure occupies is larger, are unfavorable for the raising of encapsulating structure integrated level.
The invention provides a kind of forming method of encapsulating structure, semiconductor chip is inverted on pin, by projection
Pad on semiconductor chip being connected with pin, thus reducing the volume of encapsulating structure, improve the integrated of encapsulating structure
Degree.
Understandable for enabling the above objects, features and advantages of the present invention to become apparent from, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.When describing the embodiment of the present invention in detail, for purposes of illustration only, schematic diagram can disobey general ratio
Make partial enlargement, and described schematic diagram is example, its here should not limit the scope of the invention.Additionally, in reality
The three-dimensional space of length, width and depth should be comprised in making.
Fig. 2～Fig. 8 is the cross-sectional view of the forming process of embodiment of the present invention encapsulating structure.
First, with reference to Fig. 2, provide leadframe metal layer 100.
Described leadframe metal layer 100 is subsequently formed pin, described leadframe metal layer 100 have first surface 11 and with
The relative second surface of first surface 11 12.
The material of described leadframe metal layer 100 is metal or alloy.The material of described leadframe metal layer 100 can be
In W, Al, Cu, Ti, Ag, Au, Pt, Ni one or more.
Described leadframe metal layer 100 can be the metal of individual layer or the stacked structure of multiple layer metal.
Described leadframe metal layer 100 includes some lead areas around the outer peripheral areas of described lead areas（In figure is not
Illustrate）, described lead areas is subsequently formed some discrete pins, and described outer peripheral areas are used for fixing and supporting some discrete
Pin, the side of pin is contacted with outer peripheral areas, and other three sides of pin are hanging, subsequently after forming encapsulating structure, by cutting
Prescind except the outer peripheral areas of lead metal level 100, discharge some discrete pin of encapsulating structure.
Then, with reference to Fig. 3, etch described leadframe metal layer 100（With reference to Fig. 2）, form some discrete pins 103,
Between adjacent leads 103, there is opening.
The forming process of described pin 103 is：The first surface 11 of described leadframe metal layer 100 forms the first figure
The mask layer of shape（In figure is not shown）；With the described first patterned mask layer as mask, etch lead frame metal level 100
First surface 11, forms some first openings 102 in leadframe metal layer 100；In described leadframe metal layer 100 second
The mask layer of second graphical is formed on surface 12（In figure is not shown）；With the mask layer of described second graphical as mask, carve
The second surface 12 of erosion leadframe metal layer 100, forms some second openings 101, the first opening in leadframe metal layer 100
102 and second opening 101 mutually run through, the first opening 102 and the second opening 101 constitute opening, are pin between adjacent apertures
103.
The material of the mask layer of described first patterned mask layer or second graphical can for epoxide-resin glue or its
His suitable material.The formation process of the mask layer of the first patterned mask layer or second graphical is patch dry film technique or pressure
Print technique.The formation process of the mask layer of described first patterned mask layer or second graphical can also be spraying or spin coating
Technique.
The width of described first opening 102 be less than the second opening 101 width so that formed pin 103 the first table
The area in face 11 is more than the area of second surface 12, subsequently forms metal coupling on the first surface of pin 103, due to pin
The area of 103 first surface 11 is larger, when metal coupling is formed using lead key closing process, the first surface of pin 103
Larger pressure can be born and there is larger contact area, reduce the difficulty forming metal coupling using lead key closing process
Degree, the area of the second surface 12 of pin 103 is less so that the distance between second surface 12 of adjacent leads 103 is larger, after
Continue the second surface 12 of pin 103 and external circuit（Such as pcb board circuit）When connected, prevent between adjacent leads 103
Short circuit, in addition, the width of the first opening 102 and the second opening 101 is different, subsequently in the first opening 102 and the second opening 101
So that the increasing number of pin 103 and the contact surface of plastic packaging layer during the full capsulation material of middle filling, pin is not easy from capsulation material
In come off.
In other embodiments of the invention, after forming the first opening 102 and the second opening 101, can also be in institute
State one layer of dry film film of formation on the second surface 12 of pin 103, the second surface 12 of pin 103 is covered by described dry film film
Lid, when subsequently filling capsulation material in the opening, prevents the flash of the lower surface to pin 103 for the capsulation material.
With reference to Fig. 4, in described opening（The first opening 102 in Fig. 3 and the second opening 101）The full capsulation material of filling,
Form the first plastic packaging layer 104.
Described first plastic packaging layer 104 1 aspect is protection and isolates adjacent pin, and the position of pin is fixed, separately
On the one hand, pin 103 can be prevented hanging, form metal subsequently adopting the first surface 11 in pin 103 for the lead key closing process
During projection, prevent pin 103 by external pressure shift or deformation.
Described first plastic packaging layer 104 filling completely the first opening 102 and the second opening 101, the two ends table of the first plastic packaging layer 104
Face is flushed with the first surface 11 of pin 103 and second surface 12.
The material of described first plastic packaging layer 104 is resin, and described resin can be epoxy resin, polyimide resin, benzene
And cyclobutane resin or polybenzoxazoles resin；Described resin can also be polybutylene terephthalate, Merlon, poly-
Ethylene glycol terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyether sulfone, polyamide, polyurethane,
Ethylene-vinyl acetate copolymer or polyvinyl alcohol；Described first plastic packaging layer 104 can also be other suitable capsulation materials.
The formation process of described first plastic packaging layer 104 is Shooting Technique（injection molding）Or turn mould technique
（transfer molding）.The formation process of described first plastic packaging layer 104 can also be other suitable techniques.
Because the solder layer of semiconductor chip is welded on one with the metal coupling on pin by reflux technique subsequently to be passed through
Rise, high temperature during reflux technique can produce to the first plastic packaging layer and damage, the performance of the encapsulating structure that impact ultimately forms.At this
In bright other embodiment, etch described leadframe metal layer, form some discrete pins, have out between adjacent leads
Mouthful；Then, fill expendable material in described opening, form sacrifice layer；Then, form metal on the surface of described pin convex
Block；Then, remove described sacrifice layer；Then, semiconductor chip is inverted in above pin, by the solder layer on semiconductor chip
Weld together with metal coupling；Finally, formed and seal described semiconductor chip, metal coupling and solder layer, and fill full gate
The plastic packaging layer of mouth.Described opening includes the first opening mutually running through and the second opening, and the width of the first opening is opened less than second
The width of mouth, in opening（First opening and the second opening）So that pin is fixed and prevented pin after interior filling expendable material
Vacantly, using lead key closing process pin first surface（Surface away from the second opening）When forming metal coupling, prevent
Only pin is by external pressure shift or deformation.After forming metal coupling, sacrifice layer can be removed, again expose and draw
Opening between pin, semiconductor chip is inverted in above pin, by reflux technique by the solder layer on semiconductor chip with
After metal coupling welds together, technique can be moulded by Shooting Technique or turn and form that to seal described semiconductor chip, metal convex
Block and solder layer, and fill the plastic packaging layer of full gate mouth, due to the formation of whole plastic packaging layer be formed after reflux technique so that
Form plastic packaging layer has preferable quality and isolating seal performance, and, when forming plastic packaging layer, due to the first opening and the
Two openings are not filled by other materials, and the first opening and the second opening are to connect with the space between semiconductor chip and pin
, be conducive to the filling of capsulation material, prevent from producing the defects such as space in the capsulation material between semiconductor chip and pin.
The material of described sacrifice layer can be resin, and the material of described sacrifice layer can also be other suitable materials, than
As：Silica, silicon nitride, amorphous carbon, polysilicon etc..
In other embodiments of the invention it is also possible to remove institute after welding together semiconductor chip and pin
State sacrifice layer.
Then, refer to Fig. 5, form metal coupling 107 on the surface of described pin 103.
Described metal coupling 107 is as follow-up as being electrically connected between the pad on semiconductor chip and pin 103
Structure.
Described metal coupling 107 is located on the first surface 11 of pin 103, can adopt lead key closing process or printer
Skill forms metal coupling.
In the present embodiment, described metal coupling 107 includes body 105 and the tip 106 being located on body 105, described point
The volume at end 106 is less than the volume of body 105 so that the surface area of metal coupling 107 increases, subsequently by semiconductor chip upside-down mounting
Above pin 103, when the solder layer on semiconductor chip pad and metal coupling 107 are welded so that metal coupling 107 with
The contact area of solder layer increases, and the tip of metal coupling 107 is goed deep in solder layer, improves metal coupling 107 and weldering
Adhesion between the bed of material and mechanical stability.
In the present embodiment, the formation process of described metal coupling 107 is lead key closing process, and detailed process is：Drawn
During line bonding, metal wire is passed through the bonding head of bonding apparatus（Or chopper capillary in bonding head）Reach its top；By hydrogen
Oxygen flame or electrical system produce electric spark and make the metal wire stretching out in bonding head melt the body 107 forming metal coupling（This
Body is spherical shape or other shape）；Body 107 is pressed together on the first surface 11 of pin 103 bonding head；Bonding head is to remote
From the motion of the direction of pin 103（First surface 11 perpendicular to pin 103 moves upwards）, expose the partly gold on body 107
Belong to line；Chopper cut-out metal wire in bonding head, on body 105, remaining metal wire constitutes most advanced and sophisticated 106.By wire bonding work
The metal coupling that skill is formed, process is simple, efficiency is higher, and will not bring pollution.In other embodiments of the invention, institute
State metal coupling 107 to be formed using other suitable techniques.
Described metal coupling 107 material adopts the fusing point metal higher than the melting temperature of solder layer, prevents subsequently by metal
When solder layer on the pad of projection 107 and semiconductor chip welds, metal coupling 107 deforms, impact packaging
Electric property and stability, the material of described metal coupling 107 is aluminium, nickel, tungsten, platinum, copper, titanium, chromium, tantalum, tin alloy, Jin Huo
Silver.Described metal coupling 107 can also adopt other suitable metal materials.
In the embodiment of the present invention, pin 103 forms metal coupling 107, in follow-up encapsulation process, on the one hand,
The presence of metal coupling 107, when when being inverted in semiconductor chip on pin, described metal coupling 107 can play positioning
Effect, on the other hand, the presence of metal coupling 107, it is directly welded at pin 103 compared to by the solder layer on semiconductor chip
On, after forming metal coupling 107 on pin 103, when being welded, the connection between semiconductor chip and pin 103 is tied
The gradient steepening of structure, the area on pin 103 surface that attachment structure occupies reduces, another further aspect, the presence of metal coupling so that
The distance between semiconductor chip and pin 103 increase, and seal described semiconductor chip, metal coupling 107 and solder being formed
During the second plastic packaging layer of layer 103, prevent from being formed the defects such as space in the second plastic packaging layer between semiconductor chip and pin.
Then, refer to Fig. 6, semiconductor chip 200 is provided, the surface of described semiconductor chip 200 is formed with pad
201, described pad 201 is formed with solder layer 203.
In described semiconductor chip 200, there is integrated circuit（In figure is not shown）, the pad on semiconductor chip 200 surface
201 are electrically connected with the integrated circuit in semiconductor chip, described pad 201 as the integrated circuit in semiconductor chip 200 with
The port of external electrical connections.
The material of described pad 201 is the metal such as copper or aluminium.
On described semiconductor chip 200, also there is passivation layer or the polymeric layer covering described semiconductor chip 200 surface,
There is in described passivation layer or polymeric layer the opening exposing pad 201 surface, described passivation layer or polymeric layer are used for protecting
Semiconductor chip 200 is simultaneously isolated by semiconductor chip with external environment condition.
The formation process of described solder layer 203 is：Form layer of metal layer in semiconductor chip 200 and pad 201 surface,
Described metal level is as the conductive layer being subsequently formed during solder layer and as the adhesion layer between solder layer and pad 201, institute
Stating metal layer material is one or more of nickel, platinum, titanium or tantalum；Photoresist mask, described light are formed on described metal level
Photoresist mask has the opening exposing the metal level on pad 201；Solder is filled in said opening using electroplating technology, is formed
Solder layer 203；Remove described photoresist mask layer；With described solder layer 203 as mask, etching removes solder layer 203 both sides
Metal level, forms convex lower metal layer 202.
In the present embodiment, after forming solder layer 203, reflux technique can also be carried out to solder layer 203, make the weldering of formation
The bed of material 203 is in ball-type.In the other embodiment of the present invention, after forming solder layer 203, reflux technique can not be carried out, subsequently
Directly solder layer 203 is welded together with the metal coupling on pin, save processing step, reduce heat budget.
The material of described solder layer 203 be tin or tin alloy, described tin alloy be tin silver, tin-lead, SAC, tin silver-colored zinc,
Tin zinc, tin bismuth indium, tin indium, Sillim, tin copper, tin zinc indium or tin silver one of antimony or multiple.
Then, with reference to Fig. 7, semiconductor chip 200 is inverted in above pin 103, by the solder on semiconductor chip 200
Layer 203 is welded together with metal coupling 107.
Specifically, first semiconductor chip 200 is inverted in pin 103 top so that solder on semiconductor chip 200
Layer 203 is contacted with the metal coupling 107 on pin 103；Reflux technique is carried out to described solder layer 203 so that solder layer 203
Melt and cover the surface in described metal coupling；Whole encapsulating structure is cooled down.
Semiconductor chip 200 is inverted in above pin 103, by metal coupling 107 and solder layer 103 by semiconductor core
Pad 201 on piece 200 is electrically connected with pin 103, pin is arranged on around semiconductor chip and then logical with respect to existing
Cross the forming method that the pad on semiconductor chip is connected by plain conductor with pin, the forming method of the embodiment of the present invention is formed
The horizontal area that occupies of encapsulating structure reduce, the small volume of whole encapsulating structure, improve the integrated level of encapsulating structure.
Finally, refer to Fig. 8, formed and seal the second of described semiconductor chip 200, metal coupling 203 and solder layer 203
Plastic packaging layer 205, and described second plastic packaging layer 205 covers first surface 11 filling semiconductor chip 200 and the pin of pin 103
Area of space between 103.
The material of described second plastic packaging layer 205 is identical with the material of the first plastic packaging layer 104 or differs, the second plastic packaging layer
205 and the first plastic packaging layer 104 constitute plastic packaging layer.
The formation process of described second plastic packaging layer 205 be Shooting Technique or turn mould technique.
After forming the second plastic packaging layer 205, also include, the second plastic packaging layer 205 and the second plastic packaging layer are removed using cutting technique
104 outer unnecessary leadframe metal layers（Outer peripheral areas）, discharge each discrete pin 103.
The encapsulating structure that said method is formed, refer to Fig. 8, including：
Some discrete pins 103, have opening between adjacent leads 103；
First plastic packaging layer 104 of filling full gate mouth；
Metal coupling 107 on the surface of described pin 103；
Semiconductor chip 200, the surface of described semiconductor chip 200 has pad 202, and described pad 202 has weldering
The bed of material 203, semiconductor chip 200 is inverted in above pin 103, the solder layer 203 on semiconductor chip 200 and metal coupling
107 weld together.
Specifically, described pin 100 has first surface 11 and the second surface 12 relative with first surface 11.Described open
Mouth includes the first opening and the second opening mutually running through, and the width of described first opening is less than the width of the second opening, described
Metal coupling 107 is located at the end surface away from the second opening of pin（First surface 11）On.
Described metal coupling 107 includes body and the tip being located on body, and described most advanced and sophisticated volume is less than the body of body
Long-pending.
Also include：Seal the second plastic packaging layer 205 of described semiconductor chip 200, metal coupling 107 and solder layer 203, the
Two plastic packaging layers 205 and the first plastic packaging layer 104 constitute plastic packaging layer.
The material of described metal coupling 107 and the material of solder layer 203 differ.The material of described metal coupling 107 is
Aluminium, nickel, tungsten, platinum, copper, titanium, chromium, tantalum, golden or silver-colored, the material of described solder layer 203 is tin or tin alloy.
Also there is between described pad 201 and solder layer 203 convex lower metal layer 202.
To sum up, encapsulating structure of the embodiment of the present invention and forming method thereof, semiconductor chip is inverted in, above pin, partly leading
The solder layer that the pad of body chip passes through is welded together with metal coupling so that the horizontal area that encapsulating structure occupies reduces,
The small volume of whole encapsulating structure, integrated level improves.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, without departing from this
In the spirit and scope of invention, all can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope limiting is defined.
Claims (9)
1. a kind of forming method of encapsulating structure is it is characterised in that include：
Leadframe metal layer is provided；
Etch described leadframe metal layer, form some discrete pins, there is between adjacent leads opening, the shape of described pin
One-tenth process is：Described leadframe metal layer includes first surface and the second surface relative with first surface, etch lead frame gold
Belong to the first surface of layer, form some first openings in leadframe metal layer；The second surface of etch lead frame metal level,
Form some second openings in leadframe metal layer, the first opening and the second opening mutually run through, the first opening and the second opening
Constitute opening, be pin between adjacent apertures；
Fill full capsulation material in described opening, form the first plastic packaging layer；
After forming the first plastic packaging layer, form metal coupling on the surface of described pin；
There is provided semiconductor chip, the surface of described semiconductor chip is formed with pad, described pad is formed with solder layer；
Semiconductor chip is inverted in above pin, the solder layer on semiconductor chip and metal coupling are welded together.
2. the forming method of encapsulating structure as claimed in claim 1 is it is characterised in that the width of described first opening is less than the
The width of two openings, described metal coupling is located on the first surface of pin.
3. the forming method of encapsulating structure as claimed in claim 2 is it is characterised in that described metal coupling includes body and position
Tip on body, described most advanced and sophisticated volume is less than the volume of body.
4. the forming method of encapsulating structure as claimed in claim 3 is it is characterised in that the formation process of described metal coupling is
Lead key closing process, when carrying out wire bonding, metal wire is reached its top through bonding head；The metal wire stretching out in bonding head
Melting forms the body of metal coupling；Body is pressed together on the first surface of pin bonding head；Bonding head is to away from pin
Moving in direction, exposes the part metals line on body；Chopper cut-out metal wire in bonding head, remaining metal wire structure on body
Become most advanced and sophisticated.
5. the forming method of encapsulating structure as claimed in claim 1 is it is characterised in that also include：Formation sealing is described partly to be led
Second plastic packaging layer of body chip, metal coupling and solder layer, the first plastic packaging layer and the second plastic packaging layer constitute plastic packaging layer.
6. the forming method of encapsulating structure as claimed in claim 1 is it is characterised in that the fusing point temperature of described metal coupling material
Degree is more than the melting temperature of solder layer material.
7. a kind of forming method of encapsulating structure is it is characterised in that include：
Leadframe metal layer is provided；
Etch described leadframe metal layer, form some discrete pins, there is between adjacent leads opening；
Fill expendable material in described opening, form sacrifice layer；
After forming sacrifice layer, form metal coupling on the surface of described pin；
Remove described sacrifice layer；
There is provided semiconductor chip, the surface of described semiconductor chip is formed with pad, described pad is formed with solder layer；
After removing sacrifice layer, semiconductor chip is inverted in above pin, by the solder layer on semiconductor chip and metal coupling
Weld together；
Formed and seal described semiconductor chip, metal coupling and solder layer, and fill the plastic packaging layer of full gate mouth.
8. the forming method of encapsulating structure as claimed in claim 7 is it is characterised in that described opening includes mutually running through
One opening and the second opening, the width of described first opening is less than the width of the second opening, and it is remote that described metal coupling is located at pin
On the surface of the second opening.
9. the forming method of encapsulating structure as claimed in claim 7 is it is characterised in that the material of described sacrifice layer is resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310654106.9A CN103745939B (en) | 2013-12-05 | 2013-12-05 | Packaging structure forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310654106.9A CN103745939B (en) | 2013-12-05 | 2013-12-05 | Packaging structure forming method |
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