CN103745914B - The growing method of strained layer and the substrate with strained layer - Google Patents
The growing method of strained layer and the substrate with strained layer Download PDFInfo
- Publication number
- CN103745914B CN103745914B CN201310720840.0A CN201310720840A CN103745914B CN 103745914 B CN103745914 B CN 103745914B CN 201310720840 A CN201310720840 A CN 201310720840A CN 103745914 B CN103745914 B CN 103745914B
- Authority
- CN
- China
- Prior art keywords
- layer
- bridge connector
- semiconductor
- buried regions
- layer semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 title claims abstract description 27
- 239000004065 semiconductor Substances 0.000 claims abstract description 72
- 239000000463 material Substances 0.000 claims abstract description 37
- 238000005260 corrosion Methods 0.000 claims abstract description 30
- 230000007797 corrosion Effects 0.000 claims abstract description 30
- 230000007704 transition Effects 0.000 claims abstract description 17
- 230000008859 change Effects 0.000 claims abstract description 12
- 239000012212 insulator Substances 0.000 claims abstract description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- 239000010703 silicon Substances 0.000 claims description 12
- 229910052732 germanium Inorganic materials 0.000 claims description 7
- 229910021542 Vanadium(IV) oxide Inorganic materials 0.000 claims description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 6
- GRUMUEUJTSXQOI-UHFFFAOYSA-N vanadium dioxide Chemical group O=[V]=O GRUMUEUJTSXQOI-UHFFFAOYSA-N 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 5
- 235000019994 cava Nutrition 0.000 claims description 3
- 238000005234 chemical deposition Methods 0.000 claims description 3
- 238000005289 physical deposition Methods 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims 3
- 239000002184 metal Substances 0.000 claims 3
- 230000008901 benefit Effects 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 230000005693 optoelectronics Effects 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910001935 vanadium oxide Inorganic materials 0.000 description 3
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N99/00—Subject matter not provided for in other groups of this subclass
- H10N99/03—Devices using Mott metal-insulator transition, e.g. field-effect transistor-like devices
Abstract
The invention provides the growing method of a kind of strained layer and the substrate with strained layer。Described method comprises the steps: to provide substrate, and described substrate includes supporting layer, buried regions and top-layer semiconductor;Top-layer semiconductor and buried regions are formed through corrosion window;Buried regions is corroded, so that top layer semiconductors layer segment is unsettled by corrosion window;Being placed at the first temperature by described substrate, form bridge connector at the corrosion window place of top-layer semiconductor, described bridge connector adopts metal-insulator phase transition material to make;Change the temperature of described bridge connector to the second temperature, so that unsettled top-layer semiconductor strains。It is an advantage of the current invention that and utilize metal-insulator phase transition phenomenon can introduce the characteristic that obvious size changes under a certain specific phase transition temperature, introduce enough adaptabilitys to changes by bridge connector, be a kind of low cost and efficient method。
Description
Technical field
The present invention relates to field of semiconductor materials, particularly relate to the growing method of a kind of strained layer and with the substrate of strained layer。
Background technology
The high speed development of microelectric technique makes Moore's Law become closer to its physics limit, and silicon based opto-electronics is integrated in the extension being considered as to can effectively solve the problem that Moore's Law in recent years。At present, the major obstacle hindering silicon based opto-electronics integrated is how to solve silica-based and cmos compatible smooth source problem。Therefore, finding a kind of can effective luminescent material compatible with silica-based technique be the integrated important place of silicon based opto-electronics。
When the about 2%(of the tensile stress in Ge thin film is when Ge is highly doped, the tensile stress needed is less), can be direct band gap by original indirect band gap transitions, meet the material requirements that silicon based opto-electronics is integrated, therefore can be used to make silicon substrate laser, thus being electrically integrated, for low cost sheet realizes light, the approach of providing。
The method preparing tensile stress Ge thin film mainly has several: 1, utilize the difference of Ge and Si thermal coefficient of expansion, and by being directly thermally treated resulting in the Ge thin film of tensile strain, but the degree straining Ge that this method obtains is little, and only ~ 0.3%;2, utilize III-V as cushion, it is possible to obtain the strain Ge of big stress, but owing to extension III-V material needs MBE or MOCVD, expensive, the speed of growth is slow, thus adding cost。
Summary of the invention
The technical problem to be solved is to provide the growing method of a kind of strained layer and with the substrate of strained layer, it is possible to obtain bigger strain with relatively low cost。
In order to solve the problems referred to above, the invention provides the growing method of a kind of strained layer, comprise the steps: to provide substrate, described substrate includes supporting layer, the buried regions of support layer surface and the top-layer semiconductor on buried regions surface;Top-layer semiconductor and buried regions are formed through corrosion window;Buried regions is corroded, so that top layer semiconductors layer segment is unsettled by corrosion window;Described substrate is placed at the first temperature, bridge connector is formed at the corrosion window place of top-layer semiconductor, one end of described bridge connector is connected with the surface of top-layer semiconductor overhanging portion, the other end is connected with overhanging portion opposite flank in corrosion window, and described bridge connector adopts metal-insulator phase transition material to make;Change the temperature of described bridge connector to the second temperature, make described bridge connector internal generation metal-insulator phase transition shrink or stretch, so that unsettled top-layer semiconductor strains。
Optionally, the material of described top-layer semiconductor is selected from any one in germanium, silicon and Group III-V compound semiconductor。
Optionally, the material of described bridge connector is vanadium dioxide。
Optionally, the described bridge connector of described change, to the step of the second temperature, is the mode adopting and improving ambient temperature further。
Optionally, the described bridge connector of described change to the step of the second temperature, is adopt to pass into mode that electric current makes it generate heat in bridge connector to raise temperature further。
Optionally, the step of described formation bridge connector farther includes: form packed layer in corrosion window, to planarize the surface of described top-layer semiconductor;Bridge connector is formed on the surface of top-layer semiconductor;Remove packed layer。
Optionally, the technique of described formation bridge connector is further selected from any one in physical deposition and chemical deposition。
Invention further provides a kind of substrate with strained layer, including supporting layer, the buried regions of support layer surface and the top-layer semiconductor on buried regions surface, described top-layer semiconductor and buried regions have a through window, the buried regions of described window side caves in so that top-layer semiconductor is unsettled, at the window place of top-layer semiconductor, one bridge connector is set, one end of described bridge connector is connected with the surface of top-layer semiconductor overhanging portion, the other end is connected with overhanging portion opposite flank in the window, and described bridge connector adopts metal-insulator phase transition material to make。
Optionally, the material of described top-layer semiconductor is selected from any one in germanium, silicon and Group III-V compound semiconductor。
Optionally, the material of described bridge connector is vanadium dioxide。
It is an advantage of the current invention that and utilize metal-insulator phase transition phenomenon can introduce the characteristic that obvious size changes under a certain specific phase transition temperature, introduce enough adaptabilitys to changes by bridge connector, be a kind of low cost and efficient method。
Accompanying drawing explanation
It it is the enforcement step schematic diagram of detailed description of the invention of the present invention shown in accompanying drawing 1。
Accompanying drawing 2A is to the process schematic representation shown in accompanying drawing 2G being detailed description of the invention of the present invention。
It is the metal-semiconductor phase-change characteristic figure of vanadium oxide material shown in accompanying drawing 3。
Detailed description of the invention
Below in conjunction with accompanying drawing, the growing method of a kind of strained layer provided by the invention and the detailed description of the invention with the substrate of strained layer are elaborated。
Being the enforcement step schematic diagram of detailed description of the invention of the present invention shown in accompanying drawing 1, including step S100, it is provided that substrate, described substrate includes supporting layer, the buried regions of support layer surface and the top-layer semiconductor on buried regions surface;Step S110, forms through corrosion window in top-layer semiconductor and buried regions;Step S120, corrodes buried regions by corrosion window, so that top layer semiconductors layer segment is unsettled;Step S131, forms packed layer, to planarize the surface of described top-layer semiconductor in corrosion window;Step S132, is placed at the first temperature by described substrate, forms bridge connector on the surface of top-layer semiconductor;Step S133, removes packed layer;Step S140, changes the temperature of described bridge connector to the second temperature, makes described bridge connector generation metal-semiconductor phase transformation shrink or stretch, so that unsettled top-layer semiconductor strains。
Accompanying drawing 2A is to the process schematic representation shown in accompanying drawing 2G being detailed description of the invention of the present invention。
Shown in accompanying drawing 2A, with reference to step S100, it is provided that substrate 200, described substrate includes supporting layer 201, the buried regions 202 on supporting layer 201 surface, and the top-layer semiconductor 203 on buried regions 202 surface。The material of described supporting layer 201 can be any one the common backing material including the material such as monocrystal silicon and sapphire。The material of described top-layer semiconductor 203 is selected from any one in germanium, silicon and Group III-V compound semiconductor。The material of described buried regions 202 should select the material having etch selectivities between top-layer semiconductor 203, for instance can be silicon oxide or silicon nitride etc.。
Shown in accompanying drawing 2B, with reference to step S110, top-layer semiconductor 203 and buried regions 202 form through corrosion window 210。The method forming corrosion window 210 may include steps of: forms graphical corrosion barrier layer on the surface of top-layer semiconductor 203;By patterned corrosion barrier layer, top-layer semiconductor 203 and buried regions 202 are implemented dry etching to form corrosion window 210。
Shown in accompanying drawing 2C, with reference to step S120, corrode buried regions 202 by corrosion window 210, so that top-layer semiconductor 203 part is unsettled。Corrosion herein should take the selective corrosion method that buried regions 202 has higher corrosion rate, it is such as monocrystal silicon or monocrystalline germanium for top-layer semiconductor 203, and buried regions 202 is the embodiment of silicon oxide or silicon nitride, it is possible to adopt Fluohydric acid. to corrode as corrosive liquid。This detailed description of the invention describes so that the top-layer semiconductor 203 of corrosion window 210 one side is unsettled, for without unsettled part, it is possible to adopt the materials such as photoresist to cover to form stop。In other detailed description of the invention, it is possible to so that the top-layer semiconductor 203 of the two opposite sides of corrosion window 210 is all unsettled。
Shown in accompanying drawing 2D, with reference to step S131, corrosion window 210 forms packed layer 220, to planarize the surface of described top-layer semiconductor 203。The material of described packed layer 220 can be such as photoresist, it is also possible to be the material such as silicon oxide or silicon nitride。
Shown in accompanying drawing 2E, with reference to step S132, described substrate 200 is placed at the first temperature, bridge connector 230 is formed on the surface of top-layer semiconductor 203, one end of described bridge connector 230 is connected with the surface of top-layer semiconductor 203 overhanging portion, and the other end is connected with overhanging portion opposite flank in corrosion window 210。The technique of described formation bridge connector 230 is further selected from sol-gel process, physical deposition and any one in chemical deposition。What this technique was formed is continuous print thin film, it is necessary to through graphical to form the bridge connector 230 with reservation shape。
Shown in accompanying drawing 2F, with reference to step S133, remove packed layer 220。The gap (being perpendicular to page, not shown) that can pass through between bridge connector 230 both sides and corrosion window 210 carries out dissolving or corroding, to remove packed layer 220。
Shown in accompanying drawing 2G, with reference to step S140, change the temperature of described bridge connector 230 to the second temperature, make described bridge connector 230 occur metal-insulator phase transition to stretch or shrink, so that unsettled top-layer semiconductor 203 strains。Material when temperature change generally all can expansion or shrinkage, therefore simple dependence coefficient of thermal expansion differences is to introduce enough stress in top-layer semiconductor 203。Metal-insulator phase transition then can introduce obvious size under a certain specific phase transition temperature and change, and therefore can introduce enough adaptabilitys to changes。
This detailed description of the invention releases its effect with vanadium dioxide for illustrating。It is the metal-semiconductor phase-change characteristic figure of vanadium oxide material shown in accompanying drawing 3。From phasor it can be seen that the transformation of M1 to R phase makes the CR of material axially shrink ~ 1%, and expand in other both directions;From M1 phase to M2 phase, material extends ~ 1% on CR direction。So, from M2 phase to R phase, material shrinks ~ 2% on CR direction。Vanadium oxide material phase transition temperature occurs near 68 degrees Celsius, relatively room temperature, and the change several orders of magnitude higher than general inorganic matter driver of phase variable volume, and also above the change of piezoelectric volume, is therefore a kind of preferred material。
The accompanying drawing 2G of this detailed description of the invention is stretched for top-layer semiconductor 203 and introduces tensile stress。If the material of bridge connector 230 is vanadium dioxide, then the first temperature should lower than 68 degrees Celsius, and the second temperature should be above 68 degrees Celsius。In other detailed description of the invention, it should according to different materials, and acquisition tensile stress or compressive stress in top-layer semiconductor 203 is needed to determine the first different temperature values and the second temperature value。
Namely above-mentioned steps obtains a kind of substrate 200 with strained layer after implementing, including supporting layer 201, the buried regions 202 on supporting layer 201 surface and the top-layer semiconductor 203 on buried regions 202 surface。Having a through window 210 in described top-layer semiconductor 203 and buried regions 202, the buried regions 202 of described window 210 side caves in so that top layer semiconductors 203 layers is unsettled。At the window place of top-layer semiconductor 203, a bridge connector 230 is set, one end of described bridge connector 230 is connected with the surface of top-layer semiconductor 203 overhanging portion, the other end is connected with overhanging portion opposite flank in window 210, and described bridge connector 230 adopts metal-insulator phase transition material to make。
The above is only the preferred embodiment of the present invention; it should be pointed out that, for those skilled in the art, under the premise without departing from the principles of the invention; can also making some improvements and modifications, these improvements and modifications also should be regarded as protection scope of the present invention。
Claims (9)
1. the growing method of a strained layer, it is characterised in that comprise the steps:
Thering is provided substrate, described substrate includes supporting layer, the buried regions of support layer surface and the top-layer semiconductor on buried regions surface;
Top-layer semiconductor and buried regions are formed through corrosion window;
Buried regions is corroded, so that top layer semiconductors layer segment is unsettled by corrosion window;
Described substrate is placed at the first temperature, bridge connector is formed at the corrosion window place of top-layer semiconductor, one end of described bridge connector is connected with the surface of top-layer semiconductor overhanging portion, the other end is connected with overhanging portion opposite flank in corrosion window, and described bridge connector adopts metal one insulator phase transition material to make;
Change the temperature of described bridge connector to the second temperature, make described bridge connector internal generation metal one insulator phase transition shrink or stretch, so that unsettled top-layer semiconductor strains;
The step of described formation bridge connector farther includes:
Corrosion window forms packed layer, to planarize the surface of described top-layer semiconductor;
Bridge connector is formed on the surface of top-layer semiconductor;
Remove packed layer。
2. the growing method of strained layer according to claim 1, it is characterised in that the material of described top-layer semiconductor is selected from any one in germanium, silicon and Group III-V compound semiconductor。
3. the growing method of strained layer according to claim 1, it is characterised in that the material of described bridge connector is vanadium dioxide。
4. the growing method of strained layer according to claim 1, it is characterised in that the described bridge connector of described change, to the step of the second temperature, is the mode adopting and improving ambient temperature further。
5. the growing method of strained layer according to claim 1, it is characterised in that the described bridge connector of described change to the step of the second temperature, is adopt to pass into mode that electric current makes it generate heat in bridge connector to raise temperature further。
6. the growing method of strained layer according to claim 5, it is characterised in that the technique of described formation bridge connector is further selected from any one in physical deposition and chemical deposition。
7. the substrate with strained layer, including supporting layer, the buried regions of support layer surface and the top-layer semiconductor on buried regions surface, it is characterized in that, described top-layer semiconductor and buried regions have a through window, the buried regions of described window side caves in so that top-layer semiconductor is unsettled, at the window place of top-layer semiconductor, one bridge connector is set, one end of described bridge connector is connected with the surface of top-layer semiconductor overhanging portion, the other end is connected with overhanging portion opposite flank in the window, and described bridge connector adopts metal one insulator phase transition material to make。
8. the substrate with strained layer according to claim 7, it is characterised in that the material of described top-layer semiconductor is selected from any one in germanium, silicon and Group III-V compound semiconductor。
9. the substrate with strained layer according to claim 7, it is characterised in that the material of described bridge connector is vanadium dioxide。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310720840.0A CN103745914B (en) | 2013-12-24 | 2013-12-24 | The growing method of strained layer and the substrate with strained layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310720840.0A CN103745914B (en) | 2013-12-24 | 2013-12-24 | The growing method of strained layer and the substrate with strained layer |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103745914A CN103745914A (en) | 2014-04-23 |
CN103745914B true CN103745914B (en) | 2016-06-22 |
Family
ID=50502925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310720840.0A Active CN103745914B (en) | 2013-12-24 | 2013-12-24 | The growing method of strained layer and the substrate with strained layer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103745914B (en) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100431132C (en) * | 2006-03-30 | 2008-11-05 | 上海理工大学 | Making method of adopting phase-change to realizing strain silicon on insulator |
JP2008203102A (en) * | 2007-02-20 | 2008-09-04 | Osaka Univ | Method for manufacturing cantilever beam and force sensor |
CN101174671A (en) * | 2007-10-18 | 2008-05-07 | 天津大学 | Production method for vanadium dioxide nano thin film with phase-change characteristic |
CN102556937A (en) * | 2011-12-30 | 2012-07-11 | 上海新傲科技股份有限公司 | Strained germanium device with cantilever structure and preparation method thereof |
CN103193190B (en) * | 2013-04-11 | 2015-07-29 | 电子科技大学 | Infrared-terahertz dual-band array detector microbridge structure and preparation method thereof |
-
2013
- 2013-12-24 CN CN201310720840.0A patent/CN103745914B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN103745914A (en) | 2014-04-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2936550B1 (en) | Substrates for semiconductor devices | |
TWI355081B (en) | Semiconductor device and manufacturing method ther | |
CN101273438B (en) | Method for making a thin-film element | |
KR20100127249A (en) | Super lattice/quantum well nanowires | |
TW201639004A (en) | Epitaxial film on nanoscale structure | |
US9761499B2 (en) | Semiconductor device structure with 110-PFET and 111-NFET current flow direction | |
CN203055915U (en) | Tensile-strain germanium film | |
US8603886B2 (en) | Intermediate epitaxial structure and method for fabricating an epitaxial structure | |
CN110024215B (en) | Waveguide transition structure and method of manufacture | |
US20200292854A1 (en) | Optical modulator and method of fabricating an optical modulator | |
US20140377936A1 (en) | Method for Forming a Strained Semiconductor Structure | |
CN107624197A (en) | The extension that the mitigation carried out by prepatterned table top strains is peeled off | |
US20180096895A1 (en) | Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids | |
CN106611738B (en) | The preparation method of III-V compound substrate on insulator | |
Jung et al. | Nanoampere‐Level Piezoelectric Energy Harvesting Performance of Lithography‐Free Centimeter‐Scale MoS2 Monolayer Film Generators | |
CN103745914B (en) | The growing method of strained layer and the substrate with strained layer | |
CN103779182A (en) | Method for manufacturing nanowire | |
Saha et al. | Enhanced luminescence from InGaN/GaN nano-disk in a wire array caused by surface potential modulation during wet treatment | |
CN103745913B (en) | The growing method of strained layer and the substrate with strained layer | |
CN103915317A (en) | Growth method of strained layer, and substrate with strained layer | |
CN103745915B (en) | The growing method of strained layer and the substrate with strained layer | |
CN106531683B (en) | Semiconductor-on-insulator material substrate structure and preparation method thereof | |
Yuan et al. | Peeling off Nanometer‐Thick Ferromagnetic Layers and Their van der Waals Heterostructures | |
Li et al. | Effect of the thermal stress on the defect evolution at GaAs/Si wafer bonding with a-Ge intermediate layer | |
US20150014824A1 (en) | Method for fabricating a semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |