CN103744330A - Thermocouple and thermal resistance analog signal conditioning card of dispersive actuation system DAS - Google Patents
Thermocouple and thermal resistance analog signal conditioning card of dispersive actuation system DAS Download PDFInfo
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- CN103744330A CN103744330A CN201310748576.1A CN201310748576A CN103744330A CN 103744330 A CN103744330 A CN 103744330A CN 201310748576 A CN201310748576 A CN 201310748576A CN 103744330 A CN103744330 A CN 103744330A
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Abstract
The invention relates to a thermocouple and thermal resistance analog signal conditioning card of a dispersive actuation system DAS. The thermocouple and thermal resistance analog signal conditioning card comprises an FPGA (field programmable gate array) processing module, analog signal conditioning cards, AD (analog-digital) sampling modules, an FRAM (ferroelectric random access memory) module, an RS485 communication module and a power circuit, wherein thermocouple/thermal resistance analog signals are respectively sent into the four isolation AD sampling modules for analog-digital conversion after being respectively converted into a voltage signal with 0-60mV and a resistance signal with 18.52-329.64 ohms through the four isolation analog signal conditioning cards, and digital signals are output; the digital signals enter the FPGA processing module; a cold-end compensation analog signal enters the single analog signal conditioning card and is converted into temperature engineering quantity data which is sent into the single isolation AD sampling module for analog-digital conversion, and the FPGA processing module reads a calibration value stored in the FRAM module at the same time and outputs the calibration value to the RS485 module. The thermocouple and thermal resistance analog signal conditioning card of the DAS is high in precision index and high in response speed and can meet a standard of the IEC584 (international electrotechnical commission).
Description
Technical field
The invention belongs to signal processing technology field, be specifically related to a kind of diversity based on FPGA technology and drive DAS system hot thermocouple resistance simulation signal condition fastener.
Background technology
In third generation digitizing AP1000 control systems of nuclear power plant, according to different nuclear safety classifications, adopt safe level and two different platforms of non-security level to realize safety control function.Safe level platform protects and safety detecting system (protection and safety monitoring system, PMS), the function of realization response heap protection system; Non-security level platform is control system of power plant (plant control system, PLS), realizes the most control function of nuclear island/conventional island/power plant auxiliary facility (balance of plant, BoP).The security function that these may be subject to common cause fault impact is grouped together, and has just formed diversity drive system (dispersive actuation system, DAS).DAS is the isolated system being independent of outside PMS and PLS.When protection and the extremely low common cause fault of safety detecting system probability of occurrence, DAS system is used for triggering reactor emergency shut-down and halt turbines, and the probability of reduction core meltdown and containment superpressure, plays the effect of PMS and PLS back-up system.
Because DAS system is the standby property system of protection and safety detecting system PMS and control system of power plant PLS; therefore it adopts structure, the hardware and software that is different from PMS and PLS, and this is also the important measures of AP1000 control systems of nuclear power plant aspect raising security measures.DAS system is a complete hardware based system, there is no software control, and master chip adopts FPGA(field programmable gate array), hardware description language is selected VHDL and Verilog HDL.All communication and data processing function are all to realize in FPGA.
Hot thermocouple resistance simulation signal condition fastener plays input hot thermocouple resistance simulation signal in DAS system, and changes, and by RS485 or optical fiber output fixed-point number engineering value, gives the intrasystem definite value module of DAS, display module or communication module.The calibration value k that hot thermocouple resistance conditioning fastener can also received communication module sends, the linear conversion A of b and quantities, B value.
Summary of the invention
The present invention be directed to DAS system and safety detecting system PMS, the incompatible problem of control system of power plant PLS, proposed a species diversity and driven DAS system hot thermocouple resistance simulation signal condition fastener, can rapidly and accurately hot thermocouple resistance simulation signal have been converted to engineering value.
For achieving the above object, the technical solution used in the present invention is: a species diversity drives DAS system hot thermocouple resistance simulation signal condition fastener, comprise and take FPGA processing module, analog signal conditioner fastener, AD sampling module, FRAM module, RS485 communication module and the power circuit that FPGA is core, it is characterized in that: thermopair simulating signal is converted to and is sent into four tunnels isolation AD sampling modules after 0～60mV voltage signal and carry out analog to digital conversion by four tunnels isolation analog signal conditioner fasteners, and output digit signals enters FPGA processing module; Thermal resistance simulation signal is converted to and is sent into four tunnels isolation AD sampling modules after 18.52～329.64 Ω resistance signals and carry out analog to digital conversion by four tunnels isolation analog signal conditioner fasteners, and output digit signals enters FPGA processing module; Cold junction compensation simulating signal enters single channel analog signal conditioner fastener and is converted into and sends into single channel isolation AD sampling module after temperature quantities data and carry out analog to digital conversion, and output digit signals enters FPGA processing module; FPGA processing module reads the calibration value of FRAM module memory storage simultaneously, FPGA processing module is by two signal wire CE and the TXD of UART port, output to RS485 module, the signal that RS485 module gets CE and TXD signal wire converts differential signal to, sends to communication module or local display module.
Described four thermocouple voltages signal isolation AD sampling module He Si road, tunnel thermal resistance resistance signal isolation AD sampling modules receive after simulating signal, AD chip by eight isolation is converted to 24 true forms respectively, to isolate Ba road SPI serial communication mode, sends to FPGA processing module.
The true form that described FPGA processing module converts AD chip by eight passage SPI transceiver modules converts parallel data to from serial data and preserves, read the calibration value of FRAM module memory storage simultaneously, complement code to thermopair and cold junction compensation is demarcated computing, calibrated eight circuit-switched data are carried out respectively the processing of 40ms/80ms digital filtering, process the data of calculating and put into UART sending module, UART sending module, according to serial communication protocol, sends to data the UART output port of FPGA processing module.
The signal that described RS485 module gets CE and TXD signal wire, by magnetic isolating chip, enters RS485 and drives, and becomes differential signal.
Described FPGA processing module receives nominal data and the linear transformation coefficient of sending from communication module by RS485 module, and saves the data in the fixed address of FRAM module.
Beneficial effect of the present invention is: diversity of the present invention drives DAS system hot thermocouple resistance simulation signal condition fastener, adopt and nuclear power protection and safety monitoring system, the diverse design proposal of nuclear power plant's control system, be conducive to improve the safe class of AP1000 nuclear power system; Adopt hardware circuit and FPGA design, avoided Software for Design V & V authentication, accelerated development progress; Conditioning fastener adopts the RS485 communication of isolation, has improved system reliability; Conditioning fastener thermopair and thermal resistance precision index are high, and fast response time, meets IEC584 standard.Conditioning simulating signal sampling precision, sample rate or security performance based on FPGA technology all has the unexistent feature of other analog signal conditioner fasteners.
Accompanying drawing explanation
Fig. 1 is that diversity of the present invention drives DAS system hot thermocouple resistance simulation signal condition fastener theory diagram.
Embodiment
Diversity based on FPGA technology drives DAS system hot thermocouple resistance conditioning fastener theory diagram as shown in Figure 1, comprise and take the FPGA processing module 1 that FPGA is core, eight road analog signal conditioner fasteners 6, single channel analog signal conditioner fastener 6 ', eight road AD sampling modules 2, single channel AD sampling module 2 ', FRAM module 3, RS485 communication module 4 and power circuit 5, it is characterized in that: thermopair simulating signal is converted to and is sent into four tunnels isolation AD sampling modules after 0～60mV voltage signal and carry out analog to digital conversion by four tunnels isolation analog signal conditioner fasteners, output digit signals enters FPGA processing module, thermal resistance simulation signal is converted to and is sent into four tunnels isolation AD sampling modules after 18.52～329.64 Ω resistance signals and carry out analog to digital conversion by four tunnels isolation analog signal conditioner fasteners, and output digit signals enters FPGA processing module, cold junction compensation simulating signal enters single channel analog signal conditioner fastener and is converted into and sends into single channel isolation AD sampling module after temperature quantities data and carry out analog to digital conversion, and output digit signals enters FPGA processing module, FPGA processing module reads the calibration value of FRAM module memory storage simultaneously, FPGA processing module is by two signal wire CE and the TXD of UART port, output to RS485 module, the signal that RS485 module gets CE and TXD signal wire converts differential signal to, sends to communication module or local display module.
Described four thermocouple voltages signal isolation AD sampling module He Si road, tunnel thermal resistance resistance signal isolation AD sampling modules receive after simulating signal, AD chip by eight isolation is converted to 24 true forms respectively, to isolate Ba road SPI serial communication mode, sends to FPGA processing module.
The true form that described FPGA processing module converts AD chip by eight passage SPI transceiver modules converts parallel data to from serial data and preserves, read the calibration value of FRAM module memory storage simultaneously, complement code to thermopair and cold junction compensation is demarcated computing, calibrated eight circuit-switched data are carried out respectively the processing of 40ms/80ms digital filtering, process the data of calculating and put into UART sending module, UART sending module, according to serial communication protocol, sends to data the UART output port of FPGA processing module.
The signal that described RS485 module gets CE and TXD signal wire, by magnetic isolating chip, enters RS485 and drives, and becomes differential signal.
Described FPGA processing module receives nominal data and the linear transformation coefficient of sending from communication module by RS485 module, and saves the data in the fixed address of FRAM module.
Embodiment mono-: with the thermopair analog signal conditioner function of cold junction compensation
When the simulating signal of input is thermopair (T-shaped, K type, E type, N-type, J type, Type B, S type, R type), first by four road analog signal conditioner fasteners 6, analog signal processing, be that 0～60mV voltage signal is sent into respectively four AD sampling modules 2, after receiving simulating signal, AD chip is converted to respectively 24 true forms by it, with isolation Si road SPI serial communication mode, send to FPGA, the isolation of SPI adopts magnetic coupling, has guaranteed that on-site signal and control circuit isolate mutually, separate.The cold junction compensation simulating signal of thermopair Pt100 type, entering single channel analog signal conditioner fastener is converted into and sends into single channel isolation AD sampling module after temperature quantities data and carry out analog to digital conversion, AD chip is converted to respectively 24 true forms by it, and output digit signals enters FPGA processing module with single channel SPI serial communication mode.The true form that FPGA converts AD chip by SPI transceiver module converts parallel data to from serial data and preserves, high 16 that get in 24 are carried out code value conversion, guarantee precision, from true form, be converted to complement code, facilitate data operation, read the calibration value k1～k4 of storage in FRAM simultaneously, k9 and b1～b4, b9, the complement code of thermopair is carried out to the demarcation computing of k1～4x+b1～4, the complement code of cold junction compensation Pt100 is carried out to the demarcation computing of k9x+b9, calibrated four circuit-switched data and cold junction compensation value are carried out respectively the processing of 40ms/80ms digital filtering, increase data stability.Afterwards this four circuit-switched data is added with cold junction compensation value respectively, thermocouple signal after being compensated, using this as the non-linear anti-address of tabling look-up of thermopair, in FRAM, read corresponding 16 bit data in this address, be 2 byte Practical Project values of thermopair, the fixed point position of then filling 1 byte, wherein thermocouple signal engineering value is without radix point.The definition of radix point byte sees the following form:
| Radix point byte | Scale |
| 00000001 | Without radix point |
| 00000010 | 1 radix point |
| 00000100 | 2 radix point |
So the radix point byte of thermopair simulating signal is 0x01, in last FPGA, also organized the diagnosis code of a byte, together with 2 byte engineering values and 1 byte radix point position, put into UART sending module.UART sending module, according to serial communication protocol, sends to these data the UART output port of FPGA.The UART port one of FPGA has two signal wires, and CE and TXD enter RS485 module.In RS485 module, CE and TXD, by magnetic isolating chip, enter RS485 and drive, and become differential signal, send to communication module or local display module.
Conditioning fastener can also receive nominal data and the linear transformation coefficient of sending from communication module by RS485 module, and these data are kept in the fixed address of FRAM, for the computing of AD sampled data for the first time after powering on, realize the warm connection function of conditioning fastener.
Embodiment bis-: thermal resistance simulation signal condition function
When thermal resistance (Pt100) simulating signal enters this fastener, first by four road analog signal conditioner fasteners 6, the resistance signal that is 18.52～329.64 Ω analog signal processing is sent into respectively four road AD sampling modules 2, after receiving simulating signal, AD chip is converted into 24 true forms, the SPI serial communication mode of Yi Si road isolation sends to FPGA, the isolation of SPI adopts magnetic coupling, has guaranteed that on-site signal and control circuit isolate mutually, separate.The true form that FPGA converts AD chip by SPI transceiver module converts parallel data to from serial data and preserves, high 16 that get in 24 are carried out code value conversion, guarantee precision, from true form, be converted to complement code, facilitate data operation, read calibration value k5～k8 and the b5～b8 of storage in FRAM simultaneously, complement code is carried out to the demarcation computing of k5～8x+b5～8, calibrated data are carried out the processing of 40ms/80ms digital filtering, increase data stability.Because thermal resistance signal does not have cold junction compensation function, therefore through filtered data directly as the non-linear anti-address of tabling look-up of thermal resistance, read the 2 byte thermal resistance Practical Project values of storing in FRAM, finally fill the fixed point position of 1 byte, wherein thermal resistance signal engineering value is 1 radix point.The definition of radix point byte sees the following form:
| Radix point byte | Scale |
| 00000001 | Without radix point |
| 00000010 | 1 radix point |
| 00000100 | 2 radix point |
So the radix point byte of thermal resistance signal is 0x02, in last FPGA, also organized the diagnosis code of a byte, together with 2 byte engineering values and 1 byte radix point position, put into UART sending module.UART sending module, according to serial communication protocol, sends to these data the UART output port of FPGA.The UART port one of FPGA has two signal wires, and CE and TXD enter RS485 module; In RS485 module, CE and TXD, by magnetic isolating chip, enter RS485 and drive, and become differential signal, send to communication module or local display module.
Conditioning fastener can also receive nominal data and the linear transformation coefficient of sending from communication module by RS485 module, and these data are kept in the fixed address of FRAM, for the computing of AD sampled data for the first time after powering on, realize the warm connection function of conditioning fastener.
Due to analog signal conditioner fastener 6 You Ba roads, corresponding AD sampling module 2 and SPI interface Ye You eight tunnels, therefore can accept simultaneously and process thermopair simulating signal and thermal resistance simulation signal.
Claims (5)
1. a species diversity drives DAS system hot thermocouple resistance simulation signal condition fastener, comprise and take FPGA processing module, analog signal conditioner fastener, AD sampling module, FRAM module, RS485 communication module and the power circuit that FPGA is core, it is characterized in that: thermopair simulating signal is converted to and is sent into four tunnels isolation AD sampling modules after 0～60mV voltage signal and carry out analog to digital conversion by four tunnels isolation analog signal conditioner fasteners, and output digit signals enters FPGA processing module; Thermal resistance simulation signal is converted to and is sent into four tunnels isolation AD sampling modules after 18.52～329.64 Ω resistance signals and carry out analog to digital conversion by four tunnels isolation analog signal conditioner fasteners, and output digit signals enters FPGA processing module; Cold junction compensation simulating signal enters single channel analog signal conditioner fastener and is converted into and sends into single channel isolation AD sampling module after temperature quantities data and carry out analog to digital conversion, and output digit signals enters FPGA processing module; FPGA processing module reads the calibration value of FRAM module memory storage simultaneously, FPGA processing module is by two signal wire CE and the TXD of UART port, output to RS485 module, the signal that RS485 module gets CE and TXD signal wire converts differential signal to, sends to communication module or local display module.
2. diversity drives DAS system hot thermocouple resistance simulation signal condition fastener according to claim 1, it is characterized in that: described four thermocouple voltages signal isolation AD sampling module He Si road, tunnel thermal resistance resistance signal isolation AD sampling modules receive after simulating signal, AD chip by eight isolation is converted to 24 true forms respectively, to isolate Ba road SPI serial communication mode, sends to FPGA processing module.
3. diversity drives DAS system hot thermocouple resistance simulation signal condition fastener according to claim 2, it is characterized in that: the true form that described FPGA processing module converts AD chip by eight passage SPI transceiver modules converts parallel data to from serial data and preserves, read the calibration value of FRAM module memory storage simultaneously, complement code to thermopair and cold junction compensation is demarcated computing, calibrated eight circuit-switched data are carried out respectively the processing of 40ms/80ms digital filtering, process the data of calculating and put into UART sending module, UART sending module is according to serial communication protocol, data are sent to the UART output port of FPGA processing module.
4. diversity drives DAS system hot thermocouple resistance simulation signal condition fastener according to claim 1, it is characterized in that: the signal that described RS485 module gets CE and TXD signal wire, by magnetic isolating chip, enters RS485 and drives, and becomes differential signal.
5. diversity drives DAS system hot thermocouple resistance simulation signal condition fastener according to claim 1, it is characterized in that: described FPGA processing module receives nominal data and the linear transformation coefficient of sending from communication module by RS485 module, and saves the data in the fixed address of FRAM module.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105320021A (en) * | 2014-07-30 | 2016-02-10 | 北京国电智深控制技术有限公司 | Analog thermal resistance output device |
| CN113721480A (en) * | 2021-08-13 | 2021-11-30 | 中广核工程有限公司 | Simulation method and system for diversified protection signals of nuclear power plant |
-
2013
- 2013-12-31 CN CN201310748576.1A patent/CN103744330A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105320021A (en) * | 2014-07-30 | 2016-02-10 | 北京国电智深控制技术有限公司 | Analog thermal resistance output device |
| CN113721480A (en) * | 2021-08-13 | 2021-11-30 | 中广核工程有限公司 | Simulation method and system for diversified protection signals of nuclear power plant |
| CN113721480B (en) * | 2021-08-13 | 2023-07-07 | 中广核工程有限公司 | Nuclear power plant diversified protection signal simulation method and system |
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