CN103731125B - A kind of both-end application process of asymmetric high-pressure MOS component - Google Patents

Abstract

The present invention provides the both-end application process of a kind of asymmetric high-pressure MOS component, two respective sources of asymmetric high-pressure MOS component is connected with substrate terminal including (1)；And asymmetric for the two high-pressure MOS component taked the mode connected back-to-back to concatenate by (2).For the selected technique that there is not symmetrical high voltage MOS device, utilize its existing device to carry out circuit and layout design just can be cost-effective with complete design demand.Especially needing the occasion of high reliability circuit at some, the part category that circuit design need not be provided by highly reliable technique few in number itself again is unsatisfactory for requiring to be limited.Whether, in terms of process choice, symmetrical high voltage MOS device need not be provided to be limited by technique, process choice is more flexible.

Description

A kind of both-end application process of asymmetric high-pressure MOS component

Technical field

The invention belongs to technical field of composite signal integrated circuits, in particular it relates to a kind of asymmetric high-pressure MOS The both-end application process of device, is mainly used in solving high voltage analog switch etc. pressure to high-pressure MOS component both-end Needs of problems.

Background technology

In fields such as data acquisition, Industry Control, remote measurement remote sensing and communications, analog switch plays increasingly Important effect.The indexs such as the conducting resistance of analog switch, the linearity, isolation are that current numerous simulation is opened Closing the important indicator pursued, its development is more ripe.But, analog switch is at high power supply voltage, height Development in terms of signal voltage is the slowest, even there is bottleneck.This is because, most of techniques carry The high-pressure MOS component of confession is asymmetrical high-pressure MOS component, and asymmetrical high-pressure MOS component can only be unilateral Bear high pressure, it is impossible to meet the on-off circuit demand to MOS switch pipe bidirectional applications.The restriction of structure becomes One of bottleneck of high voltage analog switch.Especially in some occasion higher to reliability requirement, to technique Requirement the highest, if selected technique is not provided that the high-pressure MOS component of symmetrical structure, high pressure simulation is opened The design closed just cannot complete.

Summary of the invention

The technical problem to be solved in the present invention is: for the high voltage analog switch need to symmetrical high voltage MOS device Ask, propose the both-end application process of a kind of asymmetric high-pressure MOS component, to solve high voltage analog switch to source End, the demand of the most high voltage bearing MOS device of drain terminal.This method realizes simple, need not again develop work Skill, reduces design cost, shortens the design cycle；Meet design needs the most admirably, achieve Well effect.

The present invention solves the technical scheme of above-mentioned technical problem employing and includes:

A kind of both-end application process of asymmetric high-pressure MOS component, including: (1) is by two asymmetric high pressure The respective source of MOS device is connected with substrate terminal；And asymmetric for the two high-pressure MOS component adopted by (2) The mode taking connection back-to-back concatenates.

Specifically, the mode connected back-to-back in step (2) is by two asymmetric high-pressure MOS components Source links together.

The both-end application process of the asymmetric high-pressure MOS component according to the present invention has useful technique effect；

1, for the selected technique that there is not symmetrical high voltage MOS device, its existing device is utilized to carry out circuit And layout design just can be cost-effective with complete design demand.Especially need high reliability device at some Occasion, the part category that circuit design need not be provided by highly reliable technique few in number itself again is unsatisfactory for The restriction required.

2, in terms of process choice, symmetrical high voltage MOS device whether need not be provided to be limited by technique, work Skill selects more flexible.

Accompanying drawing explanation

Fig. 1 is the circuit diagram of the asymmetric high-pressure MOS component both-end application according to the present invention；

Fig. 2 is the device architecture generalized section of non-symmetrical high PMOS device；

Fig. 3 is the device architecture generalized section of non-symmetrical high PMOS device both-end application；

Fig. 4 is the device architecture generalized section of non-symmetrical high nmos device；

Fig. 5 is the device architecture generalized section of non-symmetrical high nmos device both-end application；

Fig. 6 has been nmos device substrate with the drain terminal Equivalent conjunction equivalent circuit diagram of diode；

Fig. 7 is the equivalent circuit diagram of nmos device MOS conducting resistance and substrate source diodes in parallel；And

Fig. 8 is the port equivalent circuit signal of the asymmetric high pressure NMOS part both-end application according to the present invention Figure.

Detailed description of the invention

In order to make the object, technical solutions and advantages of the present invention clearer, below with high pressure NMOS As a example by the use of pipe, the both-end application process to the asymmetric high-pressure MOS component according to the present invention does further Describe in detail.Here, the illustrative examples of the present invention and explanation are for the purpose of illustration and description, and not It it is limitation of the invention.

The pressure parameter of the high tension apparatus that table 1 provides for certain technique.From table 1 it follows that for NMOS, PMOS and DMOS, source and drain end is pressure (VDS), drain terminal substrate terminal is pressure (VDB) all can reach the highest, But source substrate terminal is pressure, and (VSB) is but restricted.

Table 1

Usually, asymmetrical high-pressure MOS component, its source and drain end is pressure, and (VDS) is of a relatively high, and drain terminal serves as a contrast The end is pressure (VDB), and pressure with source and drain end (VDS) is identical, and due to requirements such as doping contents, source substrate is resistance to Pressure (VSB) has the biggest restriction.

In the circuit such as high voltage analog switch, it is desirable to the MOS device serving as switch role has two-way admittance spy Property, this source just requiring MOS device and drain terminal can exchange, owing to its substrate is fixing, it is desirable to Drain substrate is pressure (VDB), and pressure with source-substrate end (VSB) is identical, can bear high pressure.By two The individual respective source of asymmetric high-pressure MOS component is connected with substrate terminal, then by the two source with substrate terminal even The asymmetric high-pressure MOS component connect takes the mode connected back-to-back to concatenate, to complete symmetrical high MOS The function that device can complete.Such device can ensure that the pressure of source, drain terminal and substrate all conforms to Ask, thus meet in application scenarios such as high voltage analog switches bidirectional applications and two-way high voltage bearing MOS device Demand.

Fig. 4 is the generalized section of an asymmetric high pressure NMOS part.Wherein, NSUB49 is N-type lining The end；PWELL47 is p-well region；PDIFF45 is p type diffusion region, connects for doing current potential for p-well region Touch, as the substrate BULK41 of device；NDIFF46,48 it is N-type diffusion region, respectively as NMOS Source SOURCE42 of pipe and drain terminal DRAIN44.The concentration of PWELL47 is relatively low, nmos device drain terminal The pressure of DRAIN44 with PWELL47 can be of a relatively high；And nmos device source SOURCE42 and PWELL 47 pressure relatively low.If by the source of nmos device and substrate terminal short circuit, it is possible to avoid source Relatively small problem pressure with substrate terminal, from without making device face the problem that source is pressure with substrate terminal.

As it is shown in figure 5, the asymmetric NMOS high tension apparatus of two sources Yu substrate terminal short circuit is carried out back-to-back Concatenation.N-type diffusion region NDIFF57, p type diffusion region PDIFF58, PDIFF500 are expanded with N-type Dissipate district's NDIFF501 short circuit, collectively form the substrate B of compound NMOS tube⁰53；By grid G ATE505 with GATE506 short circuit, constitutes the substrate G of compound NMOS tube⁰52；N-type diffusion region NDIFF55 and NDIFF504 Source S respectively as compound NMOS tube⁰51 and drain terminal D⁰54.During device uses, source drain terminal Role can exchange, and the most just meeting device can two-way use and the two-way requirement bearing high pressure.? During layout design, that is placed by the physical location of two back-to-back metal-oxide-semiconductors is near as far as possible, reduces The potential difference brought due to cabling.

Fig. 2 is the generalized section of an asymmetric high voltage PMOS device.Wherein, NSUB29 is N-type lining The end, NDIFF25 is as the exit of device substrate；PWELL27 is p-well region；PDIFF26、28 For p type diffusion region, respectively as source SOURCE22 and the drain terminal DRAIN24 of PMOS.Such as Fig. 3 Shown in, two sources are carried out back-to-back concatenation with the asymmetric PMOS high tension apparatus of substrate terminal short circuit.Will P type diffusion region PDIFF37, N-type diffusion region NDIFF38, NDIFF300 and p type diffusion region PDIFF301 Short circuit, collectively forms the substrate B of compound PMOS⁰33；By grid end GATE305 and grid end GATE306 Short circuit, constitutes the substrate G of compound PMOS⁰32；P type diffusion region PDIFF35 Yu PDIFF304 is respectively Source S as compound PMOS⁰31 and drain terminal D⁰34。

The course of work of metal-oxide-semiconductor is analyzed as a example by NMOS tube.

Fig. 1 is asymmetric high pressure NMOS part and the circuit diagram of PMOS device both-end application.Such as Fig. 1 In (a)-(d) shown in, it is assumed that flow through the current direction of nmos device for end 11 to end 16, so 11 is the drain terminal of symmetrical device, and 16 is the source of symmetrical device.For being constituted by 11,12,13,17 NMOS tube N1, according to its cross-section structure, its source, drain terminal, grid end and substrate be the most corresponding 13,11, 17,12, its working condition is identical with the working condition of common NMOS tube: electric current is flowed to by drain terminal 11 Source 13, source 13 is connected with substrate 12, and it is corresponding that its logic connects with the physical connection of profile. For by 14,15,16,18 NMOS tube N2 constituted, according to its cross-section structure, its source, drain terminal, Grid end and substrate the most corresponding 16,14,18,15, but the flow direction of its electric current is to flow to 16 from 14, from Logic connects to be seen, the drain terminal of NMOS tube N2 is 14, and source is 16.Therefore can be by the connection of this device Relation is interpreted as that 14 is the drain terminal of device, and 16 is the source of device, device substrate 15 interface unit drain terminal Current potential.Its equivalent structure schematic diagram is Fig. 8.Wherein 87, the 88 grid end collectively forming symmetrical nmos device G⁰, 81 is the drain terminal D of symmetrical nmos device⁰, 86 is source S of symmetrical nmos device⁰, 82,83,84, 85 substrate terminal B collectively forming symmetrical nmos device⁰。

The substrate of NMOS tube is P-type material, and drain terminal is n type material, and therefore the connected mode of N2 can wait Effect is for be connected to a diode between substrate 61 and drain terminal 62, and its equivalent circuit diagram is Fig. 6, as long as The potential difference of substrate electric potential and source class current potential is less than the conduction voltage drop of diode, and the course of work of device is still Identical with the course of normal operation of MOS device, MOS conducting resistance and substrate source two can be equivalent to The parallel connection of pole pipe, equivalent circuit diagram is Fig. 7.Drain terminal D71 Yu S72 of N2 is respectively as parallel resistance and two The positive and negative two ends of pole pipe.In normal operating conditions, the conducting resistance of metal-oxide-semiconductor is the least, its upper overcurrent The pressure drop of rear generation is not enough so that the diode current flow of parallel connection, therefore keeps the on state characteristic of metal-oxide-semiconductor.Even if Occur in that the conducting resistance of metal-oxide-semiconductor very greatly or flows through the electric current of metal-oxide-semiconductor very greatly, so that diode current flow Situation, the course of work of device can also be equivalent to the course of work of a diode, for analog switch or The application of person LDO, still can meet requirement.

The unique impact issuable on device of this occupation mode is owing to device threshold is brought by body bias effect Impact.It is analyzed as follows:

The device threshold not considering the NMOS tube of body bias effect is:

$V_{\mathrm{TH}0}={\mathrm{\Φ}}_{\mathrm{MS}}+{2\mathrm{\Φ}}_F+\frac{Q_{\mathrm{dep}}}{C_{\mathrm{OX}}}---\left(1\right)$

Wherein, Φ_MSFor polysilicon gate and the magnitude of voltage of the difference of the work function of silicon substrate, Φ_FFor fermi level, Q_depFor the electric charge of depletion region, C_OXGate oxide capacitance for unit area.Φ_FExpression formula beWherein, k is Boltzmann constant, and q is electron charge, and T is temperature, N_subFor lining End doping content, ni is intrinsic carrier concentration.

Consider that the device threshold voltage after body bias effect is:

$V_{\mathrm{TH}}=V_{\mathrm{TH}0}+\mathrm{\γ}(\sqrt{|{2\mathrm{\Φ}}_F+V_{\mathrm{SB}}|}-\sqrt{\left|{2\mathrm{\Φ}}_F\right|})$

Wherein, V_TH0Be given by above formula (1),For body-effect coefficient, V_SB Electrical potential difference for source substrate terminal.The representative value of γ is at 0.3V^1/2To 0.4V^1/2Between.

For NMOS tube N2, V_SBFor N2 source, the potential difference of drain terminal of NMOS tube, turn at metal-oxide-semiconductor In the case of, its potential difference is the lowest, even if therefore in the case of considering body bias effect, and this connected mode The threshold value of N2 pipe is affected the most little.

Above-mentioned this connected mode of analytic explanation theoretically is practicable, both can utilize existing technique The asymmetric high voltage provided solves device bidirectional applications and the pressure problem of both-end, again will not be to device Impact can be brought.Actual flow test, also demonstrates feasibility and the validity of this method.Therefore, All demonstrate in terms of theory analysis and actual test two this method be feasible effectively.

Mode and the principle of the application of PMOS both-end are similar with NMOS, repeat no more.

It should be noted that it will be appreciated to those of skill in the art that in superincumbent description and retouch the most in detail The content stated is that those skilled in the art combine the content of this disclosure and prior art can be easily Realize, therefore, be not described in detail in this manual.

The foregoing is only the preferred embodiments of the present invention, be not used for limiting the scope of the invention.Right For those skilled in the art, on the premise of not paying creative work, the present invention can be made Some amendments and replacement, all such modifications and replacement all should be contained within protection scope of the present invention.

Claims (1)

1. the both-end application process of an asymmetric high-pressure MOS component, it is characterised in that comprise the following steps:

(1) two respective sources of asymmetric high-pressure MOS component are connected with substrate terminal；

(2) being connected by the grid end of two asymmetric high-pressure MOS components, source links together, and is formed compound MOS device, using connected grid end as the grid end of compound MOS device, by one of them asymmetric high-pressure MOS The drain terminal of another asymmetric high-pressure MOS component, as the drain terminal of compound MOS device, is made by the drain terminal of device For the source of compound MOS device, the source linked together is as the substrate terminal of compound MOS device.