CN103699506B - Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device - Google Patents
Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device Download PDFInfo
- Publication number
- CN103699506B CN103699506B CN201210369694.7A CN201210369694A CN103699506B CN 103699506 B CN103699506 B CN 103699506B CN 201210369694 A CN201210369694 A CN 201210369694A CN 103699506 B CN103699506 B CN 103699506B
- Authority
- CN
- China
- Prior art keywords
- voltage domain
- subsystem
- data
- data signal
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000005540 biological transmission Effects 0.000 title claims abstract description 32
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000001360 synchronised effect Effects 0.000 claims abstract description 30
- 238000013500 data storage Methods 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 2
- 238000013461 design Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 2
- 108010076504 Protein Sorting Signals Proteins 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
Abstract
The invention discloses a crossing-voltage-domain data transmission method, a voltage domain subsystem and an electronic device. The crossing-voltage-domain data transmission method comprises the steps of receiving a first crossing-voltage-domain data signal transmitted by a second voltage domain subsystem of the electronic device and a first clock signal synchronous with a timing source of the first crossing-voltage-domain data signal through a first voltage domain subsystem of the electronic device; collecting the first crossing-voltage-domain data signal by utilizing the first clock signal to obtain first collection data. By adopting the scheme of the embodiment, the stable transmission of data between two voltage-domain subsystems can be more easily realized, and the difficulty for realizing the rear end of a chip can be alleviated.
Description
Technical field
The present invention relates to technical field of data transmission and low-power chip design field, more particularly to one kind is across voltage
Numeric field data transmission method, voltage domain subsystem and electronic equipment.
Background technology
With can the function of portable electronic products become increasingly complex, how to utilize limited battery energy in the most efficient manner
Amount become at present can portable electronic products design need one of major issue for solving, then reduce the design of power consumption and just become be
Irrespective of size chip SOC（System On Chip）The inevitable requirement of design.DVFS（Dynamic Voltage and Frenquency
Scaling, dynamic voltage frequency adjustment）While buck/boost, operating frequency, also with adjustment, is the effective of reduction power consumption
One of method.
At present, support that the SOC of DVFS adopts GALS substantially（Globally Asynchronous Locally
Synchronous, Global Asynchronous, local synchronization）Timing topology, data are transmitted between two voltage domain subsystems
When, the data signal of the clock signal used in two voltage domain subsystems and reception needs timing source synchronization, so as to realize
The stable synchronous transfer between two voltage domain subsystems of data.
However, in prior art, the clock signal that two voltage domain subsystems are used comes from same clock source, i.e.,
One clock source produces respectively respective clock signal for two voltage domain subsystems, and is sent respectively to corresponding voltage
Domain subsystem, uses for it, because the transmission path that the clock signal that the clock source is produced reaches two voltage domain subsystems can
Can be different, for example, transmission range is different, and the working condition such as residing voltage, frequency is also differed in transmitting procedure, can cause two
The sequential of the clock signal that individual voltage domain subsystem is used is difficult to synchronization, so as to the number for causing to be received in voltage domain subsystem
It is believed that it is number different from the clock signal sequential that gathered data is used, in turn result in chip back-end realization it is difficult to ensure that two electricity
The stable transmission of data between pressure domain subsystem.
The content of the invention
The embodiment of the present invention provides a kind of asynchronous interface method, voltage domain subsystem and electronic equipment, existing to solve
Because the data signal received in voltage domain subsystem and the clock signal sequential for using are difficult to synchronization present in technology, and lead
Data cannot stablize the problem of transmission between the two voltage domain subsystems for causing.
The embodiment of the present invention provides a kind of asynchronous interface method, including：
The first voltage domain subsystem of electronic equipment receive that the second voltage domain subsystem of the electronic equipment sends the
One across voltage domain data signal, and first clock signal synchronous with the described first across voltage domain data signal timing source；
First across the voltage domain data signal is gathered using first clock signal, the first gathered data is obtained.
The embodiment of the present invention also provides the voltage domain subsystem in a kind of electronic equipment, including：
Asynchronous interface receiving unit, the second voltage domain subsystem for receiving the electronic equipment send first across electricity
Pressure numeric field data signal, and first clock signal synchronous with the described first across voltage domain data signal timing source；
Asynchronous interface collecting unit, for using first clock signal collection, first across the voltage numeric field data letter
Number, obtain the first gathered data.
The embodiment of the present invention also provides a kind of electronic equipment, including：First voltage domain subsystem and second voltage domain subsystem
System, wherein：
Second voltage domain subsystem, for sending the first across voltage domain data signal to first voltage domain subsystem,
And first clock signal synchronous with the described first across voltage domain data signal timing source；
First voltage domain subsystem, for receiving the described first across voltage domain data signal, and when described first
Clock signal；And first across the voltage domain data signal is gathered using first clock signal, obtain the first gathered data.
In method provided in an embodiment of the present invention, in the electronic device second voltage domain subsystem is to first voltage domain subsystem
During system transmission data, second voltage domain subsystem is to the first synchronous across voltage domain number of first voltage domain subsystem transmission timing source
It is believed that number and the first clock signal so that first voltage domain subsystem can effectively be gathered using first clock signal
First across the voltage domain data signal, obtains the first gathered data.Using this method, the first synchronous across voltage domain number of timing source
It is believed that number reaching first voltage domain subsystem through identical path with the first clock signal such that it is able to so that first voltage domain
Subsystem effectively gathers the first synchronous across voltage domain data signal of timing source using the first clock signal, compares existing skill
Art, it is to avoid need the problem of the clock signal that synchronous two voltage domain subsystems are used such that it is able to be more easily implemented two
The stable transmission of data between individual voltage domain subsystem.
Description of the drawings
Fig. 1 is across the voltage domain data transmission method flow chart of one kind provided in an embodiment of the present invention；
Fig. 2 is across the voltage domain data transmission method flow chart of one kind that the embodiment of the present invention 1 is provided；
Fig. 3 is the structural representation of the voltage domain subsystem in a kind of electronic equipment that the embodiment of the present invention 2 is provided；
Fig. 4 is the structural representation of a kind of electronic equipment that the embodiment of the present invention 3 is provided.
Specific embodiment
The embodiment of the present invention provides a kind of across voltage domain data transmission method, as shown in figure 1, including：
Step S101, the first voltage domain subsystem of electronic equipment receive the second voltage domain subsystem of the electronic equipment and send out
The first across the voltage domain data signal sent, and the first clock letter synchronous with first across the voltage domain data signal timing source
Number.
Step S102, first across the voltage domain data signal is gathered using first clock signal, obtain the first collection number
According to.
Below in conjunction with the accompanying drawings, method, subsystem and the electronic equipment for being provided the present invention with specific embodiment is carried out in detail
Description.
Embodiment 1：
In the embodiment of the present invention 1, electronic equipment includes two voltage domain subsystems, first voltage domain subsystem and second electric
Pressure domain subsystem, for example, the first voltage domain subsystem can be CPU（Central Processing Unit, central authorities are processed
Device）Subsystem, the second voltage domain subsystem can be SOC subsystems；Or the first voltage domain subsystem can be SOC
System, the second voltage domain subsystem can be cpu subsystem.When carrying out data transmission between the two, can be using following number
According to transmission method, the data transmission method can also be applied in the chip of electronic equipment implement the mistake of dynamic voltage frequency adjustment
Cheng Zhong, by second voltage domain subsystem to as a example by the subsystem transmission data of first voltage domain, as shown in Fig. 2 the embodiment of the present invention 1
Across the voltage domain data transmission method for providing, specifically includes following process step：
Step S201, second voltage domain subsystem to first voltage domain subsystem sends the first across voltage domain data signal,
And first clock signal synchronous with first across the voltage domain data signal timing source.
Specifically, it is possible to use the first clock signal drive generate the first across voltage domain data signal so that
Both first clock signal data signal across voltage domain with first timing sources are synchronous, for example with the following two kinds mode：
First kind of way：Second voltage domain subsystem generates first for itself using by internal clock generating unit
Clock signal, and the first across voltage domain data signal of generation is driven using the first clock signal, so that the first clock
Both signal data signal across voltage domain with first timing sources are synchronous.
The second way：The clock source of electronic equipment internal generates the first clock signal, and is transferred to second voltage domain
System is used, and second voltage domain subsystem is driven using first clock signal for receiving and generates the first across voltage numeric field data letter
Number, so that both the first clock signal data signals across voltage domain with first timing source is synchronous.
Further, first across the voltage domain data signal can continue multiple cycles, and not obtain first voltage
Data are just sent before the answer signal that domain subsystem is returned.To realize not obtaining first voltage domain subsystem return response letter
Number allow for before sending data, the second voltage domain subsystem can in advance know that the data of the first voltage domain subsystem are deposited
Storage capacity, to ensure the data volume of a transmission data not over the data storage capacity, specific implementation can be adopted
Various modes of the prior art, here is no longer described in detail.
Step S202, the first voltage domain subsystem are receiving synchronous the first clock signal and first of timing source across electricity
After pressure numeric field data signal, first across the voltage domain data signal is gathered using first clock signal, obtains the first gathered data,
So as to complete second voltage domain subsystem to the data transfer of first voltage domain subsystem.
Step S203, further, in this step, first voltage domain subsystem can also be by the first gathered data for obtaining
In storing data queue.
Specifically, can be by the first acquired data storage to asynchronous FIFO（First Input First Output, first enter
First dequeue）In.
Step S204, first voltage domain subsystem are read using the second clock signal that itself is generated from the data queue
First gathered data of storage, so as to the data completed collection are transformed into the process of itself clock zone.Wherein, the second clock
Signal can also be generated and sent to give first voltage domain subsystem by the clock source of electronic equipment, use for it.
Accordingly, when first voltage domain subsystem is to second voltage domain subsystem transmission data, above-mentioned Fig. 2 can be adopted
Shown similar procedure, including：
First voltage domain subsystem to second voltage domain subsystem sends the second across voltage domain data signal, and with second
The synchronous second clock signal of across voltage domain data signal timing source；
Second voltage domain subsystem obtains second using the second clock signals collecting second across the voltage domain data signal
Gathered data.Specifically, second gathered data can continue to the first voltage domain second voltage domain subsystem for instruction
Subsystem sends the indication signal across voltage domain data signal；
Second voltage domain subsystem by the second acquired data storage for obtaining to the data queue of itself, and can also make
The second gathered data of storage is read from data queue with the first clock signal, when completing for the data of collection to be transformed into itself
The process in clock domain.
In the embodiment of the present invention 1, the voltage used due to first voltage domain subsystem and second voltage domain subsystem is not
Together, so, the signal for transmitting between the two can be through Level Shifter（Level conversion）Unit is transmitted, concrete to pass
Defeated process can adopt prior art, here to be no longer described in detail.
Using the embodiment of the present invention 1 provide scheme, between first voltage domain subsystem and second voltage domain subsystem
During transmission data, be the clock signal that uses itself and the data signal simultaneous transmission synchronous with clock signal timing source to
Other side, because the clock signal and data signal of transmission reach other side through identical path such that it is able to so that other side uses
Clock signal effectively gathers the synchronous data signal of timing source, and then can be more easily implemented between two voltage domain subsystems
The stable transmission of data, and can facilitating chip back-end realization difficulty.
Embodiment 2：
Based on same inventive concept, according to across the voltage domain data transmission method that the above embodiment of the present invention is provided, accordingly
Ground, the embodiment of the present invention 2 also provides the voltage domain subsystem in a kind of electronic equipment, and its structural representation is as shown in figure 3, bag
Include：
Asynchronous interface receiving unit 301, the second voltage domain subsystem for receiving electronic equipment send first across electricity
Pressure numeric field data signal, and first clock signal synchronous with first across the voltage domain data signal timing source；
Asynchronous interface collecting unit 302, for using the first clock signal collection first across voltage numeric field data letter
Number, obtain the first gathered data.
Above-mentioned asynchronous interface receiving unit 301 and asynchronous interface collecting unit 302 can collectively constitute asynchronous interface unit.
Further, above-mentioned voltage domain subsystem, also includes：
Source sync cap unit 303, for sending the second across voltage domain data signal to the second voltage domain subsystem, with
And the second clock signal synchronous with second across the voltage domain data signal timing source, for being made by the second voltage domain subsystem
With the second clock signals collecting second across the voltage domain data signal, the second gathered data is obtained.
Further, above-mentioned asynchronous interface collecting unit 302, is additionally operable to the first acquired data storage that will be obtained to data
In queue；And the second clock signal generated using this voltage domain subsystem is read the first of storage from the data queue and is adopted
Collection data.
Embodiment 3：
Based on same inventive concept, according to across the voltage domain data transmission method that the above embodiment of the present invention is provided, accordingly
Ground, the embodiment of the present invention 3 also provides a kind of electronic equipment, its structural representation as shown in figure 4, including：First voltage domain subsystem
System 402 and second voltage domain subsystem 401, wherein：
Second voltage domain subsystem 401, for sending the first across voltage numeric field data letter to first voltage domain subsystem 402
Number, and first clock signal synchronous with first across the voltage domain data signal timing source；
First voltage domain subsystem 402, for receiving first across the voltage domain data signal, and the first clock letter
Number；And first across the voltage domain data signal is gathered using first clock signal, obtain the first gathered data.
Further, above-mentioned first voltage domain subsystem 402, is additionally operable to send second to second voltage domain subsystem 401
Across voltage domain data signal, and the second clock signal synchronous with second across the voltage domain data signal timing source；
Above-mentioned second voltage domain subsystem 401, is additionally operable to receive the second across voltage domain data signal, and second clock letter
Number, and using the second clock signals collecting second across the voltage domain data signal, obtain the second gathered data.
In sum, scheme provided in an embodiment of the present invention, including：The first voltage domain subsystem of electronic equipment is received should
The first across voltage domain data signal that the second voltage domain subsystem of electronic equipment sends, and with first across the voltage numeric field data
The first synchronous clock signal of signal sequence source；First across the voltage domain data signal is gathered using first clock signal, is obtained
To the first gathered data.Using scheme provided in an embodiment of the present invention, can be easier to realize between two voltage domain subsystems
The stable transmission of data, and can facilitating chip back-end realization difficulty.
Obviously, those skilled in the art can carry out the essence of various changes and modification without deviating from the present invention to the present invention
God and scope.So, if these modifications of the present invention and modification belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising these changes and modification.
Claims (10)
1. across the voltage domain data transmission method of one kind, it is characterised in that include：
The first voltage domain subsystem of electronic equipment receive that the second voltage domain subsystem of the electronic equipment sends first across
Voltage domain data signal, and first clock signal synchronous with the described first across voltage domain data signal timing source, concrete bag
Include：Using the first clock signal drive generate the first across voltage domain data signal so that the first clock signal with first across
The timing source synchronization of both voltage domain data signals；
First across the voltage domain data signal is gathered using first clock signal, the first gathered data is obtained.
2. the method for claim 1, it is characterised in that also include：
First voltage domain subsystem to second voltage domain subsystem sends the second across voltage domain data signal, Yi Jiyu
The synchronous second clock signal of second across the voltage domain data signal timing source, for being made by second voltage domain subsystem
With the second across voltage domain data signal described in the second clock signals collecting, the second gathered data is obtained.
3. the method for claim 1, it is characterised in that also include：
By first acquired data storage for obtaining in data queue；
The second clock signal generated using itself reads first gathered data of storage from the data queue.
4. the method as described in claim 1-3 is arbitrary, it is characterised in that first voltage domain subsystem is central processing unit
Cpu subsystem, second voltage domain subsystem is system level chip SOC subsystems；Or
First voltage domain subsystem is SOC subsystems, and second voltage domain subsystem is cpu subsystem.
5. the first voltage domain subsystem in a kind of electronic equipment, it is characterised in that include：
Asynchronous interface receiving unit, the second voltage domain subsystem for receiving the electronic equipment send first across voltage domain
Data signal, and first clock signal synchronous with the described first across voltage domain data signal timing source, specifically include：Use
First clock signal drives and generates the first across voltage domain data signal, so that the first clock signal and the first across voltage domain number
It is believed that number both timing source synchronizations；
Asynchronous interface collecting unit, for gathering first across the voltage domain data signal using first clock signal, obtains
To the first gathered data.
6. first voltage domain as claimed in claim 5 subsystem, it is characterised in that also include：
Source sync cap unit, for sending the second across voltage domain data signal, Yi Jiyu to second voltage domain subsystem
The synchronous second clock signal of second across the voltage domain data signal timing source, for being made by second voltage domain subsystem
With the second across voltage domain data signal described in the second clock signals collecting, the second gathered data is obtained.
7. first voltage domain as claimed in claim 5 subsystem, it is characterised in that the asynchronous interface collecting unit, also uses
In by first acquired data storage for obtaining in data queue；And generated using first voltage domain subsystem
Second clock signal reads first gathered data of storage from the data queue.
8. the first voltage domain subsystem as described in claim 5-7 is arbitrary, it is characterised in that first voltage domain subsystem
For central processor CPU subsystem, second voltage domain subsystem is system level chip SOC subsystems；Or
First voltage domain subsystem is SOC subsystems, and second voltage domain subsystem is cpu subsystem.
9. a kind of electronic equipment, it is characterised in that include：First voltage domain subsystem and second voltage domain subsystem, wherein：
Second voltage domain subsystem, for sending the first across voltage domain data signal to first voltage domain subsystem, and
First clock signal synchronous with the described first across voltage domain data signal timing source, specifically includes：Using the first clock signal
Drive and generate the first across voltage domain data signal, so that when both the first clock signal and first across voltage domain data signal
The synchronization of sequence source；
First voltage domain subsystem, for receiving the described first across voltage domain data signal, and first clock letter
Number；And first across the voltage domain data signal is gathered using first clock signal, obtain the first gathered data.
10. electronic equipment as claimed in claim 9, it is characterised in that first voltage domain subsystem, is additionally operable to second
Voltage domain subsystem sends the second across voltage domain data signal, and synchronous with the described second across voltage domain data signal timing source
Second clock signal；
Second voltage domain subsystem, is additionally operable to receive second across the voltage domain data signal, and the second clock
Signal, and using the second across voltage domain data signal described in the second clock signals collecting, obtain the second gathered data.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210369694.7A CN103699506B (en) | 2012-09-27 | 2012-09-27 | Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device |
| PCT/CN2013/084428 WO2014048364A1 (en) | 2012-09-27 | 2013-09-27 | Inter-voltage-domain data transmission method, voltage domain sub-system, and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210369694.7A CN103699506B (en) | 2012-09-27 | 2012-09-27 | Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103699506A CN103699506A (en) | 2014-04-02 |
| CN103699506B true CN103699506B (en) | 2017-04-12 |
Family
ID=50361039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210369694.7A Expired - Fee Related CN103699506B (en) | 2012-09-27 | 2012-09-27 | Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103699506B (en) |
| WO (1) | WO2014048364A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109960851B (en) * | 2019-02-22 | 2023-04-28 | 南方电网科学研究院有限责任公司 | Data transmission method based on different voltage domains and handshake protocol circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101512900A (en) * | 2006-08-31 | 2009-08-19 | 飞思卡尔半导体公司 | Level shifting circuit |
| CN102129286A (en) * | 2010-01-15 | 2011-07-20 | 炬力集成电路设计有限公司 | Real-time clock circuit and chip and digital equipment containing real-time clock circuit |
| CN102656540A (en) * | 2009-12-14 | 2012-09-05 | 波音公司 | System and method of controlling devices operating within different voltage ranges |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7545900B2 (en) * | 2005-11-15 | 2009-06-09 | Lsi Corporation | Low jitter and/or fast lock-in clock recovery circuit |
| US7733127B2 (en) * | 2008-01-25 | 2010-06-08 | St-Ericsson Sa | Circuits and methods for communicating data between domains during voltage and frequency shifting |
| US8058900B1 (en) * | 2008-04-14 | 2011-11-15 | Marvell Israel (M.I.S.L) Ltd. | Method and apparatus for clocking |
-
2012
- 2012-09-27 CN CN201210369694.7A patent/CN103699506B/en not_active Expired - Fee Related
-
2013
- 2013-09-27 WO PCT/CN2013/084428 patent/WO2014048364A1/en active Application Filing
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101512900A (en) * | 2006-08-31 | 2009-08-19 | 飞思卡尔半导体公司 | Level shifting circuit |
| CN102656540A (en) * | 2009-12-14 | 2012-09-05 | 波音公司 | System and method of controlling devices operating within different voltage ranges |
| CN102129286A (en) * | 2010-01-15 | 2011-07-20 | 炬力集成电路设计有限公司 | Real-time clock circuit and chip and digital equipment containing real-time clock circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103699506A (en) | 2014-04-02 |
| WO2014048364A1 (en) | 2014-04-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103199603B (en) | Piezoelectricity power generation charging system and electronic equipment using piezoelectricity power generation charging system | |
| CN101387896B (en) | Method and device for implementing system-on-chip wake and sleep function in SOC | |
| CN103699506B (en) | Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device | |
| CN204652667U (en) | Based on the vessel position analysis application system of portable data acquisition terminal | |
| CN204157137U (en) | Based on the LED light cube control circuit of wireless power transmission | |
| CN203596667U (en) | Wireless memory based on magnetic coupling resonant mode power supply | |
| CN106100821A (en) | A kind of chaos encryption data collecting system | |
| CN102437614A (en) | Energy-saving type portable electronic equipment and method for realizing energy reutilization based on same | |
| CN205483079U (en) | Ground water level detecting system based on big dipper | |
| CN204028361U (en) | Wireless double frequency sonar fish deteclor device and system thereof | |
| CN102981642B (en) | Cloud terminal mouse and realization method thereof | |
| CN202758068U (en) | Ultrasonic transmitting device and ultrasonic positioning system | |
| CN101515729B (en) | Wireless charging device and receiving-end device thereof | |
| CN204179760U (en) | The computer peripheral electronic equipment that wireless charging is powered | |
| CN210609456U (en) | 5G display device | |
| CN203299780U (en) | Driver circuit for double touch panels, touch panel terminal and mobile terminal | |
| CN103885366B (en) | A kind of communication device of converter control system | |
| CN203520620U (en) | Serial port transceiver device | |
| CN206628901U (en) | A kind of ultrasonic wireless group, which fills, to put | |
| CN218066734U (en) | Asymmetric low-cost triaxial high-frequency vibration sensor | |
| CN110995363B (en) | High-speed half-duplex ultrasonic communication device with short distance between modules | |
| CN204465524U (en) | A kind of wireless transmission circuit based on surface acoustic wave | |
| CN202153340U (en) | Screen and touch pen using bluetooth for sending images | |
| CN105186657A (en) | Electronic device, charging method thereof, and ultrasonic wave generating device and method | |
| CN205175548U (en) | Vibration signal sensing device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Application publication date: 20140402 Assignee: Xi'an Chris Semiconductor Technology Co.,Ltd. Assignor: SANECHIPS TECHNOLOGY Co.,Ltd. Contract record no.: 2019440020036 Denomination of invention: Crossing-voltage-domain data transmission method, voltage domain subsystem and electronic device Granted publication date: 20170412 License type: Common License Record date: 20190619 |
|
| EE01 | Entry into force of recordation of patent licensing contract | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170412 |