CN103681945A - Manufacturing method of solar cell - Google Patents
Manufacturing method of solar cell Download PDFInfo
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- CN103681945A CN103681945A CN201210348222.3A CN201210348222A CN103681945A CN 103681945 A CN103681945 A CN 103681945A CN 201210348222 A CN201210348222 A CN 201210348222A CN 103681945 A CN103681945 A CN 103681945A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 52
- 239000000758 substrate Substances 0.000 claims abstract description 50
- 230000004888 barrier function Effects 0.000 claims description 53
- 238000007747 plating Methods 0.000 claims description 18
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- 238000009713 electroplating Methods 0.000 abstract description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 239000000463 material Substances 0.000 description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 8
- 238000003466 welding Methods 0.000 description 8
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002002 slurry Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 6
- 238000000576 coating method Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000005245 sintering Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- PEUPIGGLJVUNEU-UHFFFAOYSA-N nickel silicon Chemical compound [Si].[Ni] PEUPIGGLJVUNEU-UHFFFAOYSA-N 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000007581 slurry coating method Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 238000004513 sizing Methods 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/02002—Arrangements for conducting electric current to or from the device in operations
- H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
- H01L31/02008—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules
- H01L31/0201—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules comprising specially adapted module bus-bar structures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
A manufacturing method of a solar cell comprises the steps of forming an insulating layer provided with a plurality openings on a substrate, forming a plurality of first electrode parts on the insulating layer and among the openings, thermally processing to enable the first electrode parts to pass through the insulating layer and be connected with the substrate, then forming a second electrode part in an electroplating manner, wherein the second electrode part is connected to the first electrode part and is connected with the substrate through the openings of the insulating layer. In addition, the first electrode part can also be firstly formed on the insulating layer not perforated, and the insulating layer is perforated after thermal processing. The first electrode part and the second electrode part are formed through two different processes, so that the advantages of low manufacturing cost and excellent binding force between layers of a cell are achieved.
Description
Technical field
The present invention relates to a kind of manufacture method of solar cell, particularly relate to a kind of manufacture method of silicon wafer solar cell.
Background technology
Known silicon wafer solar battery structure, mainly comprises: a substrate, one and this substrate emitter layer, of forming p-n junction is positioned at anti-reflecting layer on this emitter layer and for a front electrode and a backplate of conduction current.Wherein, the material of this anti-reflecting layer is silicon nitride (SiNx) for example, can be used for promoting the light quantity that enters of battery front side.This front electrode comprises the finger electrode (finger bar electrode) of at least one bus electrode (bus bar electrode) and a plurality of horizontal these bus electrodes of connection.On making, this bus electrode and described finger electrode can form by wire mark metal paste, but along with the price of metal paste constantly raises, especially conductivity silver slurry expensive preferably, in order to reduce the production cost of solar cell, utilize plating mode to form electrode, can remove from and use expensive silver slurry, the another kind that has therefore become many battery manufactures factory is selected.
And before electroplating, must the part surface of this emitter layer be exposed prior to the suitable position perforate of this anti-reflecting layer, and hole shape be equivalent to the shape of bus electrode.Follow-uply with plating mode, make this bus electrode, this bus electrode just can directly contact by perforate this emitter layer surface, to form electrical connection.
Although electro-plating method can reduce production costs, still there is other problem to overcome.Because after battery manufacture completes, must with welding wire (ribbon), be welded on the bus electrode of battery in addition, so that a plurality of battery serial connections are formed to battery modules.And utilize the greatest problem of electroplating making front electrode to be, after welding wire and bus electrode welding, adhesive force between bus electrode and substrate is not good, the not good possible cause of this adhesive force is as follows: before plating, after this anti-reflecting layer perforate, still have residual silicon nitride to exist, the plated metal (conventionally comprising nickel) that this residual silicon nitride can hinder this bus electrode forms nickel-silicon compound (Ni Silicide) with this emitter layer, cause an inhomogeneous nickel-silicon compound film, thereby reduced and electroplated the bus electrode of formation and the adhesive force between silicon, while adding welding welding wire, inevitably can produce active force or have other impact each layer of body of battery, and then cause the adhesive force between bus electrode and substrate poorer, thus, this bus electrode easily comes off on this substrate.On the other hand, after this anti-reflecting layer perforate, also may cause its surface oxidation and form silica because this emitter layer is surface exposed, the existence of this silica also can affect the adhesion of adhering between plated metal and this emitter layer.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method that reduces the good solar cell of manufacturing cost, the adhesion of layer between body.
The manufacture method of solar cell of the present invention, comprises: prepare a substrate with a first surface.On this first surface, form an insulating barrier, this insulating barrier has a plurality of openings, and expose at the position corresponding to described opening of this first surface.Position on this insulating barrier and between described opening forms a plurality of the first electrode parts.Heat-treat, described the first electrode part is connected with the first surface of this substrate through this insulating barrier.With plating mode, form second electrode part, this second electrode part connects described the first electrode part and is connected with this first surface by the described opening of this insulating barrier.
The manufacture method of solar cell of the present invention, the sensitive surface that this first surface is this substrate; This insulating barrier is anti-reflecting layer; A bus electrode of the common formation of described the first electrode part and this second electrode part.
The manufacture method of solar cell of the present invention, also comprises the step that forms a plurality of third electrode portion, and described third electrode portion is parallel to each other and be connected with this bus electrode, and the width of each third electrode portion is less than the width of this bus electrode.
The manufacture method of solar cell of the present invention, wherein at least several in described third electrode portion form with same processing procedure with this second electrode part.
The manufacture method of solar cell of the present invention, the spacing of wantonly two adjacent first electrode parts of this bus electrode is greater than the width of the opening between this two adjacent first electrode part.
The manufacture method of solar cell of the present invention, described the first electrode part utilizes wire mark mode to be formed on this insulating barrier.
The present invention also provides the manufacture method of another kind of solar cell, comprises: prepare a substrate with a first surface.On this first surface, form an insulating barrier.Part on this insulating barrier forms a plurality of the first electrode parts.Heat-treat, described the first electrode part is connected with the first surface of this substrate through this insulating barrier.In this insulating barrier, form a plurality of openings that lay respectively between described the first electrode part, the position corresponding to described opening of the first surface of this substrate is exposed.With plating mode, form second electrode part, this second electrode part connects described the first electrode part and is connected with this first surface by the described opening of this insulating barrier.
Beneficial effect of the present invention is: by two kinds of different processing procedures, form described the first electrode part and the second electrode part, can solve that independent use electroplated electrode produces and this substrate between the not good problem of adhesive force, can improve in addition the expensive problem that independent use wire mark electrode causes.Therefore the present invention has the good advantage of adhesion between low manufacturing cost and battery layers body concurrently.
Accompanying drawing explanation
Fig. 1 is the schematic top plan view of a solar cell, the battery of one first preferred embodiment manufacturing of the manufacture method of demonstration solar cell of the present invention;
Fig. 2 is along the generalized section that in Fig. 1, A-A line is got, but wherein three first electrode parts of Fig. 2 schematic diagram 1;
Fig. 3 is the cross-sectional schematic along B-B line is got in Fig. 1;
Fig. 4 is the steps flow chart calcspar of this first preferred embodiment;
Fig. 5 is the schematic flow sheet of each step of this first preferred embodiment;
Fig. 6 one is similar to the schematic diagram of the 4th flow process of Fig. 5, but the width of the first electrode part in Fig. 6 is less;
Fig. 7 is the steps flow chart calcspar of one second preferred embodiment of the manufacture method of solar cell of the present invention;
Fig. 8 is the schematic flow sheet of each step of this second preferred embodiment.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in detail, is noted that in the following description content, and similarly element is to represent with identical numbering.
Consult Fig. 1, Fig. 2, Fig. 3, the first preferred embodiment of manufacture method of the present invention, for the manufacture of a solar cell, this solar cell comprises: a substrate 1, an insulating barrier 2, a plurality of the first electrode part 3, two the second electrode parts 4 and a plurality of third electrode portion 5.
The substrate 1 of the present embodiment is silicon substrate, and has a contrary first surface 11 and a second surface 12.This first surface 11 is the sensitive surface of this substrate 1 or this solar cell, and this second surface 12 is the back side.In fact this substrate 1 comprises that a substrate body and is positioned at the emitter layer of the surface of this substrate body.This substrate body is contrary with the conductivity of this emitter layer, and one of them is p-type semiconductor, and another is N-shaped semiconductor, forms whereby p-n junction.But sheet building and the non-improvement emphasis of the present invention of layer body quantity due to this substrate 1, no longer describe in detail at this.
This insulating barrier 2 is roughly whole laying and is positioned on the first surface 11 of this substrate 1, but this insulating barrier 2 partially perforations and there are a plurality of openings 21, described opening 21 is arranged in left and right two row (lining up two row along a first direction), and the opening 21 of each row presents front and back to being spaced (opening 21 that is each row is spaced along a second direction).The material of this insulating barrier 2 is silicon nitride (SiN for example
x), can be used as anti-reflecting layer, to promote light amount of incident, and the surface of this substrate 1 of energy passivation, thereby reduce charge carrier recombination-rate surface (Surface Recombination Velocity is called for short SRV).
Described first electrode part 3 of the present embodiment and described the second electrode part 4 be common form two between left and right every and front and back to the bus electrode 30 extending, and these two bus electrodes 30 position of the described openings 21 of corresponding aforementioned two row respectively.Specifically, each bus electrode 30 of the present embodiment comprises that first electrode part 3 at interval, a plurality of front and back and front and back are to extending and stacked the second electrode part 4 that is connected in described the first electrode part 3 tops.The position of described first electrode part 3 of each bus electrode 30 between the described opening 21 of same row, and this second electrode part 4 of each bus electrode 30 connects described the first electrode part 3, and be connected with this first surface 11 of this substrate 1 by the described opening 21 of this insulating barrier 2.In the present embodiment, an emitter layer (not shown) of this solar cell is arranged at this first surface 11 (sensitive surface) and locates, so each bus electrode 30 is connected with this emitter layer.Each of the present embodiment the second electrode part 4 all comprises sequentially stacked from lower to upper a nickel wire line 41, a copper conductor 42 and a tin wire 43.Wherein, this tin wire 43 also can replace with silver-colored wire.
It should be noted that, the quantity of described bus electrode 30 is not limited to two, also can be one or three.
Described third electrode portion 5 is left and right extends and is positioned on this insulating barrier 2, and described third electrode portion 5 is parallel to each other and be connected with described bus electrode 30, and the length direction of third electrode portion 5 is vertical with the length direction of bus electrode 30.Described third electrode portion 5 is exactly general alleged finger bar electrode, and the width w1 of each third electrode portion 5 is less than the width w2 of each bus electrode 30.
Certainly, this battery also has the backplate (not shown) of the second surface 12 (being the back side) of this substrate 1 of an electrical connection, and this backplate coordinates the delivery of electrical energy that battery is produced to outside with described the first electrode part 3, the second electrode part 4 and third electrode portion 5.But due to the non-improvement emphasis of the present invention of this backplate, so no longer explanation.
Consult Fig. 1, Fig. 3, Fig. 4, Fig. 5, the manufacture method of the solar cell of the present embodiment comprises:
(1) step 61: this substrate 1 of preparing to have this first surface 11, this substrate 1 forms p-type and N-shaped semiconductor by diffusion process in advance, thereby form p-n junction, also therefore in the surface of this substrate 1, form this emitter layer (not shown) of this solar cell.
(2) step 62: form this insulating barrier 2 on this first surface 11, this step can be utilized the modes such as physical vapour deposition (PVD) (PVD) or chemical vapour deposition (CVD) (CVD), prior to forming insulating barrier 2 films of continuous whole on this first surface 11, in the predetermined position that forms described bus electrode 30, carry out perforate processing procedure again, to form the described opening 21 of this insulating barrier 2, and then the position corresponding to described opening 21 of this first surface 11 is exposed.Wherein, this perforate processing procedure can utilize the mode of laser ablation to carry out, but is not limited to this.It should be noted that, because the present embodiment wants to produce two bus electrodes 30, therefore described opening 21 is lined up two row, when only making a bus electrode 30, just only need to make a row opening 21.
(3) step 63: the position on this insulating barrier 2 and between described opening 21 forms described the first electrode part 3.The present embodiment is to coordinate the half tone with suitable mesh design, utilizes wire mark mode that metal conductive paste is coated on this insulating barrier 2 to form the first electrode part 3.Wherein, this metal conductive paste is silver slurry for example, but is not limited to this.
(4) step 64: heat-treat, the heat treatment of the present embodiment is high temperature sintering (firing).Because described the first electrode part 3 is formed by metal paste, in sintering process, the material of described the first electrode part 3 can corrode the SiN of this insulating barrier 2
xmaterial, and then through this insulating barrier 2, connect the first surface 11 of this substrate 1, to form and to be electrically connected to this emitter layer (not shown).
(5) step 65: then form described the second electrode part 4 with plating mode above described the first electrode part 3, described the second electrode part 4 is connected in described the first electrode part 3 tops on the one hand, there is on the other hand part to be filled in the opening 21 of described insulating barrier 2, and then be connected with this first surface 11.Each of the present embodiment the second electrode part 4 comprises nickel, copper, three kinds of materials of tin, when electroplating, is therefore sequentially to electroplate this nickel wire line 41, this copper conductor 42 and this tin wire 43.Use the advantage of composite material to be: nickel can directly contact the surface of this substrate 1, has preferably tack between nickel and silicon substrate; Copper has good conductivity; Between the welding wire (ribbon) of tin and follow-up welding, there is preferably solder bond power.In addition, this tin wire 43 also can be used silver-colored wire to replace, because the solder bond power between silver and welding wire is good, silver also has good electric conductivity simultaneously.From illustrating above also, the material of described second electrode part 4 of the present embodiment can differ from the material of described the first electrode part 3.
Consult Fig. 1, Fig. 2, Fig. 3, method of the present invention, further also comprises the step that forms described third electrode portion 5.Described third electrode portion 5 can utilize wire mark mode to form, if all third electrode portions 5 all select the material identical with described the first electrode part 3, just can make the first electrode part 3 and third electrode portion 5 by a wire mark simultaneously, certainly, when high temperature sintering, the material of described third electrode portion 5 also can connect through this insulating barrier 2 first surface 11 of this substrate 1.Make after described the first electrode part 3 and third electrode portion 5, during described the second electrode part 4 of follow-up plating, also can be simultaneously in the top electroplated conductive layer of described third electrode portion 5, now the finger electrode of this battery is actually by third electrode portion 5 and jointly forms with the electrodeposited coating of its top.In the case, the underclad portion being formed by wire mark can first print thinnerly to save slurry, then by the electrodeposited coating on upper strata, supplies the conductivity of finger electrode integral body.
On the other hand, described third electrode portion 5 also can utilize plating mode to form, if third electrode portion 5 selects the material identical with the second electrode part 4, can once electroplate.Because plated material can this insulating barrier 2 of eating thrown, therefore must be in step 62, simultaneously at the position of the described third electrode of the predetermined formation portion 5 of this insulating barrier 2, carry out perforate so that the third electrode portion 5 of electroplating directly coating be connected on the first surface 11 of this substrate 1.With plating mode, form third electrode portion 5, can reduce the usage of sizing agent of overall process.
In addition, described third electrode portion 5 also can only have wherein several and described the first electrode part 3 to form with same processing procedure, and other third electrode portion 5 forms to be different from the processing procedure of the first electrode part 3.Similarly, described third electrode portion 5 also can only have wherein several and described the second electrode part 4 to form with same processing procedure, and other third electrode portion 5 forms to be different from the processing procedure of the second electrode part 4.Particularly, wherein several wire mark modes of can using of described third electrode portion 5 form, and other forms with plating mode.
Certainly, in the manufacture method of this battery, also comprise the step that unshowned backplate is schemed in formation, this backplate can be used wire mark or plating mode to form.But due to the non-improvement emphasis of the present invention of method for making of this backplate, so no longer explanation.
Consult Fig. 5, Fig. 6, what remark additionally is, when wire mark forms described the first electrode part 3, the slurry coating width of described the first electrode part 3 can be as shown in the 4th of Fig. 5 the flow chart, the boundary alignment of the described opening 21 of rough and this insulating barrier 2, but also can be as shown in Figure 6, the coating width of described the first electrode part 3 is less, makes the spacing w3 of wantonly two adjacent the first electrode parts 3 in each bus electrode 30 be greater than the width w4 of the opening 21 between this two adjacent first electrode part 3.The object of this design is: while avoiding slurry coating scope wide, part slurry can flow in described opening 21, so can cause distributary phenomenon (shunting effect), and then reduce photoelectric current and affect battery efficiency.
In sum, bus electrode 30 of the present invention forms by two kinds of processing procedures, described the first electrode part 3 utilizes wire mark coordinate heat treatment and form, and the adhesion between this substrate 1 is good, can solve that independent use electroplated electrode produces and problem that the adhesive force of 1 of this substrate is not good.And the second electrode part 4 utilizes plating mode to form, can reduce and use electrocondution slurry to reduce production costs.Therefore the present invention takes considering of manufacturing cost and layer body adhesion into account simultaneously, and the present invention has a low cost of manufacture advantage good with layer body adhesion concurrently.
Consult Fig. 2, Fig. 3, Fig. 7, Fig. 8, the second preferred embodiment of the manufacture method of solar cell of the present invention, roughly the same with this first preferred embodiment, different places are step order.The present embodiment be on the insulating barrier 2 prior to not perforate, form described the first electrode part 3 after, then carry out the perforate processing procedure of this insulating barrier 2.The mode that forms each layer of body as for the present embodiment is all identical with this first preferred embodiment, so its concrete mode no longer illustrates, below the step order of the present embodiment is only described.
(1) step 71: prepare this substrate with this first surface 11 1.
(2) step 72: form insulating barrier 2 on this first surface 11, now this not yet perforate of insulating barrier 2.
(3) step 73: the part on this insulating barrier 2 forms described the first electrode part 3.
(4) step 74: heat-treat, make described the first electrode part 3 pass this insulating barrier 2 by its erosiveness, and then be connected with the first surface 11 of this substrate 1.
(5) step 75: form openings 21 in this insulating barrier 2, and the formation position of opening 21 lays respectively between described the first electrode part 3, and therefore the position corresponding to described opening 21 of the first surface 11 of this substrate 1 is exposed.
(6) step 76: form this second electrode part 4 with plating mode, this second electrode part 4 connects described the first electrode part 3, and is connected with the first surface 11 of this substrate 1 by the described opening 21 of this insulating barrier 2.Similarly, the second electrode part 4 that the present embodiment is made can comprise a nickel wire line 41, a copper conductor 42 and a tin wire 43, and this tin wire 43 also can replace with silver-colored wire.
The present embodiment further also comprises the step of a plurality of third electrode of formation portion 5.The third electrode portion 5 of the present embodiment can be used wire mark or plating mode to form equally.While using wire mark mode, third electrode portion 5 can with the first electrode part 3 together wire mark sintering, during described the second electrode part 4 of follow-up plating, also can be simultaneously in described third electrode portion 5 top electroplated conductive layers.The advantage of this practice is as described in this first preferred embodiment, can by the below wire mark of finger electrode more carefully to save slurry, then by the electrodeposited coating on upper strata, supply the conductivity of finger electrode integral body.
If use plating mode to form described third electrode portion 5, in above-mentioned step 75, must the while carry out perforate at the position of the described third electrode of the predetermined formation portion 5 of this insulating barrier 2, step 76 item can be electroplated simultaneously and be formed the second electrode part 4 and third electrode portion 5, make third electrode portion 5 directly coating be connected on the first surface 11 of this substrate 1.
The present embodiment can be produced the battery structure identical with this first preferred embodiment, and reaches identical effect, at this, no longer illustrates.
Claims (12)
1. the manufacture method of a solar cell, comprise: prepare a substrate with a first surface, it is characterized in that, this manufacture method also comprises: on this first surface, form an insulating barrier, this insulating barrier has a plurality of openings, and expose at the position corresponding to described opening of this first surface; Position on this insulating barrier and between described opening forms a plurality of the first electrode parts; Heat-treat, described the first electrode part is connected with the first surface of this substrate through this insulating barrier; With plating mode, form second electrode part, this second electrode part connects described the first electrode part and is connected with this first surface by the described opening of this insulating barrier.
2. the manufacture method of solar cell according to claim 1, is characterized in that, the sensitive surface that this first surface is this substrate; This insulating barrier is anti-reflecting layer; A bus electrode of the common formation of described the first electrode part and this second electrode part.
3. the manufacture method of solar cell according to claim 2, it is characterized in that, this manufacture method also comprises the step of a plurality of third electrode of formation portion, described third electrode portion is parallel to each other and be connected with this bus electrode, and described in each, the width of third electrode portion is less than the width of this bus electrode.
4. the manufacture method of solar cell according to claim 3, is characterized in that, at least one in described third electrode portion and this second electrode part form with same processing procedure.
5. the manufacture method of solar cell according to claim 2, is characterized in that, the spacing of wantonly two adjacent first electrode parts of this bus electrode is greater than the width of the opening between this two adjacent first electrode part.
6. the manufacture method of solar cell according to claim 1, is characterized in that, described the first electrode part utilizes wire mark mode to be formed on this insulating barrier.
7. a manufacture method for solar cell, comprises: prepare a substrate with a first surface, it is characterized in that, this manufacture method also comprises: on this first surface, form an insulating barrier; Part on this insulating barrier forms a plurality of the first electrode parts; Heat-treat, described the first electrode part is connected with the first surface of this substrate through this insulating barrier; In this insulating barrier, form a plurality of openings that lay respectively between described the first electrode part, the position corresponding to described opening of the first surface of this substrate is exposed; With plating mode, form second electrode part, this second electrode part connects described the first electrode part and is connected with this first surface by the described opening of this insulating barrier.
8. the manufacture method of solar cell according to claim 7, is characterized in that, the sensitive surface that this first surface is this substrate; This insulating barrier is anti-reflecting layer; A bus electrode of the common formation of described the first electrode part and this second electrode part.
9. the manufacture method of solar cell according to claim 8, it is characterized in that, this manufacture method also comprises the step of a plurality of third electrode of formation portion, described third electrode portion is parallel to each other and be connected with this bus electrode, and described in each, the width of third electrode portion is less than the width of this bus electrode.
10. the manufacture method of solar cell according to claim 9, is characterized in that, at least one in described third electrode portion and this second electrode part form with same processing procedure.
The manufacture method of 11. solar cells according to claim 8, is characterized in that, the spacing of wantonly two adjacent first electrode parts of this bus electrode is greater than the width of the opening between this two adjacent first electrode part.
The manufacture method of 12. solar cells according to claim 7, is characterized in that, described the first electrode part utilizes wire mark mode to be formed on this insulating barrier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210348222.3A CN103681945A (en) | 2012-09-18 | 2012-09-18 | Manufacturing method of solar cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201210348222.3A CN103681945A (en) | 2012-09-18 | 2012-09-18 | Manufacturing method of solar cell |
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