CN103675568A - Test fixture for RS422 interface loop - Google Patents

Test fixture for RS422 interface loop Download PDF

Info

Publication number
CN103675568A
CN103675568A CN201210328186.4A CN201210328186A CN103675568A CN 103675568 A CN103675568 A CN 103675568A CN 201210328186 A CN201210328186 A CN 201210328186A CN 103675568 A CN103675568 A CN 103675568A
Authority
CN
China
Prior art keywords
pin
interface
diode
anode
negative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201210328186.4A
Other languages
Chinese (zh)
Other versions
CN103675568B (en
Inventor
沈细荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitac Computer Kunshan Co Ltd
Original Assignee
Mitac Computer Kunshan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitac Computer Kunshan Co Ltd filed Critical Mitac Computer Kunshan Co Ltd
Priority to CN201210328186.4A priority Critical patent/CN103675568B/en
Publication of CN103675568A publication Critical patent/CN103675568A/en
Application granted granted Critical
Publication of CN103675568B publication Critical patent/CN103675568B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Tests Of Electronic Circuits (AREA)

Abstract

本发明揭示一种RS422接口回路测试治具,所述测试治具包括:治具本体,其对应所述RS422接口;第一至第九引脚,其对应所述RS422接口上的相应引脚;第一至第四二极管,所述第一二极管正极接所述第一引脚、负极接所述第四引脚,所述第二二极管正极接所述第二引脚、负极接所述第三引脚,所述第三二极管正极接所述第六引脚、负极接所述第九引脚,所述第四二极管正极接所述第七引脚、负极接所述第八引脚。从而使得上述测试治具的引脚间形成的回路,其对应的电子装置的RS422接口的引脚次序发生错误时,传输的信号不能得到正确的结果,因此可以达到对RS422接口引脚次序正确与否进行测试。

The present invention discloses a RS422 interface loop test fixture, and the test fixture includes: a fixture body corresponding to the RS422 interface; first to ninth pins corresponding to corresponding pins on the RS422 interface; First to fourth diodes, the anode of the first diode is connected to the first pin, the cathode is connected to the fourth pin, the anode of the second diode is connected to the second pin, The cathode is connected to the third pin, the anode of the third diode is connected to the sixth pin, the cathode is connected to the ninth pin, the anode of the fourth diode is connected to the seventh pin, The negative pole is connected to the eighth pin. Therefore, when the circuit formed between the pins of the above-mentioned test fixtures, the pin sequence of the RS422 interface of the corresponding electronic device is wrong, the transmitted signal cannot get the correct result, so the correct sequence of the pins of the RS422 interface can be achieved. No to test.

Description

RS422 interface loop measurement jig
[technical field]
The present invention relates to a kind of loop-around test tool, particularly relate to a kind of RS422 interface loop measurement jig.
[background technology]
RS-422 standard full name is " electrical specification of balanced voltage digital interface circuit ", and it has defined the characteristic of interface circuit.
For being provided with RS-422 interface on the electronic installations such as PC (notebook computer and desktop computer), and when its each pin is tested, conventionally can use measurement jig as shown in Figure 1.
Refer to Fig. 1, Fig. 1 illustrates as prior art RS-422 interface loop measurement jig structural representation.Described RS-422 interface loop measurement jig comprises: the first pin 1(Transmit-, TX-; Send negative), the second pin 2(Transmit+, TX+; Just send), the 3rd pin 3(Receive+, RX+; Just receive), the 4th pin 4(Receive-, RX-; Receive negative), the 5th pin 5(Signal ground, GND; Signal ground), the 6th pin 6(Request to send-, RTS-; Request sends negative), the 7th pin 7(Request to send+, RTS+; Request just sends), the 8th pin 8(Clear to send+, CTS+; Just allow to send), the 9th pin 9((Clear to send-, CTS-; Allow to send negative).
Each pin is connected respectively the respective pins on electronic installation RS-422 interface above.Wherein, above-mentioned the first pin 1, the 4th pin 4 are connected with wire; Above-mentioned the second pin 2, the 3rd pin 3 are connected with wire; Above-mentioned the 6th pin 6, the 9th pin 9 are connected with wire; Above-mentioned the 7th pin 7, the 8th pin 8 are connected with wire; The 5th pin 5 ground connection.
Yet, when adopting above-mentioned measurement jig to test, if the first pin 1 of corresponding described measurement jig is, two pins of the 4th pin 4 order is each other wrong on electronic installation RS-422 interface; Or the second pin 2 of corresponding described measurement jig on electronic installation RS-422 interface is, two pins of the 3rd pin 3 order is each other wrong; Or the 6th pin 6 of corresponding described measurement jig on electronic installation RS-422 interface is, two pins of the 9th pin 9 order is each other wrong; The 7th pin 7 of corresponding described measurement jig is, two pins of the 8th pin 8 order is each other wrong again or on electronic installation RS-422 interface.If loop itself is normal, its demonstration result when loop-around test is still for test is passed through.
Therefore,, while adopting above-mentioned RS422 interface loop measurement jig to test, cannot reach whether the position of each pin in loop is correctly tested.
In view of this, be necessary to develop a kind of RS422 interface loop measurement jig in fact, to address the above problem.
[summary of the invention]
Therefore, the object of this invention is to provide a kind of RS422 interface loop measurement jig, while solving test, cannot judge the whether correct problem in position of each pin in loop.
In order to achieve the above object, RS422 interface loop measurement jig provided by the invention, described measurement jig comprises:
Tool body, its corresponding described RS422 interface;
The first to the 9th pin, the respective pins on its corresponding described RS422 interface;
First to fourth diode, described the first diode cathode connects described the first pin, negative pole connects described the 4th pin, described the second diode cathode connects described the second pin, negative pole connects described the 3rd pin, described the 3rd diode cathode connects described the 6th pin, negative pole connects described the 9th pin, and described the 4th diode cathode connects described the 7th pin, negative pole connects described the 8th pin.
Wherein, described the first pin for send negative pin, the second pin for send positive pin, the 3rd pin for receive positive pin, the 4th pin for receive negative pin, the 5th pin be signal ground pin, the 6th pin for request sends negative pin, the 7th pin for request sends positive pin, the 8th pin sends positive pin, the 9th pin for allowing to send negative pin for allowing.
Compared to prior art, utilize RS422 interface loop measurement jig of the present invention, due between described the first pin and described the 4th pin, between described the second pin and described the 3rd pin, between described the 6th pin and described the 9th pin, be all provided with diode between described the 7th pin and described the 8th pin.Thereby make the loop forming between the pin of above-mentioned measurement jig, when the pin order of the RS422 interface of the electronic installation that it is corresponding makes a mistake, the signal of transmission can not obtain correct result, therefore can reach RS422 interface pin order correctness is tested.
[accompanying drawing explanation]
Fig. 1 illustrates as prior art RS422 interface loop measurement jig structural representation.
Fig. 2 illustrates the structural representation into RS422 interface loop measurement jig of the present invention one preferred embodiment.
[embodiment]
Refer to Fig. 2, Fig. 2 illustrates the structural representation into RS422 interface loop measurement jig of the present invention one preferred embodiment.
In order to achieve the above object, RS422 interface loop measurement jig provided by the invention, in the present embodiment, described measurement jig comprises:
Tool body 10, its corresponding described RS422 interface;
The first to the 9th pin (1~~9), the respective pins on its corresponding described RS422 interface;
First to fourth diode (21~~24), described the first diode 21 positive poles connect described the first pin 1, negative pole connects described the 4th pin 4, described the second diode 22 positive poles connect described the second pin 2, negative pole connects described the 3rd pin 3, described the 3rd diode 23 positive poles connect described the 6th pin 6, negative pole connects described the 9th pin 9, and described the 4th diode 24 positive poles connect described the 7th pin 7, negative pole connects described the 8th pin 8.
Wherein, described the first pin 1 for send negative pin, the second pin 2 for send positive pin, the 3rd pin 3 for receive positive pin, the 4th pin 4 for receive negative pin, the 5th pin 5 be signal ground pin, the 6th pin 6 for request sends negative pin, the 7th pin 7 for request sends positive pin, the 8th pin 8, for allowing to send positive pin, the 9th pin 9, for allowing to send, bear pin.
When test, due between described the first pin 1 and described the 4th pin 4, between described the second pin 2 and described the 3rd pin 3, between described the 6th pin 6 and described the 9th pin 9, be all provided with diode (being respectively 21~~24) between described the 7th pin 7 and described the 8th pin 8.Thereby make the loop forming between the pin of above-mentioned measurement jig, the pin of the RS-422 interface of the electronic installation that it is corresponding, when if order makes a mistake, after transmitted test signal, forward conduction characteristic due to diode, thereby can not obtain feeding back correct result, thereby can reach, RS-422 interface pin order correctness is tested.
Take RS-422 interface above as example, and certainly, similarly interface, when doing loop-around test, also can adopt this kind of loop-around test tool to test, and just does on the line corresponding adjustment.

Claims (2)

1.一种RS422接口回路测试治具,其特征在于,所述测试治具包括:1. a RS422 interface loop test fixture, is characterized in that, described test fixture comprises: 治具本体,其对应所述RS422接口;Fixture body, which corresponds to the RS422 interface; 第一至第九引脚,其对应所述RS422接口上的相应引脚;The first to ninth pins correspond to corresponding pins on the RS422 interface; 第一至第四二极管,所述第一二极管正极接所述第一引脚、负极接所述第四引脚,所述第二二极管正极接所述第二引脚、负极接所述第三引脚,所述第三二极管正极接所述第六引脚、负极接所述第九引脚,所述第四二极管正极接所述第七引脚、负极接所述第八引脚。First to fourth diodes, the anode of the first diode is connected to the first pin, the cathode is connected to the fourth pin, the anode of the second diode is connected to the second pin, The cathode is connected to the third pin, the anode of the third diode is connected to the sixth pin, the cathode is connected to the ninth pin, the anode of the fourth diode is connected to the seventh pin, The negative pole is connected to the eighth pin. 2.如权利要求1所述的RS422接口回路测试治具,其特征在于,所述第一引脚为发送负引脚、第二引脚为发送正引脚、第三引脚为接收正引脚、第四引脚为接收负引脚、第五引脚为信号接地引脚、第六引脚为请求发送负引脚、第七引脚为请求发送正引脚、第八引脚为允许发送正引脚、第九引脚为允许发送负引脚。2. RS422 interface loop test fixture as claimed in claim 1, is characterized in that, described first pin is to send negative pin, and the second pin is to send positive pin, and the 3rd pin is to receive positive lead pin, the fourth pin is the receiving negative pin, the fifth pin is the signal ground pin, the sixth pin is the request sending negative pin, the seventh pin is the request sending positive pin, and the eighth pin is the permission Send positive pin, the ninth pin is to allow sending negative pin.
CN201210328186.4A 2012-09-07 2012-09-07 Test fixture for RS422 interface loop Expired - Fee Related CN103675568B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210328186.4A CN103675568B (en) 2012-09-07 2012-09-07 Test fixture for RS422 interface loop

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210328186.4A CN103675568B (en) 2012-09-07 2012-09-07 Test fixture for RS422 interface loop

Publications (2)

Publication Number Publication Date
CN103675568A true CN103675568A (en) 2014-03-26
CN103675568B CN103675568B (en) 2017-04-26

Family

ID=50313730

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210328186.4A Expired - Fee Related CN103675568B (en) 2012-09-07 2012-09-07 Test fixture for RS422 interface loop

Country Status (1)

Country Link
CN (1) CN103675568B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4607379A (en) * 1984-11-05 1986-08-19 Cbs Inc. Circuit for connecting together multiple serial data lines
CN2519336Y (en) * 2002-01-11 2002-10-30 田明儒 Computer serial interface test apparatus
CN200993779Y (en) * 2006-12-22 2007-12-19 山东超越数控电子有限公司 Computer serial single test module
CN202306535U (en) * 2011-10-10 2012-07-04 神讯电脑(昆山)有限公司 Fixture for testing RS (Recommended Standard)-232 interface
CN202794422U (en) * 2012-09-07 2013-03-13 神讯电脑(昆山)有限公司 Recommended standard (RS) 422 interface loop test jig

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4607379A (en) * 1984-11-05 1986-08-19 Cbs Inc. Circuit for connecting together multiple serial data lines
CN2519336Y (en) * 2002-01-11 2002-10-30 田明儒 Computer serial interface test apparatus
CN200993779Y (en) * 2006-12-22 2007-12-19 山东超越数控电子有限公司 Computer serial single test module
CN202306535U (en) * 2011-10-10 2012-07-04 神讯电脑(昆山)有限公司 Fixture for testing RS (Recommended Standard)-232 interface
CN202794422U (en) * 2012-09-07 2013-03-13 神讯电脑(昆山)有限公司 Recommended standard (RS) 422 interface loop test jig

Also Published As

Publication number Publication date
CN103675568B (en) 2017-04-26

Similar Documents

Publication Publication Date Title
EP3822801A3 (en) Method and apparatus for providing interface
EP2355551A3 (en) An adapter for an electronic assembly
WO2012003332A3 (en) Detection of cable connections for electronic devices
US20110244728A1 (en) Universal serial bus connector and adaptor of the connector
EP2863648A1 (en) Method, device, and electronic signature tool for audio interface self-adaptation
US11316308B2 (en) Adapter, multi-device detection system and detection method thereof
TWI501085B (en) Usb interface detection device
CN102636725A (en) Radio frequency test method for 2M coaxial cable
CN204539303U (en) HDMI (High Definition Multimedia Interface) with multiplexing function and television set
CN106844252A (en) USB conversion circuit and signal conversion and transmission method
US20140080353A1 (en) Connector apparatus and adapter apparatus with indication function
US8607101B2 (en) RS-485 port test apparatus
CN202794422U (en) Recommended standard (RS) 422 interface loop test jig
CN202306535U (en) Fixture for testing RS (Recommended Standard)-232 interface
CN103675568A (en) Test fixture for RS422 interface loop
CN205644528U (en) Connection interface conversion circuit and connection interface connector
CN204408496U (en) Signal transmission circuit
TW201239370A (en) Detecting circuit for serial ports
CN202794419U (en) COM port loopback test fixture
CN104122481A (en) Multifunction cable detection device
US20160328306A1 (en) Interface test device
CN204497773U (en) A kind of OTG selective charge circuit and portable audio
TWM561949U (en) Connection interface adapter
CN103630790B (en) COM port loop test fixture
US20150004810A1 (en) All-in-one computer with fixed and simple connection

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170426

Termination date: 20170907

CF01 Termination of patent right due to non-payment of annual fee