CN103675568A - Test fixture for RS422 interface loop - Google Patents
Test fixture for RS422 interface loop Download PDFInfo
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- CN103675568A CN103675568A CN201210328186.4A CN201210328186A CN103675568A CN 103675568 A CN103675568 A CN 103675568A CN 201210328186 A CN201210328186 A CN 201210328186A CN 103675568 A CN103675568 A CN 103675568A
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- diode
- measurement jig
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Abstract
The invention discloses a test fixture for an RS422 interface loop. The test fixture comprises a fixture body, pins (I to IX) and diodes (I to IV), wherein the fixture body corresponds to an RS422 interface; the pins (I to IX) correspond to pins on the RS422 interface correspondingly; the anode of the diode (I) is connected with the pin (I), the cathode of the diode (I) is connected with the pin (IV), the anode of the diode (II) is connected with the pin (II), the cathode of the diode (II) is connected with the pin (III), the anode of the diode (III) is connected with the pin (VI), the cathode of the diode (III) is connected with the pin (IX), the anode of the diode (IV) is connected with the pin (VII), and the cathode of the diode (IV) is connected with the pin (VIII), so that the loop is formed among the pins of the test fixture; when the pin sequence of the RS422 interface of an electronic device goes wrong, the result of a transmitted signal is wrong. Therefore, the test fixture can be used for testing whether the pin sequence of the RS422 interface is correct or not.
Description
[technical field]
The present invention relates to a kind of loop-around test tool, particularly relate to a kind of RS422 interface loop measurement jig.
[background technology]
RS-422 standard full name is " electrical specification of balanced voltage digital interface circuit ", and it has defined the characteristic of interface circuit.
For being provided with RS-422 interface on the electronic installations such as PC (notebook computer and desktop computer), and when its each pin is tested, conventionally can use measurement jig as shown in Figure 1.
Refer to Fig. 1, Fig. 1 illustrates as prior art RS-422 interface loop measurement jig structural representation.Described RS-422 interface loop measurement jig comprises: the first pin 1(Transmit-, TX-; Send negative), the second pin 2(Transmit+, TX+; Just send), the 3rd pin 3(Receive+, RX+; Just receive), the 4th pin 4(Receive-, RX-; Receive negative), the 5th pin 5(Signal ground, GND; Signal ground), the 6th pin 6(Request to send-, RTS-; Request sends negative), the 7th pin 7(Request to send+, RTS+; Request just sends), the 8th pin 8(Clear to send+, CTS+; Just allow to send), the 9th pin 9((Clear to send-, CTS-; Allow to send negative).
Each pin is connected respectively the respective pins on electronic installation RS-422 interface above.Wherein, above-mentioned the first pin 1, the 4th pin 4 are connected with wire; Above-mentioned the second pin 2, the 3rd pin 3 are connected with wire; Above-mentioned the 6th pin 6, the 9th pin 9 are connected with wire; Above-mentioned the 7th pin 7, the 8th pin 8 are connected with wire; The 5th pin 5 ground connection.
Yet, when adopting above-mentioned measurement jig to test, if the first pin 1 of corresponding described measurement jig is, two pins of the 4th pin 4 order is each other wrong on electronic installation RS-422 interface; Or the second pin 2 of corresponding described measurement jig on electronic installation RS-422 interface is, two pins of the 3rd pin 3 order is each other wrong; Or the 6th pin 6 of corresponding described measurement jig on electronic installation RS-422 interface is, two pins of the 9th pin 9 order is each other wrong; The 7th pin 7 of corresponding described measurement jig is, two pins of the 8th pin 8 order is each other wrong again or on electronic installation RS-422 interface.If loop itself is normal, its demonstration result when loop-around test is still for test is passed through.
Therefore,, while adopting above-mentioned RS422 interface loop measurement jig to test, cannot reach whether the position of each pin in loop is correctly tested.
In view of this, be necessary to develop a kind of RS422 interface loop measurement jig in fact, to address the above problem.
[summary of the invention]
Therefore, the object of this invention is to provide a kind of RS422 interface loop measurement jig, while solving test, cannot judge the whether correct problem in position of each pin in loop.
In order to achieve the above object, RS422 interface loop measurement jig provided by the invention, described measurement jig comprises:
Tool body, its corresponding described RS422 interface;
The first to the 9th pin, the respective pins on its corresponding described RS422 interface;
First to fourth diode, described the first diode cathode connects described the first pin, negative pole connects described the 4th pin, described the second diode cathode connects described the second pin, negative pole connects described the 3rd pin, described the 3rd diode cathode connects described the 6th pin, negative pole connects described the 9th pin, and described the 4th diode cathode connects described the 7th pin, negative pole connects described the 8th pin.
Wherein, described the first pin for send negative pin, the second pin for send positive pin, the 3rd pin for receive positive pin, the 4th pin for receive negative pin, the 5th pin be signal ground pin, the 6th pin for request sends negative pin, the 7th pin for request sends positive pin, the 8th pin sends positive pin, the 9th pin for allowing to send negative pin for allowing.
Compared to prior art, utilize RS422 interface loop measurement jig of the present invention, due between described the first pin and described the 4th pin, between described the second pin and described the 3rd pin, between described the 6th pin and described the 9th pin, be all provided with diode between described the 7th pin and described the 8th pin.Thereby make the loop forming between the pin of above-mentioned measurement jig, when the pin order of the RS422 interface of the electronic installation that it is corresponding makes a mistake, the signal of transmission can not obtain correct result, therefore can reach RS422 interface pin order correctness is tested.
[accompanying drawing explanation]
Fig. 1 illustrates as prior art RS422 interface loop measurement jig structural representation.
Fig. 2 illustrates the structural representation into RS422 interface loop measurement jig of the present invention one preferred embodiment.
[embodiment]
Refer to Fig. 2, Fig. 2 illustrates the structural representation into RS422 interface loop measurement jig of the present invention one preferred embodiment.
In order to achieve the above object, RS422 interface loop measurement jig provided by the invention, in the present embodiment, described measurement jig comprises:
The first to the 9th pin (1～～9), the respective pins on its corresponding described RS422 interface;
First to fourth diode (21～～24), described the first diode 21 positive poles connect described the first pin 1, negative pole connects described the 4th pin 4, described the second diode 22 positive poles connect described the second pin 2, negative pole connects described the 3rd pin 3, described the 3rd diode 23 positive poles connect described the 6th pin 6, negative pole connects described the 9th pin 9, and described the 4th diode 24 positive poles connect described the 7th pin 7, negative pole connects described the 8th pin 8.
Wherein, described the first pin 1 for send negative pin, the second pin 2 for send positive pin, the 3rd pin 3 for receive positive pin, the 4th pin 4 for receive negative pin, the 5th pin 5 be signal ground pin, the 6th pin 6 for request sends negative pin, the 7th pin 7 for request sends positive pin, the 8th pin 8, for allowing to send positive pin, the 9th pin 9, for allowing to send, bear pin.
When test, due between described the first pin 1 and described the 4th pin 4, between described the second pin 2 and described the 3rd pin 3, between described the 6th pin 6 and described the 9th pin 9, be all provided with diode (being respectively 21～～24) between described the 7th pin 7 and described the 8th pin 8.Thereby make the loop forming between the pin of above-mentioned measurement jig, the pin of the RS-422 interface of the electronic installation that it is corresponding, when if order makes a mistake, after transmitted test signal, forward conduction characteristic due to diode, thereby can not obtain feeding back correct result, thereby can reach, RS-422 interface pin order correctness is tested.
Take RS-422 interface above as example, and certainly, similarly interface, when doing loop-around test, also can adopt this kind of loop-around test tool to test, and just does on the line corresponding adjustment.
Claims (2)
1. a RS422 interface loop measurement jig, is characterized in that, described measurement jig comprises:
Tool body, its corresponding described RS422 interface;
The first to the 9th pin, the respective pins on its corresponding described RS422 interface;
First to fourth diode, described the first diode cathode connects described the first pin, negative pole connects described the 4th pin, described the second diode cathode connects described the second pin, negative pole connects described the 3rd pin, described the 3rd diode cathode connects described the 6th pin, negative pole connects described the 9th pin, and described the 4th diode cathode connects described the 7th pin, negative pole connects described the 8th pin.
2. RS422 interface loop measurement jig as claimed in claim 1, it is characterized in that, described the first pin for send negative pin, the second pin for send positive pin, the 3rd pin for receive positive pin, the 4th pin for receive negative pin, the 5th pin be signal ground pin, the 6th pin for request sends negative pin, the 7th pin for request sends positive pin, the 8th pin sends positive pin, the 9th pin for allowing to send negative pin for allowing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210328186.4A CN103675568B (en) | 2012-09-07 | 2012-09-07 | Test fixture for RS422 interface loop |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210328186.4A CN103675568B (en) | 2012-09-07 | 2012-09-07 | Test fixture for RS422 interface loop |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103675568A true CN103675568A (en) | 2014-03-26 |
| CN103675568B CN103675568B (en) | 2017-04-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210328186.4A Expired - Fee Related CN103675568B (en) | 2012-09-07 | 2012-09-07 | Test fixture for RS422 interface loop |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4607379A (en) * | 1984-11-05 | 1986-08-19 | Cbs Inc. | Circuit for connecting together multiple serial data lines |
| CN2519336Y (en) * | 2002-01-11 | 2002-10-30 | 田明儒 | Computer serial interface test apparatus |
| CN200993779Y (en) * | 2006-12-22 | 2007-12-19 | 山东超越数控电子有限公司 | Computer serial single test module |
| CN202306535U (en) * | 2011-10-10 | 2012-07-04 | 神讯电脑(昆山)有限公司 | Fixture for testing RS (Recommended Standard)-232 interface |
| CN202794422U (en) * | 2012-09-07 | 2013-03-13 | 神讯电脑(昆山)有限公司 | Recommended standard (RS) 422 interface loop test jig |
-
2012
- 2012-09-07 CN CN201210328186.4A patent/CN103675568B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4607379A (en) * | 1984-11-05 | 1986-08-19 | Cbs Inc. | Circuit for connecting together multiple serial data lines |
| CN2519336Y (en) * | 2002-01-11 | 2002-10-30 | 田明儒 | Computer serial interface test apparatus |
| CN200993779Y (en) * | 2006-12-22 | 2007-12-19 | 山东超越数控电子有限公司 | Computer serial single test module |
| CN202306535U (en) * | 2011-10-10 | 2012-07-04 | 神讯电脑(昆山)有限公司 | Fixture for testing RS (Recommended Standard)-232 interface |
| CN202794422U (en) * | 2012-09-07 | 2013-03-13 | 神讯电脑(昆山)有限公司 | Recommended standard (RS) 422 interface loop test jig |
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| Publication number | Publication date |
|---|---|
| CN103675568B (en) | 2017-04-26 |
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