The content of the invention
The technical problem to be solved in the present invention is, for the drawbacks described above of prior art, there is provided a kind of wafer outward appearance lacks
Sunken classification and detection method, to improve the processing efficiency and quality of wafer conscientiously.
The technical solution adopted for the present invention to solve the technical problems is:There is provided a kind of wafer open defect classification and
Detection method, comprises the following steps:
S1, scanning obtain wafer image;
S2, wafer image is carried out edge extracting calculate hem width;
S3, the area-of-interest for being partitioned into wafer;
S4, the area-of-interest to wafer carry out open defect detection;
S5, wafer open defect is sorted out.
Still more preferably scheme of the invention is:In step sl, multiple row images of wafer are collected by camera,
And by these row image mosaics into the big wafer stitching image of a width.Preferably, the camera is that high-resolution line scans phase
Machine.
Still more preferably scheme of the invention is:In step s 2, first, by scanning edge in image processing algorithm
The mode of point obtains the distance between a series of point of outward flanges and inward flange, this series of two point and is a series of side
It is wide;Or, the external periphery outline and inward flange profile of wafer are obtained by way of scanning marginal point in image processing algorithm,
A series of distance between the two profiles is a series of hem width;Correspondingly, in step s3, positioned at inward flange/interior
Region on the inside of edge contour is the area-of-interest of described wafer.
Still more preferably scheme of the invention is:In step s 4, by gray level threshold segmentation, it is partitioned into the sense of wafer
White portion and black region in the image in interest region, these white portions are defective region with black region.
Still more preferably scheme of the invention is:Specifically include in step s 5:White portion is classified as into missing class;
Further, using area size information, large area missing, small area missing and needle pore defect can be subdivided into, wherein, small area lacks
Losing can be according to the radius of minimum circumscribed circle with the differentiation of needle pore defect.
Still more preferably scheme of the invention is:Specifically include in step s 5:Black region is classified as into pollution class;
Further, using area size information, bulky grain defect, scratch defects and little particle defect can be subdivided into, wherein, bulky grain lacks
Falling into can be according to the length-width ratio of minimum enclosed rectangle with the differentiation of scratch defects.
Still more preferably scheme of the invention is:Specifically include in step s 4:By rim detection, by described crystalline substance
Have edge line inside round area-of-interest classifies as exposure exception class;Further, using the length and number of edge line
Mesh, can segment ruling defect and the abnormal defect of exposure.
Still more preferably scheme of the invention is:Specifically include in step s 5:It is a series of by what is obtained in step S3
Hem width data be compared with the wafer hem width requirement of setting, and the situation that can not meet sets requirement is classified as into edge not
Symmetric defects or the excessive defect of hem width.
In the present invention, the wafer is a LED-PSS wafer for the circular configuration with trimming.
The beneficial effects of the present invention are, the image of wafer is shot by line scan camera, will obtain on this basis
Image mosaic into a complete image, using the edge of image processing software scanning wafer obtain wafer two edges and
Point on edge, the hem width of wafers is calculated using these points, secondly, using the inward flange of the wafer for obtaining it is divisible go out wafer
Area-of-interest, the algorithm using Threshold segmentation splits area-of-interest, can obtain the area of the black and white of area-of-interest
Domain, the major defect of wafer is included in the region of extracted black and white, finally, inside each defect
The defect that attribute will be obtained is classified accordingly, while obtaining the desired utilization such as the position of sorted each defect, area
Data, these data can provide supporting condition for the processing of wafer, to improve the processing efficiency and quality of wafer conscientiously.
Specific embodiment
In conjunction with accompanying drawing, presently preferred embodiments of the present invention is elaborated.
As shown in figure 1, being wafer outward appearance major defect schematic diagram involved in the present invention, in the present embodiment, this wafer
It is a LED-PSS wafer for the circular configuration with trimming.Wherein, label 11 is the edge of wafer, wherein positioned at outside
It is inward flange for outward flange, positioned at inner side;Label 12 is White Defects;Label 13 is black defect;Label 14 lacks for cut
Fall into.White Defects 12 specifically may include pin hole and image missing.Black defect 13 specifically may include bulky grain pollution and small
Grain pollution.
As shown in Figure 2 a and 2 b, it is that crystal round fringes scanning of the invention and hem width extract schematic diagram.Wherein, Fig. 2 a show
Boundary scan is gone out, Fig. 2 b show that hem width is extracted.Wherein, the mode according to boundary scan extracts hem width, referring to Fig. 2 a, mark
Numbers 21 is the points that outward flange scanning is obtained, and label 22 is the point obtained after inward flange scanning, and label 23 is the scan line at edge;If
Hem width is extracted by the way of rim detection, referring to Fig. 2 b, label 24 is the inward flange profile of wafer, and label 25 is outer for wafer
Edge contour.The detailed process that wafer hem width of the invention is extracted is as follows:
By the way of boundary scan:
1st, a central point for scanning is positioned, the mode for being used is manual delineation region, using delineation region manually
Used as the center scanned, the mode for positioning scanning center is not unique, and a kind of mode is only proposed in the present invention at center;
2nd, with scanning center as pivot, i.e. 360 degree of a circle of scanning wafer, the marginal point for being scanned;
3rd, the inward flange by obtaining calculates the hem width of wafer with outer peripheral corresponding points, and the distance between 2 points calculate public
Formula is:
4th, using data obtained above, compared with sets requirement, judge whether wafer is qualified.
By the way of rim detection:
1st, the outer edge profile of wafer is extracted using edge detection algorithm;
2nd, the distance on two profiles between points is calculated;
3rd, by the whether qualified of Distance Judgment wafer.
It is various types of wafer open defect images as shown in 3a to 3i.Wherein, Fig. 3 a show ruling defect, this
Invention is defined as A class defects.Fig. 3 b show that small area lacks defect, and the present invention is defined as B class defects.Fig. 3 c show
Large area lacks defect, and the present invention is defined as C class defects.Fig. 3 d show needle pore defect, and the present invention is defined as D classes and lacks
Fall into.Fig. 3 e show that small area pollutes defect, and the present invention is defined as E class defects.Fig. 3 f show pollution in wide area defect, this
Invention is defined as F class defects.Fig. 3 g show scratch defects, and the present invention is defined as G class defects.Fig. 3 h show edge not
Symmetric defects or the excessive defect of hem width, the present invention are defined as H class defects.Fig. 3 i show the abnormal defect of exposure, the present invention
It is defined as I class defects.
As shown in figure 4, being the classifying rules schematic diagram of wafer open defect.It can be seen that, the present invention can use Threshold segmentation side
Method, the region of the white and black that are partitioned into wafer image, the threshold segmentation method for being used has a lot, by changing threshold value
Preparation method or the size of threshold value can adjust the effect of segmentation.Further, it is possible to according to low tonal gradation(It is namely black
Color region)Pollution class defect is detected, further, according to the area size and style characteristic of figure, bulky grain can be subdivided into
Defect(F classes), scratch defects(G classes)With little particle defect(E classes), wherein, bulky grain defect(F classes)With scratch defects(G classes)
Differentiation can be according to the length-width ratio of minimum enclosed rectangle.Further, it is possible to according to tonal gradation high(Namely white portion)Inspection
Missing class defect is measured, further, according to the area size and style characteristic of figure, large area missing can be subdivided into(C classes)、
Small area is lacked(B classes)And needle pore defect(D classes), wherein, small area missing(B classes)With needle pore defect(D classes)Differentiation can be according to
According to the radius of minimum circumscribed circle, for example:The size that flaw can be defined is considered as needle pore defect less than 3 pixel regions.The present invention
Using the coordinate information of wafer outer edge, hem width data are compared with the wafer hem width requirement of setting, and can not
The situation for meeting sets requirement classifies as the asymmetric defect in edge or the excessive defect of hem width(H classes).The present invention can utilize edge
Detection algorithm detects the edge line of inside wafer, and exposure is classified as by have edge line inside the area-of-interest of described wafer
Light exception class;Further, using the length and number of edge line, ruling defect can be segmented(A classes)With the abnormal defect of exposure(I
Class).
It is several typical wafer open defect schematic diagrames as shown in Fig. 5 a to 5d.Wherein, in fig 5 a, label 41 is
The region of black, label 42 is the region of white, and label 43 is the region of cut.In figure 5b, label 44 is white portion
One partial enlarged drawing.In fig. 5 c, label 45 is a partial enlarged drawing of black region.In figure 5d, label 46 is to draw
The partial enlarged drawing of trace.It should be noted that Fig. 5 a to 5d only give three kinds of classification results of main defect, to thinner
The classification of cause, can carry out finer flaw and separate by the detection data to these three, and main classification foundation is exactly institute
The attribute of detection zone and customized some requirements, such as:Cut be in present condition line style region, cut and other
The difference of flaw be that the curvature very little of cut just can be by cut and other curves point according to such attribute
Leave;Again such as:Exposure anomalous presentation goes out lattice one by one, and ruling is exactly a more higher line of tonal gradation, root
They can just be separated by image algorithm according to the difference between them.
As shown in fig. 6, being the flow chart that the classification of wafer open defect and detection are realized using the present invention.It can be seen that, outside wafer
The detailed process for seeing defect classification and detection generally comprises following steps:
S1, scanning obtain wafer image, specifically, the multiple of wafer can be collected by high-resolution line scan camera
Row image, then the image mosaic of these row wafers into the image of the big wafer of a width will be obtained;
S2, wafer image is carried out edge extracting calculate hem width, specifically, wafer can be extracted by image processing algorithm
Marginal point or wafer edge, calculate wafer and be indifferent to the width in region, with exclude in advance the asymmetric defect of hem width or
The excessive defect of person's hem width;More specifically, can be obtained by way of scanning marginal point in image processing algorithm first a series of outer
The distance between the point at edge and inward flange, this series of two point are a series of hem width;Or, at image
The mode that marginal point is scanned in adjustment method obtains the external periphery outline and inward flange profile of wafer, and between the two profiles one is
The distance of row is a series of hem width;
S3, the area-of-interest for being partitioned into wafer, specifically, a circle with trimming are shaped as due to wafer,
Also include the region of being indifferent to of annular simultaneously, therefore, the edge for being extracted here includes outward flange and the inner edge of wafer
Edge, the zone line at the two edges is is indifferent to region, and is located at the region on the inside of inward flange and is described wafer
Area-of-interest;
S4, the area-of-interest to wafer carry out open defect detection, mainly, can be split by gray level threshold segmentation
White portion and black region in the image of the area-of-interest for going out wafer, as defective region;
S5, wafer open defect is sorted out, be specifically shown in the explanation of the foregoing classifying rules to Fig. 4.
The present invention shoots the scan image of wafer by line scan camera, and some row images that will be obtained on this basis are spelled
A complete image is connected into, the edge of scanning wafer obtains the point on two edges and edge of wafer, using these points
The hem width of wafer is calculated, secondly, using the area-of-interest for being partitioned into wafer of the inward flange of the wafer for obtaining, using threshold value point
The algorithm segmentation area-of-interest for cutting, obtains the region of the black and white of area-of-interest, and the major defect of wafer is all included
In the black and white region for being extracted, finally, the defect that will be obtained using the attribute inside each defect is classified accordingly,
The desired data for utilizing such as position, the area of sorted each defect are obtained simultaneously, and these data can be the processing of wafer
Supporting condition is provided, to improve the processing efficiency and quality of wafer.
It should be appreciated that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations, to ability
For field technique personnel, the technical scheme described in above-described embodiment can be modified, or it is special to which part technology
Levying carries out equivalent;And these modifications and replacement, should all belong to the protection domain of appended claims of the present invention.