CN103646930A - Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip flat pin structure and process method - Google Patents

Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip flat pin structure and process method Download PDF

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Publication number
CN103646930A
CN103646930A CN201310642044.XA CN201310642044A CN103646930A CN 103646930 A CN103646930 A CN 103646930A CN 201310642044 A CN201310642044 A CN 201310642044A CN 103646930 A CN103646930 A CN 103646930A
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Prior art keywords
metal substrate
photoresistance film
pin
back side
metal
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CN201310642044.XA
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CN103646930B (en
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梁新夫
梁志忠
王孙艳
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JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

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  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The invention relates to a secondary etching-prior-to-plating metal frame subtraction imbedded chip flip flat pin structure and a process method. The structure comprises a metal substrate fame (1). The metal substrate fame (1) is internally provided with base islands (2) and pins (3). The pins (3) are in step shapes. The back surface of each base island (2) is flush with the step surface of each pin (3). The back surface of each base island (2) and the step surface of each pin (3) are invertedly equipped with a chip (6) through bottom filling glue (5). The metal substrate fame (1) is internally filled with plastic packaging material (7). The front surface of the plastic packaging material (7) is flush with the step surface of each pin (3). The back surface of the plastic packaging material (7) is flush with the back surface of the metal substrate fame (1). The front surface of the base island (2), the front surface and the back surface of each pin (3) as well as the front surface and the back surface of the metal substrate fame (1) are provided with an anti-oxidation layer (4). The beneficial effect of the structure and method is that: the problem that the function and the application performance of a conventional metal lead frame are limited since an object cannot be imbedded in the metal lead frame with such plate thickness is solved.

Description

Secondary first loses rear plating frame subtraction and buries the flat leg structure of flip-chip and process
Technical field
The present invention relates to a kind of secondary and first lose rear plating frame subtraction and bury the flat leg structure of flip-chip and process, belong to semiconductor packaging field.
Background technology
Traditional flat-four-side mainly contains two kinds without pin metal leadframe structure:
Be flat-four-side without pin package (QFN) lead frame, the lead frame of this structure forms (as shown in figure 14) by copper material metal framework and high temperature resistant glued membrane;
Be to seal in advance flat-four-side without pin package (PQFN) lead frame, the lead frame structure of this structure comprises pin Yu Ji island, and the etching area between pin Yu Ji island is filled with plastic packaging material (as shown in figure 15).
There is following shortcoming in above-mentioned traditional metal lead frame:
1, traditional metal lead frame is as the package carrier that loads chip, and itself does not possess systemic-function, thereby has limited integrated functionality and application performance after traditional metal leadframe package;
2, because traditional metal lead frame itself does not possess systemic-function, can only carry out in lead frame front tiling or the stacked package of chip and assembly, and power device and control chip are encapsulated in same packaging body, the heat radiation of power device can affect the transmission of control chip signal;
3, because traditional metal lead frame itself does not possess systemic-function, so multifunction system integration module can only be in traditional metal lead frame front by tiling or stacking realization of multi-chip and assembly, correspondingly also just increase component module shared space on PCB.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, provide a kind of secondary first to lose rear plating frame subtraction and bury the flat leg structure of flip-chip and process, it can solve the problem that traditional metal lead frame lacks systemic-function.
The object of the present invention is achieved like this: a kind of secondary first loses rear plating frame subtraction and buries the flat leg structure of flip-chip, it comprises Metal Substrate sheet frame, described Metal Substrate sheet frame inside is provided with Ji Dao and pin, described pin is step-like, the front of described Ji Dao and pin flushes with Metal Substrate sheet frame front, the back side of described pin flushes with the back side of Metal Substrate sheet frame, the described Ji Dao back side flushes with the step surface of pin, on the step surface of the described Ji Dao back side and pin, by underfill upside-down mounting, there is chip, described Metal Substrate sheet frame interior zone is filled with plastic packaging material, described plastic packaging material is positive to be flushed with pin step surface, the described plastic packaging material back side flushes with the Metal Substrate sheet frame back side, described base island is positive, the front and back of the front and back of pin and Metal Substrate sheet frame is provided with metal oxidation resistance layer or coating antioxidant (OSP).
Between the described back side, chip Yu Ji island and pin step surface, be provided with metal level.
Secondary first loses the process that rear plating frame subtraction buries the flat leg structure of flip-chip, said method comprising the steps of:
Step 1, get metal substrate
Step 2, the operation of subsides photoresistance film
In metal substrate front and the back side stick respectively the photoresistance film that can carry out exposure imaging;
Part photoresistance film is removed at step 3, the metal substrate back side
Part figure photoresistance film is carried out graph exposure, develops and removes at the metal substrate back side that utilizes exposure imaging equipment that step 2 is completed to the operation of subsides photoresistance film, and to expose, the metal substrate back side is follow-up need to carry out etched region;
Step 4, etching
Chemical etching is carried out in the region that part photoresistance film is removed at the metal substrate back side in step 3, forms corresponding Ji Dao and step shape pin after completing chemical etching;
Step 5, removal photoresistance film
Remove the photoresistance film of metallic substrate surfaces;
Step 6, load
In step 4, form the back side, Ji island and pin step surface the chip that completes surface and have salient point is carried out to upside-down mounting, completing after and carry out bottom filling by underfill and protect;
Step 7, epoxy resin plastic packaging
The protection of epoxy resin plastic packaging is carried out in metal substrate back etched region after completing load;
Step 8, the operation of subsides photoresistance film
The photoresistance film that can carry out exposure imaging is sticked at the metal substrate front and the back side that in step 7, complete after epoxy resin plastic packaging;
Step 9, the positive part photoresistance film of removing of metal substrate
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 8 is completed to the operation of subsides photoresistance film, and to expose, metal substrate front is follow-up need to carry out etched region;
Step 10, etching
In step 9, chemical etching is carried out in the positive region of removing part photoresistance film of metal substrate;
Step 11, removal photoresistance film
Remove the photoresistance film of metallic substrate surfaces;
Step 12, plating anti-oxidant metal layer or coating antioxidant (OSP)
Remove photoresistance film in step 11 after, anti-oxidant metal layer plating is carried out in the exposed metal surface of metallic substrate surfaces.
In step 5, remove between photoresistance film and step 6 load and carry out anti-oxidant metal layer plating or coating antioxidant (OSP) in the exposed metal surface of metallic substrate surfaces.
Compared with prior art, the present invention has following beneficial effect:
1, the interlayer of subtractive metallization technology lead frame can be because of the needs of system and function be imbedded active member or assembly or passive assembly in the position of needs or region, becomes a system-level metal lead wire frame of individual layer circuit;
2, from the outward appearance of subtractive metallization technology lead frame finished product, can't see inner interlayer has completely imbedded because of system or the object of function needs, especially the imbedding X-ray and all cannot inspect of silicon material chip, fully reaches confidentiality and the protectiveness of system and function;
3, the interlayer of subtractive metallization technology lead frame can be imbedded high-power component in manufacturing process, secondary encapsulation carries out the load of control chip again, thereby high-power component and control chip are contained in respectively subtractive metallization technology lead frame both sides, can avoid high-power component to disturb the signal of control chip because of thermal radiation and transmit;
4, subtractive metallization technology lead frame itself includes the function of imbedding object, after secondary encapsulation, can fully realize the integrated of systemic-function and integrate, it is little that thereby the volume size of the component module of said function comes than the module of conventional lead frame encapsulation, corresponding space shared on PCB is also just fewer, thereby has also just reduced cost;
5, the interlayer of subtractive metallization technology lead frame can be because heat conduction or heat radiation need in manufacturing process be imbedded heat conduction or heat radiation object in the position of needs or region, thereby improves the radiating effect of whole encapsulating structure;
6, subtractive metallization technology lead frame finished product itself has just been rich in various assemblies, if no longer carry out, under its condition of follow-up encapsulation for the second time, subtractive metallization technology lead frame being cut according to each lattice unit, itself just can become a ultra-thin packaging body;
7, subtractive metallization technology lead frame, except itself including imbedding of object can also superpose in packaging body periphery function different unit package or system in package, fully reaches the dual system of individual layer circuit metal lead wire frame or the encapsulation technology ability of polyphyly irrespective of size again;
8, object or the object in subtractive metallization technology lead frame, imbedded all flush with metal thickness, embody fully among the ultra-thin and highdensity thickness space being filled in subtractive metallization technology lead frame.
9, secondary first loses rear plating frame subtraction technology lead frame and can present certain height offset in plastic packaging material front, die-attach area surface, its advantage be after plastic packaging material plastic packaging for the second time firmly snatch live metal salient point, thereby reduced plastic-sealed body and die-attach area produce layering reliability bad because of the gap of CTE (coefficient of expansion or shrinkage).
Accompanying drawing explanation
Fig. 1 ~ Figure 12 is that a kind of secondary of the present invention first loses each operation schematic diagram that rear plating frame subtraction buries the flat leg structure process of flip-chip.
Figure 13 is that a kind of secondary of the present invention first loses the schematic diagram that rear plating frame subtraction buries the flat leg structure of flip-chip.
Figure 14 is that traditional flat-four-side is without the schematic diagram of pin package (QFN) lead frame structure.
Figure 15 is for to seal flat-four-side without the schematic diagram of pin package (PQFN) lead frame structure in advance.
Wherein:
Metal Substrate sheet frame 1
Base island 2
Pin 3
Anti oxidation layer 4
Underfill 5
Chip 6
Plastic packaging material 7.
Embodiment
Referring to Figure 13, a kind of secondary of the present invention first loses rear plating frame subtraction and buries the flat leg structure of flip-chip, it comprises Metal Substrate sheet frame 1, described Metal Substrate sheet frame 1 inside is provided with base island 2 and pin 3, described pin 3 is step-like, the front of described base island 2 and pin 3 flushes with Metal Substrate sheet frame 1 front, the back side of described pin 3 flushes with the back side of Metal Substrate sheet frame 1, 2 back sides, described base island flush with the step surface of pin 3, on the step surface of 2 back sides, described base island and pin 3, by underfill 5 upside-down mountings, there is chip 6, described Metal Substrate sheet frame 1 interior zone is filled with plastic packaging material 7, described plastic packaging material 7 is positive to be flushed with pin 3 step surfaces, described plastic packaging material 7 back sides flush with Metal Substrate sheet frame 1 back side, 2 fronts, described base island, the front and back of the front and back of pin 3 and Metal Substrate sheet frame 1 is provided with anti oxidation layer 4.
Its process is as follows:
Step 1, get metal substrate
Referring to Fig. 1, get the metal substrate that a slice thickness is suitable, the material of metal substrate can be metallics or the nonmetallic substance that copper material, iron material, zinc-plated material, stainless steel, aluminium maybe can reach conducting function, and the selection of thickness can be selected according to product performance;
Step 2, the operation of subsides photoresistance film
Referring to Fig. 2, in metal substrate front and the back side stick respectively the photoresistance film that can carry out exposure imaging, photoresistance film can be that dry type photoresistance film can be also wet type photoresistance film;
Part photoresistance film is removed at step 3, the metal substrate back side
Referring to Fig. 3, part figure photoresistance film is carried out graph exposure, develops and removes at the metal substrate back side that utilizes exposure imaging equipment that step 2 is completed to the operation of subsides photoresistance film, and to expose, the metal substrate back side is follow-up need to carry out etched region;
Step 4, etching
Referring to Fig. 4, in step 3, chemical etching is carried out in the region of metal substrate back side removal part photoresistance film, after completing chemical etching, form corresponding Ji Dao and step shape pin, the technology of chemical etching can adopt copper chloride, iron chloride or can carry out the chemical agent of corroding metal material;
Step 5, removal photoresistance film
Referring to Fig. 5, remove the photoresistance film of metallic substrate surfaces, the method for removing photoresistance film adopts chemical medicinal liquid to soften and adopts high pressure water washing;
Step 6, load
Referring to Fig. 6, in step 4, form the back side, Ji island and pin step surface the chip that completes surface and have salient point is carried out to upside-down mounting, completing after and carry out bottom filling by underfill and protect;
Tin diffusion when preventing the electrical interconnected and upside-down mounting between metal substrate oxidation affects chip and substrate can first be carried out anti-oxidant metal layer plating or antioxidant coating in the exposed metal surface of metallic substrate surfaces before step 6 load.
Step 7, epoxy resin plastic packaging
Referring to Fig. 7, the protection of epoxy resin plastic packaging is carried out in the metal substrate back etched region after completing load, and epoxide resin material can be selected to have filler or do not have Packed kind according to product performance;
Step 8, the operation of subsides photoresistance film
Referring to Fig. 8, the photoresistance film that can carry out exposure imaging is sticked at the metal substrate front and the back side that in step 7, complete after epoxy resin plastic packaging;
Step 9, the positive part photoresistance film of removing of metal substrate
Referring to Fig. 9, part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 8 is completed to the operation of subsides photoresistance film, and to expose, metal substrate front is follow-up need to carry out etched region;
Step 10, etching
Referring to Figure 10, in step 9, chemical etching is carried out in the positive region of removing part photoresistance film of metal substrate, and the technology of chemical etching can adopt copper chloride, iron chloride or can carry out the chemical agent of corroding metal material;
Step 11, removal photoresistance film
Referring to Figure 11, remove the photoresistance film of metallic substrate surfaces, the method for removing photoresistance film adopts chemical medicinal liquid to soften and adopts high pressure water washing;
Step 12, plating anti-oxidant metal layer or coating antioxidant (OSP)
Referring to Figure 12, in step 11, remove photoresistance film after the exposed metal surface of metallic substrate surfaces carry out anti-oxidant metal layer plating, as gold, golden, the NiPdAu of nickel, tin or coating antioxidant (OSP).

Claims (4)

1. a secondary first loses rear plating frame subtraction and buries the flat leg structure of flip-chip, it is characterized in that: it comprises Metal Substrate sheet frame (1), described Metal Substrate sheet frame (1) inside is provided with Ji Dao (2) and pin (3), described pin (3) is step-like, the front of described Ji Dao (2) and pin (3) flushes with Metal Substrate sheet frame (1) front, the back side of described pin (3) flushes with the back side of Metal Substrate sheet frame (1), described Ji Dao (2) back side flushes with the step surface of pin (3), on the step surface of described Ji Dao (2) back side and pin (3), by underfill (5) upside-down mounting, there is chip (6), described Metal Substrate sheet frame (1) interior zone is filled with plastic packaging material (7), described plastic packaging material (7) is positive to be flushed with pin (3) step surface, described plastic packaging material (7) back side flushes with Metal Substrate sheet frame (1) back side, described Ji Dao (2) front, the front and back of the front and back of pin (3) and Metal Substrate sheet frame (1) is provided with anti oxidation layer (4).
2. a kind of secondary according to claim 1 first loses rear plating frame subtraction and buries the flat leg structure of flip-chip, it is characterized in that: between (2) back side, described chip (6) Yu Ji island and pin (3) step surface, be provided with metal level.
3. secondary first loses the process that rear plating frame subtraction buries the flat leg structure of flip-chip, it is characterized in that said method comprising the steps of:
Step 1, get metal substrate
Step 2, the operation of subsides photoresistance film
In metal substrate front and the back side stick respectively the photoresistance film that can carry out exposure imaging;
Part photoresistance film is removed at step 3, the metal substrate back side
Part figure photoresistance film is carried out graph exposure, develops and removes at the metal substrate back side that utilizes exposure imaging equipment that step 2 is completed to the operation of subsides photoresistance film, and to expose, the metal substrate back side is follow-up need to carry out etched region;
Step 4, etching
Chemical etching is carried out in the region that part photoresistance film is removed at the metal substrate back side in step 3, forms corresponding Ji Dao and step shape pin after completing chemical etching;
Step 5, removal photoresistance film
Remove the photoresistance film of metallic substrate surfaces;
Step 6, load
In step 4, form the back side, Ji island and pin step surface the chip that completes surface and have salient point is carried out to upside-down mounting, completing after and carry out bottom filling by underfill and protect;
Step 7, epoxy resin plastic packaging
The protection of epoxy resin plastic packaging is carried out in metal substrate back etched region after completing load;
Step 8, the operation of subsides photoresistance film
The photoresistance film that can carry out exposure imaging is sticked at the metal substrate front and the back side that in step 7, complete after epoxy resin plastic packaging;
Step 9, the positive part photoresistance film of removing of metal substrate
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal substrate front that utilizes exposure imaging equipment that step 8 is completed to the operation of subsides photoresistance film, and to expose, metal substrate front is follow-up need to carry out etched region;
Step 10, etching
In step 9, chemical etching is carried out in the positive region of removing part photoresistance film of metal substrate;
Step 11, removal photoresistance film
Remove the photoresistance film of metallic substrate surfaces;
Step 12, plating anti-oxidant metal layer or coating antioxidant (OSP)
Remove photoresistance film in step 11 after, anti-oxidant metal layer plating or coating antioxidant (OSP) are carried out in the exposed metal surface of metallic substrate surfaces.
4. a kind of secondary according to claim 3 first loses the process that rear plating frame subtraction buries the flat leg structure of flip-chip, it is characterized in that: in step 5, remove between photoresistance film and step 6 load and carry out anti-oxidant metal layer plating or antioxidant coating in the exposed metal surface of metallic substrate surfaces.
CN201310642044.XA 2013-12-05 2013-12-05 Secondary etching-prior-to-plametal metal frame subtraction buries the flat leg structure of flip-chip and process Active CN103646930B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113555328A (en) * 2021-04-02 2021-10-26 江苏尊阳电子科技有限公司 Packaging process of packaging structure with etched back first

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030064547A1 (en) * 1999-02-01 2003-04-03 Salman Akram High density modularity for IC's
CN1453858A (en) * 2002-04-22 2003-11-05 Nec化合物半导体器件株式会社 Semiconductor device and producing method thereof
CN101814446A (en) * 2010-04-28 2010-08-25 江苏长电科技股份有限公司 Island expose and multi-salient-point island expose lead frame structure and carving and plating method thereof
CN101814482A (en) * 2010-04-30 2010-08-25 江苏长电科技股份有限公司 Base island lead frame structure and production method thereof
CN102714201A (en) * 2010-01-19 2012-10-03 维西埃-硅化物公司 Semiconductor package and method
CN103400771A (en) * 2013-08-06 2013-11-20 江苏长电科技股份有限公司 Packaging-prior-to-etching chip-flipped type three-dimensional system-level metal circuit board structure and process method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030064547A1 (en) * 1999-02-01 2003-04-03 Salman Akram High density modularity for IC's
CN1453858A (en) * 2002-04-22 2003-11-05 Nec化合物半导体器件株式会社 Semiconductor device and producing method thereof
CN102714201A (en) * 2010-01-19 2012-10-03 维西埃-硅化物公司 Semiconductor package and method
CN101814446A (en) * 2010-04-28 2010-08-25 江苏长电科技股份有限公司 Island expose and multi-salient-point island expose lead frame structure and carving and plating method thereof
CN101814482A (en) * 2010-04-30 2010-08-25 江苏长电科技股份有限公司 Base island lead frame structure and production method thereof
CN103400771A (en) * 2013-08-06 2013-11-20 江苏长电科技股份有限公司 Packaging-prior-to-etching chip-flipped type three-dimensional system-level metal circuit board structure and process method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113555328A (en) * 2021-04-02 2021-10-26 江苏尊阳电子科技有限公司 Packaging process of packaging structure with etched back first

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