CN101814482A - Base island lead frame structure and production method thereof - Google Patents

Base island lead frame structure and production method thereof Download PDF

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Publication number
CN101814482A
CN101814482A CN 201010165896 CN201010165896A CN101814482A CN 101814482 A CN101814482 A CN 101814482A CN 201010165896 CN201010165896 CN 201010165896 CN 201010165896 A CN201010165896 A CN 201010165896A CN 101814482 A CN101814482 A CN 101814482A
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pin
front
pins
island
base island
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CN 201010165896
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CN101814482B (en
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梁志忠
王新潮
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江苏长电科技股份有限公司
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Abstract

The invention relates to a base island lead frame structure and a production method thereof. The structure comprises a base island (1) and pins (2), wherein a first metal layer (4) is arranged on the front sides of the base island (1) and the pins (2); a second metal layer (5) is arranged on the rear sides of the base island (1) and the pins (2); the front sides of the pins (2) extend to the side of the base island (1) as much as possible; non-filler plastic packaging materials (3) are embedded in the peripheral regions of the pins (2), the region between the base island (1) and the pins (2) and the region between the pin (2) and the pin (2); and the non-filler plastic packaging materials (3) can connect the lower peripheral parts of the pins, the lower parts of the pins (2) and the lower part of the base island (1), as well as the lower part of the pin (2) and the lower part of the pin (2) into a whole and make the size of the back sides of the base island (1) and the pins (2) less than that of the front sides of the base island (1) and the pins (2) so as to form a structure, with a bigger upper part and a smaller lower part, of the base island and the pins. The base island lead frame structure and the production method thereof have the advantages of large restraint capacity of the plastic packaging body and the pins, reduction in cost, energy conservation and carbon reduction and reduction in waste.

Description

有基岛引线框结构及其生产方法 A base island of the leadframe structure and production method thereof

(-)技术领域 (-) FIELD

[0001] 本发明涉及一种引线框结构及其生产方法。 [0001] The present invention relates to a leadframe structure and production method. 属于半导体封装技术领域。 Belonging to the technical field of semiconductor packaging.

(二)背景技术 (B) Background Art

[0002] 传统的引线框结构主要有二种: [0002] The conventional leadframe structure there are two kinds:

[0003]第一种: [0003] The first:

[0004] 采用金属基板的正面进行化学蚀刻及表面电镀层后,在金属基板的背面贴上一层耐高温的胶膜形成可以进行封装过程的引线框载体(如图14所示)。 [0004] With the front of the metal substrate and chemically etching the surface of a plating layer on the back surface of the metal substrate layer of refractory paste film formed can lead frame carrier packaging process (Figure 14).

[0005]第二种: [0005] The second:

[0006] 采用金属基板的正面进行化学蚀刻及表面电镀层后,即完成引线框的制作(如图15所示)。 After [0006] The front surface of the metal substrate and chemically etching the surface of the plated layer, i.e., to complete the production of the lead frame (as shown in Figure 15). 而引线框的背面则在封装过程中再进行背面蚀刻。 The back of the lead frame is then etched in the back surface of the packaging process.

[0007] 而上述的二种引线框在封装过程中存在了以下的不足点: [0007] The above-described two kinds of primers and the presence of the following frame is less than during the packaging process point:

[0008]第一种: [0008] The first:

[0009] 1)此种引线框架因背面必须要贴上一层昂贵可抗高温的胶膜。 [0009] 1) because the back surface of such a lead frame must be affixed a layer of expensive high-temperature resistant film. 所以直接增加了高昂的成本。 So directly increases the high cost.

[0010] 2)也因为此种引线框架的背面必须要贴上一层可抗高温的胶膜,所以在封装过程中的装片工艺只能使用导电或是不导电的树脂工艺,而完全不能采用共晶工艺以及软焊料的工艺进行装片,所以可选择的产品种类就有较大的局限性。 [0010] 2) Because of the back surface of the lead frame must be of such a layer of paste of a high temperature resistant film, the loading process only during the packaging process using a conductive or non-conductive resin technology, can not be completely and process technology using eutectic solder die bonding is performed, so that there are alternative types of products is a big limitation.

[0011] 3)又因为此种引线框架的背面必须要贴上一层可抗高温的胶膜,而在封装过程中的球焊键合工艺中,因为此可抗高温的胶膜是软性材质,所以造成了球焊键合参数的不稳定,严重的影响了球焊的质量与产品可靠度的稳定性。 [0011] 3) and since the back surface of the lead frame must be of such a layer of paste of a high temperature resistant film, and in the packaging process solder ball bonding process because this film is a high temperature resistant soft material, so destabilized the ball bond bonding parameters, and seriously affected the stability of the reliability and quality of ball bonding products.

[0012] 4)再因为此种引线框架的背面必须要贴上一层可抗高温的胶膜,而在封装过程中的塑封工艺过程,因为塑封的高压关系很容易造成引线框架与胶膜之间渗入塑封料,而将原本应属金属脚(引脚)是导电的型态因为渗入了塑封料反而变成了绝缘脚(如图16所示)° [0012] 4) again because the back surface of the lead frame must be of such a layer of paste of a high temperature resistant film, and in the packaging process of molding process, because the relationship between the high-pressure molding of lead frame is likely to cause the film penetrate between plastic materials, should belong to the originally metal pin (pin) is electrically conductive patterns as plastic materials have become infiltrated with an insulating pin (shown in Figure 16) °

[0013]第二种: [0013] The second:

[0014] 此种引线框架结构在金属基板正面进行了半蚀刻工艺,虽然可以解决第一种引线框架的问题,但是因为只在金属基板正面进行了半蚀刻工作,而在塑封过程中塑封料只有包覆住半只脚的高度,所以塑封体与金属脚的束缚能力就变小了,如果塑封体贴片到PCB 板上不是很好时,再进行返工重贴,就容易产生掉脚的问题(如图17所示)。 [0,014] Such a leadframe structure in a front half-etching process the metal substrate, can solve the problem of a first lead frame, but because only the front half-etching the metal substrate at work, and in the plastic material during molding only covering live half a leg height, so the ability to be bound plastic body and the metal pin becomes small, if the plastic sheet considerate to the PCB is not very good, then rework paste, can easily cause problems foot off (it is shown in FIG. 17).

[0015] 尤其塑封料的种类是采用有填料时候,因为材料在生产过程的环境与后续表面贴装的应力变化关系,会造成金属与塑封料产生垂直型的裂缝,其特性是填料比例越高则越硬越脆越容易产生裂缝。 [0015] In particular, the type of plastic materials is the use of a filler time, because the material in the environment with a subsequent surface mount manufacturing process changes the relationship between stress, metal and plastic materials can cause vertical cracks generated, which is characterized by the higher proportion of filler the harder the more brittle cracks more easily.

[0016] 另外,由于芯片与引脚之间的距离较远,如图18〜19所示,金属线的长度较长,金属线成本较高(尤其是昂贵的纯金质的金属线);同样由于金属线的长度较长,使得芯片的信号输出速度较慢(由其是存储类的产品以及需要大量数据的计算,更为突出);也同样由于金属线的长度较长,所以金属线所存在的寄生电阻/寄生电容与寄生电杆对信号的干扰也较高;再由于芯片与引脚之间的距离较远,使得封装的体积与面积较大,材料成本较高, 废弃物较多。 [0016] Further, since the distance between the chip and pin far, the longer length of the metal wire, the higher (especially expensive gold wire mass) As the metal wire 18~19 costs; also since the length of the metal wire is longer, so that the signal output from the slower speed of the chip (by product class and is stored calculation requires large amounts of data, more prominent); equally long since the length of the metal wire, the metal wire the presence of parasitic resistance / parasitic capacitance parasitic pole higher interference signal; then the distance between the pins and the chip far, so that a larger area of ​​the package volume, high material costs, compared with the waste many.

(三)发明内容 (Iii) Disclosure of the Invention

[0017] 本发明的目的在于克服上述不足,提供一种降低封装成本、可选择的产品种类广、 球焊的质量与产品可靠度的稳定性好、塑封体与金属脚的束缚能力大的有基岛引线框结构及其生产方法。 [0017] The object of the invention to overcome these shortcomings, there is provided a packaging cost reduction, optionally wide product range, good stability ball bonding reliability and product quality, large capacity bound of the plastic body and the metal pin are group leadframe island structure and production process.

[0018](三)发明内容 [0018] (iii) Disclosure of the Invention

[0019] 本发明的目的是这样实现的:一种有基岛引线框结构,包括基岛和引脚,在所述基岛和引脚的正面设置有第一金属层,在所述基岛和引脚的背面设置有第二金属层,所述引脚正面尽可能的延伸到基岛旁边,在所述引脚外围的区域、引脚与基岛之间的区域以及引脚与引脚之间的区域嵌置有无填料的塑封料,所述无填料的塑封料将引脚下部外围、引脚下部与基岛下部以及引脚下部与引脚下部连接成一体,且使所述基岛和引脚背面尺寸小于基岛和引脚正面尺寸,形成上大下小的基岛和引脚结构。 [0019] The object of the present invention is implemented as follows: a kind of island-yl leadframe structure comprising a base and pin island, the island disposed in the front side of the base with a pin and a first metal layer, the base island and a back surface provided with a second pin metal layer, said pin extending to the front side of the base as the island, in the region of the periphery of the pin, the pin and the pin region and between the pin and the base island region embedded between the plastic materials or absence of a filler, the filler-free plastic material of the lower periphery of the pin, the pin lower portion and a lower portion integrally connected to a lower pin and the lower pin island group, and the group Island and island-yl pin back surface smaller in size than the size of positive and pin, formed on a large group of small islands and lead structure.

[0020] 本发明有基岛引线框结构的生产方法,所述方法包括以下工艺步骤: [0020] with a method for producing island-yl leadframe structure of the present invention, the method comprises the following process steps:

[0021] 步骤一、取金属基板 [0021] Step a, taking the metal substrate

[0022] 步骤二、贴膜作业 [0022] Step two, Foil job

[0023] 利用贴膜设备在金属基板的正面及背面分别贴上可进行曝光显影的光刻胶膜, [0023] The film using the apparatus in front and back surfaces of the substrate were adhered to the metal may be exposed and developed photoresist film,

[0024] 步骤三、金属基板正面去除部分光刻胶膜 [0024] Step three, the front portion of the metal substrate the photoresist film is removed

[0025] 利用曝光显影设备将步骤二完成贴膜作业的金属基板正面进行曝光显影去除部分光刻胶膜,以露出金属基板上后续需要进行半蚀刻的区域, [0025] The apparatus using exposure and development step to complete the two operations the metal foil substrate front side exposed and developed portions of the photoresist film is removed to expose the need for subsequent half-etched area on the metal substrate,

[0026] 步骤四、金属基板正面半蚀刻 [0026] Step four, the front half-etching the metal substrate

[0027] 对步骤三中金属基板正面去除部分光刻胶膜的区域进行半蚀刻,在金属基板正面形成凹陷的半蚀刻区域,同时相对形成基岛和引脚的背面, [0027] The area of ​​the portion of the photoresist film in step III removed metal substrate front half-etched to form a recess in the region of half-etched metal front substrate, while the opposite back surface of the island and the pins are formed,

[0028] 步骤五、金属基板正背面揭膜作业 [0028] Step 5 is the back of the metal substrate removing film job

[0029] 将金属基板正面余下的光刻胶膜和背面的光刻胶膜揭除。 [0029] The remaining photoresist film having a metal front substrate and the back of the resist film removability.

[0030] 步骤六、金属基板正面半蚀刻区域填涂无填料的软性填缝剂 [0030] Step six, front half-etched region of the metal substrate unfilled flexible caulk Tiantu

[0031] 在步骤四金属基板正面形成凹陷的半蚀刻区域,填涂上无填料的软性填缝剂,并同时进行烘烤,促使无填料的软性填缝剂固化成无填料的塑封料。 [0031] The half-etched region of the recess formed on the front surface of the metal substrate in step four, the filler-free soft Tiantu caulks, and baked at the same time, causes no filler into a soft curable sealant filler-free plastic materials .

[0032] 步骤七、金属基板正背面贴膜作业 [0032] Step seven, the metal substrate is the back film job

[0033] 利用贴膜设备在已完成填涂无填料的软性填缝剂作业的金属基板的正面及背面分别贴上可进行曝光显影的光刻胶膜, [0033] The film using the apparatus front and rear sides, respectively labeled Tiantu completed without filling caulk job soft metal substrate can be exposed photoresist film is developed,

[0034] 步骤八、去除部分光刻胶膜 [0034] Step eight, portions of the photoresist film is removed

[0035] 在金属基板的正面及背面去除部分光刻胶膜,用意是露出基岛和引脚的背面以及正面。 [0035] The portions of the photoresist film is removed in front and back surfaces of the metal substrate, exposing the back side is intended and base island and a front pin.

[0036] 步骤九、镀金属层 [0036] Step Nine, metallizations

[0037] 在步骤八露出的基岛和引脚的背面镀上第二金属层,在基岛和引脚的正面镀上第 [0037] back surface of the island, and eight pins in the step of plating the exposed second metal layer, plating the first group islands and the front pins

一金属层[0038] 步骤十、去除金属基板背面部分光刻胶膜 A metal layer [0038] Step 10, the metal back surface of the photoresist film removing a portion of the substrate

[0039] 去除金属基板背面部分光刻胶膜,以露出金属基板背面引脚外围的区域、引脚与基岛之间的区域以及引脚与引脚之间的区域, [0039] removing portions of the photoresist film of a metal back substrate to expose a peripheral region of the pin of the back surface of the metal substrate, and the region between the pins and the pin between the pin and the base island,

[0040] 步骤十一、金属基板背面半蚀刻 [0040] Step 11, the back half-etching the metal substrate

[0041] 在金属基板的背面对不被光刻胶膜覆盖的区域即步骤四余下部分的金属蚀刻出所述的基岛和引脚的正面,同时将引脚正面尽可能的延伸到基岛旁边,且使所述基岛和引脚背面尺寸小于基岛和引脚正面尺寸,形成上大下小的基岛和引脚结构。 [0,041] back surface of the metal substrate in a region not covered with the photoresist film i.e., four steps of etching the remaining portion of the metal base islands and the front pin, while the front pins extending into the base as much as possible next to the island, and the islands and the group size less than the back pin and pin group island size front, is formed on a large group of small islands and lead structure.

[0042] 步骤十二、金属基板正背面揭膜作业 [0042] Step 12, the metal substrate is the back of the job Jiemo

[0043] 将金属基板正面和背面余下的光刻胶膜揭除。 [0043] The front and rear surfaces of the metal substrate remaining photoresist film removability.

[0044] 本发明的有益效果是: [0044] Advantageous effects of the present invention are:

[0045] 1)此种引线框的背面不须要贴上一层昂贵可抗高温的胶膜。 [0045] 1) the back surface of such a lead frame need not be affixed a layer of expensive high-temperature resistant film. 所以直接降低了高昂的成本。 So directly we reduce the high cost.

[0046] 2)也因为此种引线框架的背面不须要贴上一层可抗高温的胶膜,所以在封装过程中的装片工艺除了能使用导电或是不导电的树脂工艺外,还能采用共晶工艺以及软焊料的工艺进行装片,所以可选择的产品种类就广。 [0046] 2) Because of the back surface of the lead frame does not require such a layer of paste of a high temperature resistant film, the film loading process during the packaging process can be used in addition to a conductive or non-conductive resin technology, but also and process technology using eutectic solder die bonding is performed, so that it can select a wide range of products.

[0047] 3)又因为此种引线框架的背面不须要贴上一层可抗高温的胶膜,确保了球焊键合参数的稳定性,保证了球焊的质量与产品可靠度的稳定性。 [0047] 3) and the lead frames such as backside layer of paste does not require high temperatures resistant film, ensure the stability of the ball bond to bonding parameters, ensure the stability of the ball bond reliability and product quality .

[0048] 4)再因为此种引线框架不须要贴上一层可抗高温的胶膜,而在封装过程中的塑封工艺过程,完全不会造成引线框与胶膜之间渗入塑封料。 [0048] 4) and then the lead frame as such does not need to paste a layer of high-temperature resistant film, molding processes in the packaging process, it will not cause penetrate between the leadframe and the plastic film material.

[0049] 5)由于在所述引脚(引脚)与引脚间的区域嵌置有无填料的软性填缝剂,该无填料的软性填缝剂与在塑封过程中的常规有填料塑封料一起包覆住整个引脚的高度,所以塑封体与引脚的束缚能力就变大了,不会再有产生掉脚的问题。 [0049] 5) The presence or absence of the insert facing the flexible sealant in a region between the filler (pin) the pin with the pin, without the flexible filler in a conventional caulking process are plastic plastic-coated filler material live together the entire height of the pins, so the ability to bound plastic body with pins becomes large, there will be no problems off the foot.

[0050] 6)由于采用了正面与背面分开蚀刻作业的方法,所以在蚀刻作业中可形成背面引脚的尺寸稍小而正面引脚尺寸稍大的结构,而同个引脚的上下大小不同尺寸在被无填料的塑封料所包覆的更紧更不容易产生滑动而掉脚。 [0050] 6) Since a process separate from the front and back etching operation, so that the etching operation may be formed in the rear surface of the pin is slightly smaller size slightly larger dimensions and positive pin structure, with different vertical sizes of pins the size of the filler-free plastic material coated with tighter less prone to slide off the foot.

[0051] 7)由于应用了背面与正面分开蚀刻的技术,所以能够将引线框正面的引脚尽可能的延伸到基岛的旁边,促使芯片与引脚距离大幅的缩短,如图20〜21所示,如此金属线的成本也可以大幅的降低(尤其是昂贵的纯金质的金属线)。 [0051] 7) due to the application of the back and front of the separate etching technique, it is possible to lead frame extending next to a front pin base island as possible, to promote the chip and greatly shorten the distance of the pin, as shown in FIG 20~21 , the cost of such metal lines can be significantly reduced (in particular, expensive quality gold wire).

[0052] 8)也因为金属线的缩短使得芯片的信号输出速度也大幅的增速(尤其存储类的产品以及需要大量数据的计算,更为突出),由于金属线的长度变短了,所以金属线所存在的寄生电阻/寄生电容与寄生电杆对信号的干扰也大幅度的降低。 [0052] 8) also shortened because the metal lines such that the output speed signal is also a substantial growth of the chip (in particular storage class products requires a large amount of data and calculating a more prominent), since the length of the metal wire becomes shorter, so the presence of the metal wire parasitic resistance and parasitic capacitance of a parasitic pole interference signals are greatly reduced /.

[0053] 9)因运用了引脚的延伸技术,所以可以容易的制作出高脚数与高密度的脚与脚之间的距离,使得封装的体积与面积可以大幅度的缩小。 [0053] 9) extending in the art by the use of pins, it is easy to create a distance between the foot and the high number of feet and feet high density, so that the volume and area of ​​the package can be greatly reduced.

[0054] 10)因为将封装后的体积大幅度的缩小,更直接的体现出材料成本大幅度的下降与因为材料用量的减少也大幅度的减少废弃物环保的困扰。 [0,054] 10) will be greatly reduced since the volume of the package, more directly reflects the significant decrease in material costs due to reduced material usage and also greatly reduces environmental waste problems.

(四)附图说明 (Four) BRIEF DESCRIPTION

[0055] 图1〜12为本发明无基岛多圈脚基岛引线框的生产方法各工序示意图。 [0055] FIG 1~12 schematic diagram of a base island each step producing a plurality of turns foot base island leadframe present invention.

[0056] 图13为本发明有基岛引线框结构示意图。 [0056] FIG. 13 is a schematic view of the invention leadframe structure yl Island. [0057] 图14为以往在金属基板的背面贴上一层耐高温的胶膜图作业。 [0057] FIG. 14 is a conventional back surface layer of the metal substrate temperature in film paste job FIG.

[0058] 图15为以往采用金属基板的正面进行化学蚀刻及表面电镀层作业图。 [0058] FIG. 15 is a front side of the metal substrate using a conventional chemical etching and surface plating layer job FIG.

[0059] 图16为以往形成绝缘脚示意图。 [0059] FIG. 16 is a schematic view of a conventional insulating pin is formed.

[0060] 图17为以往形成的掉脚图。 [0060] FIG. 17 is a pin out diagram of a conventional form.

[0061] 图18为以往的封装结构示意图。 [0061] FIG. 18 is a schematic view of a conventional package structure.

[0062] 图19为18的俯视图。 [0062] FIG. 19 is a top view of FIG 18.

[0063] 图20为采用本发明引线框的封装结构示意图。 [0063] FIG. 20 is a schematic view of the package of the present invention employs a lead frame.

[0064] 图21为20的俯视图。 [0064] FIG. 21 is a top view of FIG. 20.

[0065] 图中附图标记: [0065] FIG numerals:

[0066] 基岛1、引脚2、无填料的塑封料3、第一金属层4、第二金属层5、金属基板6、光刻胶膜7和8、半蚀刻区域9、光刻胶膜10和11。 [0066] The pad 1, pin 2, unfilled plastic material 3, a first metal layer 4, a second metal layer 5, a metal substrate 6, a photoresist film 7 and 8, half-etched region 9, the photoresist 10 and 11 films.

(五)具体实施方式 (E) Detailed Description

[0067] 本发明无基岛多圈脚基岛引线框生产方法如下: [0067] The present invention is no island-yl multiturn foot base island leadframe production methods are as follows:

[0068] 步骤一、取金属基板 [0068] Step a, taking the metal substrate

[0069] 参见图1,取一片厚度合适的金属基板6。 [0069] Referring to Figure 1, take a suitable thickness of the metal substrate 6. 金属基板6的材质可以依据芯片的功能与特性进行变换,例如:铜、铝、铁、铜合金或镍铁合金等。 The material of the metal substrate 6 may be transformed based on the function and characteristics of the chip, for example: copper, aluminum, iron, copper alloy or nickel-iron alloy.

[0070] 步骤二、贴膜作业 [0070] Step two, Foil job

[0071] 参见图2,利用贴膜设备在金属基板的正面及背面分别贴上可进行曝光显影的光刻胶膜7和8,以保护后续的蚀刻工艺作业。 [0071] Referring to Figure 2, the device using the film were adhered to the front and back surfaces of the metal substrate may be carried out exposing and developing the photoresist film 7 and 8, in order to protect the subsequent etching process the job.

[0072] 步骤三、金属基板正面去除部分光刻胶膜 [0,072] Step three, the front portion of the metal substrate the photoresist film is removed

[0073] 参见图3,利用曝光显影设备将步骤二完成贴膜作业的金属基板正面进行曝光显影去除部分光刻胶膜,以露出金属基板上后续需要进行半蚀刻的区域。 [0073] Referring to Figure 3, a developing device using the step of exposing the metal to complete the two operations the front substrate film exposed portions of the photoresist film is developed is removed to expose the need for subsequent half-etched area on the metal substrate.

[0074] 步骤四、金属基板正面半蚀刻 [0074] Step four, the front half-etching the metal substrate

[0075] 参见图4,对步骤三中金属基板正面去除部分光刻胶膜的区域进行半蚀刻,在金属基板正面形成凹陷的半蚀刻区域9,同时相对形成基岛1和引脚2的背面,其用意主要是避免在后续作业中出现溢胶。 [0075] Referring to FIG. 4, three in the front area of ​​the step portion of the metal substrate to remove the photoresist film half-etching, half etching a recess 9 is formed in the region of the metal front substrate, while the opposite back surface of the island 1 and pin 2 are formed , the intention is mainly to avoid excess glue in subsequent operations.

[0076] 步骤五、金属基板正背面揭膜作业 [0076] Step 5 is the back of the metal substrate removing film job

[0077] 参见图5,将金属基板正面余下的光刻胶膜和背面的光刻胶膜揭除。 [0077] Referring to Figure 5, the remaining photoresist film metal front substrate and the back surface of the photoresist film removability.

[0078] 步骤六、金属基板正面半蚀刻区域填涂无填料的软性填缝剂 [0078] Step six, front half-etched region of the metallic substrate Tiantu caulk unfilled flexible

[0079] 参见图6,在步骤四金属基板正面形成凹陷的半蚀刻区域9,填涂上无填料的软性填缝剂,并同时进行烘烤,促使无填料的软性填缝剂固化成无填料的塑封料3。 [0079] Referring to FIG 6, a semi-recessed regions etched on the front step of the metal substrate 9 four, simultaneously baked on the flexible caulk Tiantu no filler, and, to promote an unfilled flexible caulk to cure 3 unfilled molding compound.

[0080] 步骤七、金属基板正背面贴膜作业 [0080] Step 7 is the back of the metal foil substrate job

[0081] 参见图7,利用贴膜设备在已完成填涂无填料的软性填缝剂作业的金属基板的正面及背面分别贴上可进行曝光显影的光刻胶膜10和11,以保护后续的镀金属层工艺作业。 [0081] Referring to Figure 7, the front and back of the substrate using the metal film in the device has completed the job Tiantu unfilled flexible caulk are affixed exposing and developing the photoresist film can be 10 and 11, to protect the subsequent layer metallization process job.

[0082] 步骤八、去除部分光刻胶膜 [0082] Step VIII, the photoresist film removing part

[0083] 参见图8,在金属基板的正面及背面去除部分光刻胶膜,用意是露出基岛和引脚的背面以及正面。 [0083] Referring to FIG 8, portions of the photoresist film is removed in the front and back surfaces of the metal substrate, exposing the back side is intended and base island and a front pin.

[0084] 步骤九、镀金属层[0085] 参见图9,在步骤八露出的基岛和引脚的背面镀上第二金属层5,在基岛和引脚的正面镀上第一金属层4,以利后续焊线时金属线与芯片区和打线内脚区之间能更加紧密、牢固的接合,同时增加在包封工艺中促使有填料的塑封料间的结合度。 [0084] Step 9, metallization layer [0085] Referring to Figure 9, the back and base pins of the island is exposed in step eight plating the second metal layer 5, a first metal layer coated on the front substrate and the island pins 4, in order to facilitate subsequent wire bonding between the metal wires when the chip region and the inner wire can be more closely foot region, firm engagement, while increasing the degree of binding between the cause of the filler material in the plastic encapsulation process. 而金属层的成分会因不同的芯片材质可以是采用金镍金、金镍铜镍金、镍钯金、金镍钯金、镍金、银或锡等。 The composition of the metal layer due to different chip materials may be employed gold nickel-gold, nickel-copper-nickel-gold gold, nickel, palladium, gold, nickel-palladium, nickel, gold, silver, tin, or the like.

[0086] 步骤十、去除金属基板背面部分光刻胶膜 [0086] Step 10, the back surface portion of the metal substrate removing the photoresist film

[0087] 参见图10,去除金属基板背面部分光刻胶膜,以露出金属基板背面引脚外围的区域、引脚与基岛之间的区域以及引脚与引脚之间的区域, [0087] Referring to Figure 10, portions of the photoresist film is removed the metal back substrate to expose a peripheral region of the metal substrate backside pins, and the region between the pins and the pin between the pin and the base island,

[0088] 步骤十一、金属基板背面半蚀刻 [0088] Step 11, the back half-etching the metal substrate

[0089] 参见图11,在金属基板的背面对不被光刻胶膜覆盖的区域即步骤四余下部分的金属蚀刻出所述的基岛和引脚的正面,同时将引脚正面尽可能的延伸到基岛旁边,且使所述基岛和引脚背面尺寸小于基岛和引脚正面尺寸,形成上大下小的基岛和引脚结构。 [0089] Referring to Figure 11, the back surface of the metal substrate regions not covered by the remaining photoresist film i.e., four steps of etching the metal portion of the front side of the island and the pin base, while the front pins as extend next to the base island, and the island-yl group, and smaller in size than the back of the pin and pin front island size, formed on a large group of small islands and lead structure.

[0090] 步骤十二、金属基板正背面揭膜作业 [0090] Step 12, the metal substrate is the back of the job Jiemo

[0091] 参见图12,将金属基板正面和背面余下的光刻胶膜揭除。 [0091] Referring to Figure 12, the front and rear surfaces of the metal substrate remaining photoresist film removability.

[0092] 最后成品参见图13 :图13中,基岛1、引脚2、无填料的塑封料3、第一金属层4和第二金属层5,由图13可以看出,本发明有基岛引线框结构,包括基岛1和引脚2,所述引脚2正面尽可能的延伸到基岛1旁边,在所述基岛1和引脚2的正面设置有第一金属层4,在所述基岛1和引脚2的背面设置有第二金属层5,在所述引脚2外围的区域、引脚2与基岛1 之间的区域以及引脚2与引脚2之间的区域嵌置有无填料的塑封料3,所述无填料的塑封料3将引脚下部外围、引脚2下部与基岛1下部以及引脚2下部与引脚2下部连接成一体,且使所述基岛和引脚背面尺寸小于基岛和引脚正面尺寸,形成上大下小的基岛和引脚结构。 [0092] Referring to FIG final product 13: 13, the pad 1, pin 2, unfilled plastic material 3, a first metal layer 4 and the second metal layer 5, can be seen in FIG. 13, the present invention has yl leadframe island structure, the island 1 comprises a base 2 and a pin, the pin 2 to the front side of the base extending as an island, a first metal layer 4 is provided on the front surface of the pad 1 and pin 2 , the back surface of the base island 1 and pin 2 is provided with a second metal layer 5, the region of the periphery of the pin 2, pin 2 and the base island region between the pin 2 and the pin 2 region between the presence or absence of a filler embedded molding compound 3, the filler-free molding compound 3 of the lower periphery of the pin, the pin 2 integral with the lower connection pad 1 and the lower portion of the pin 2 and the lower portion of the lower portion of the pin 2 and the back surface of the pin base island and island-yl and smaller in size than the front pin size, formed on a large group of small islands and lead structure.

[0093] 本发明可因芯片功能的需要在上述引脚2的正面进行全部区域电镀第一金属层4或是局部区域电镀第一金属层4的制作。 [0093] The present invention may be produced entire area of ​​the first plated metal layer 4 or a partial region of the first metal layer 4 is plated in the front surface of the pin 2 by the need to function chip.

Claims (2)

  1. 一种有基岛引线框结构,包括基岛(1)和引脚(2),在所述基岛(1)和引脚(2)的正面设置有第一金属层(4),在所述基岛(1)和引脚(2)的背面设置有第二金属层(5),其特征在于:所述引脚(2)正面延伸到基岛(1)旁边,在所述引脚(2)外围的区域、引脚(2)与基岛(1)之间的区域以及引脚(2)与引脚(2)之间的区域嵌置有无填料的塑封料(3),所述无填料的塑封料(3)将引脚下部外围、引脚(2)下部与基岛(1)下部以及引脚(2)下部与引脚(2)下部连接成一体,且使所述基岛(1)和引脚(2)背面尺寸小于基岛(1)和引脚(1)正面尺寸,形成上大下小的基岛和引脚结构。 A kind of island-based leadframe structure, comprising a base island (one) and the pin (2), front (1) and the pins (. 2) provided on the substrate a first metal layer island (4), in the the back (1) and pin (2) is provided with a base island of said second metal layer (5), characterized in that: said pin (2) extends to the front side base island (1), the pin region (2) periphery, and the region between the pin (2) and the pin (2) between the pin (2) and the base island (1) embedded in the molding compound or absence of a filler (3), the filler-free plastic material (3) of the lower periphery of the pin, the pin (2) and a lower base island (1) and a lower pin (2) and a lower pin (2) is integrally connected to a lower portion, and so the said base island (1) and pin (2) is smaller than the size of the back base island (1) and pin (1) the size of the front side, is formed on a large group of small islands and lead structure.
  2. 2. 一种如权利要求1所述的无基岛多圈脚基岛引线框的生产方法,其特征在于所述方法包括以下工艺步骤:步骤一、取金属基板步骤二、贴膜作业利用贴膜设备在金属基板的正面及背面分别贴上可进行曝光显影的光刻胶膜, 步骤三、金属基板正面去除部分光刻胶膜利用曝光显影设备将步骤二完成贴膜作业的金属基板正面进行曝光显影去除部分光刻胶膜,以露出金属基板上后续需要进行半蚀刻的区域, 步骤四、金属基板正面半蚀刻对步骤三中金属基板正面去除部分光刻胶膜的区域进行半蚀刻,在金属基板正面形成凹陷的半蚀刻区域,同时相对形成基岛和引脚的背面, 步骤五、金属基板正背面揭膜作业将金属基板正面余下的光刻胶膜和背面的光刻胶膜揭除。 A free base island as claimed in claim 1 Multiturn producing foot-yl island leadframe, characterized in that said method comprises the following process steps: step one, step two to take the metal substrate, Foil Foil job using device the front and back resist films were adhered to the metal substrate can be exposed and developed, the three steps, the metal substrate front portions of the photoresist film removing apparatus using the exposure and development step to complete the two front substrate metal film is exposed and developed job removed portions of the photoresist film to expose the need for subsequent half-etched area on the metal substrate in step four, the front half-etched region of the metallic substrate portion of the photoresist film on the metal substrate in three half-etching step of removing the front, front metal substrate forming a semi-recessed regions etched, while the back group relative island and the pins are formed, step 5 is the back of the metal substrate removing film job resist film remaining metal front substrate and the back of the resist film removability. 步骤六、金属基板正面半蚀刻区域填涂无填料的软性填缝剂在步骤四金属基板正面形成凹陷的半蚀刻区域,填涂上无填料的软性填缝剂,并同时进行烘烤,促使无填料的软性填缝剂固化成无填料的塑封料。 Step six, half-etched regions of the metal substrate front Tiantu unfilled flexible caulking recesses formed in the region half-etched metal substrate front four steps while baking Tiantu on unfilled flexible caulks, and, causes no filler into a soft curable sealant filler-free plastic materials. 步骤七、金属基板正背面贴膜作业利用贴膜设备在已完成填涂无填料的软性填缝剂作业的金属基板的正面及背面分别贴上可进行曝光显影的光刻胶膜, 步骤八、去除部分光刻胶膜在金属基板的正面及背面去除部分光刻胶膜,用意是露出基岛和引脚的背面以及正面,步骤九、镀金属层在步骤八露出的基岛和引脚的背面镀上第二金属层,在基岛和引脚的正面镀上第一金属层,步骤十、去除金属基板背面部分光刻胶膜去除金属基板背面部分光刻胶膜,以露出金属基板背面引脚外围的区域、引脚与基岛之间的区域以及引脚与引脚之间的区域, 步骤十一、金属基板背面半蚀刻在金属基板的背面对不被光刻胶膜覆盖的区域即步骤四余下部分的金属蚀刻出所述的基岛和引脚的正面,同时将引脚正面尽可能的延伸到基岛旁边,且使所述基岛和引脚背面尺寸小于基 Step 7 is the back of the metal substrate using a film foil working apparatus can be respectively affixed exposing and developing the photoresist film in the front and rear sides Tiantu completed without filling soft metal substrate caulk job, step eight, removed portions of the photoresist film removing portions of the photoresist film on the front and back surfaces of the metal substrate, exposing the back side is intended and base island and a front pin, step 9, the step of gold plating layer on the back surface of the exposed base island and eight pins genus plating the second metal layer, plating the front pins on base island and a first metal layer, step 10, the photoresist film removing a portion of the metal back substrate removing portions of the photoresist film metallic substrate back surface, the back surface to expose the metal substrate primer a peripheral region of the foot, between the region and the region between the pins and the pins and the pin base island, step 11, the back surface of the metal substrate that is half-etched areas are not covered by the photoresist film on the back surface of the metal substrate We Step four metal etching the remainder of the front side of the island, and a base pin, while the front pins extending as far as possible next to the base island, and the island-yl group, and smaller in size than the back pin 和引脚正面尺寸,形成上大下小的基岛和引脚结构,步骤十二、金属基板正背面揭膜作业将金属基板正面和背面余下的光刻胶膜揭除。 And a front pin sizes, large and small pins island structure base, Step 12 is formed, the metal substrate is the back of the metallic substrate Jiemo job front and rear surfaces of the remaining photoresist film removability.
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CN101969032A (en) * 2010-09-04 2011-02-09 江苏长电科技股份有限公司 Double-sided graphic chip right-handed electroplating-etching module packaging method
CN102117752A (en) * 2010-10-15 2011-07-06 日月光半导体制造股份有限公司 Lead frame package structure and manufacturing method thereof
CN102324414A (en) * 2011-09-13 2012-01-18 江苏长电科技股份有限公司 Sequentially etched and plated lead frame structure with island prepacked plastic sealed material and producing method thereof
CN102324413A (en) * 2011-09-13 2012-01-18 江苏长电科技股份有限公司 Sequentially etched and plated lead frame structure with island prepacked plastic sealed material and producing method thereof
CN102403282A (en) * 2011-11-22 2012-04-04 江苏长电科技股份有限公司 Packaging structure with basic islands and without pins at four sides and manufacturing method thereof
CN102403283A (en) * 2011-11-25 2012-04-04 江苏长电科技股份有限公司 Ball grid array packaging structure with basic islands and manufacturing method thereof
CN102522394A (en) * 2011-12-30 2012-06-27 北京工业大学 On-chip chip package and production method thereof
CN102683315A (en) * 2011-11-30 2012-09-19 江苏长电科技股份有限公司 Barrel-plating four-side pinless packaging structure and manufacturing method thereof
CN103646937A (en) * 2013-12-05 2014-03-19 江苏长电科技股份有限公司 Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip bump structure and process method
CN103646938A (en) * 2013-12-05 2014-03-19 江苏长电科技股份有限公司 Primary plating-prior-to-etching metal frame subtraction imbedded chip flip bump structure and process method
CN103646930A (en) * 2013-12-05 2014-03-19 江苏长电科技股份有限公司 Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip flat pin structure and process method
CN103681580A (en) * 2013-12-05 2014-03-26 江苏长电科技股份有限公司 One-time eroding-before-plating metal frame subtraction embedded chip inversely-arranged salient point structure and technological method
CN103681581A (en) * 2013-12-05 2014-03-26 江苏长电科技股份有限公司 One-time etched-before-plated metal frame subtraction embedded chip inverted flat pin structure and technological method thereof
CN103681583A (en) * 2013-12-05 2014-03-26 江苏长电科技股份有限公司 One-time eroding-before-plating metal frame subtraction embedded chip normally-arranged flat foot structure and technological method
US8735224B2 (en) 2011-02-14 2014-05-27 Stats Chippac Ltd. Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof
US9275877B2 (en) 2011-09-20 2016-03-01 Stats Chippac, Ltd. Semiconductor device and method of forming semiconductor package using panel form carrier
CN107492536A (en) * 2017-08-09 2017-12-19 林英洪 Lead frame and its manufacture craft

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US20060071307A1 (en) * 2004-10-04 2006-04-06 Yamaha Corporation Lead frame and semiconductor package therefor
CN201038153Y (en) * 2007-04-29 2008-03-19 江苏长电科技股份有限公司 Package method for preventing element lamination in semiconductor plastic package
CN201048130Y (en) * 2007-04-29 2008-04-16 江苏长电科技股份有限公司 Packing method capable of preventing component delamination in semiconductor plastic package
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Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101969032A (en) * 2010-09-04 2011-02-09 江苏长电科技股份有限公司 Double-sided graphic chip right-handed electroplating-etching module packaging method
CN102117752A (en) * 2010-10-15 2011-07-06 日月光半导体制造股份有限公司 Lead frame package structure and manufacturing method thereof
CN102117752B (en) 2010-10-15 2013-10-02 日月光半导体制造股份有限公司 Lead frame package structure and manufacturing method thereof
US9299644B1 (en) 2011-02-14 2016-03-29 Stats Chippac Ltd. Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof
US8735224B2 (en) 2011-02-14 2014-05-27 Stats Chippac Ltd. Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof
CN102324414A (en) * 2011-09-13 2012-01-18 江苏长电科技股份有限公司 Sequentially etched and plated lead frame structure with island prepacked plastic sealed material and producing method thereof
CN102324413A (en) * 2011-09-13 2012-01-18 江苏长电科技股份有限公司 Sequentially etched and plated lead frame structure with island prepacked plastic sealed material and producing method thereof
US9275877B2 (en) 2011-09-20 2016-03-01 Stats Chippac, Ltd. Semiconductor device and method of forming semiconductor package using panel form carrier
CN102403282A (en) * 2011-11-22 2012-04-04 江苏长电科技股份有限公司 Packaging structure with basic islands and without pins at four sides and manufacturing method thereof
CN102403282B (en) 2011-11-22 2013-08-28 江苏长电科技股份有限公司 Packaging structure with basic islands and without pins at four sides and manufacturing method thereof
CN102403283A (en) * 2011-11-25 2012-04-04 江苏长电科技股份有限公司 Ball grid array packaging structure with basic islands and manufacturing method thereof
CN102683315A (en) * 2011-11-30 2012-09-19 江苏长电科技股份有限公司 Barrel-plating four-side pinless packaging structure and manufacturing method thereof
CN102683315B (en) * 2011-11-30 2015-04-29 江苏长电科技股份有限公司 Barrel-plating four-side pinless packaging structure and manufacturing method thereof
CN102522394A (en) * 2011-12-30 2012-06-27 北京工业大学 On-chip chip package and production method thereof
WO2013097580A1 (en) * 2011-12-30 2013-07-04 北京工业大学 Chip on chip package and manufacturing method
CN103681580A (en) * 2013-12-05 2014-03-26 江苏长电科技股份有限公司 One-time eroding-before-plating metal frame subtraction embedded chip inversely-arranged salient point structure and technological method
CN103681583A (en) * 2013-12-05 2014-03-26 江苏长电科技股份有限公司 One-time eroding-before-plating metal frame subtraction embedded chip normally-arranged flat foot structure and technological method
CN103681581A (en) * 2013-12-05 2014-03-26 江苏长电科技股份有限公司 One-time etched-before-plated metal frame subtraction embedded chip inverted flat pin structure and technological method thereof
CN103646930A (en) * 2013-12-05 2014-03-19 江苏长电科技股份有限公司 Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip flat pin structure and process method
CN103646937B (en) * 2013-12-05 2016-02-24 江苏长电科技股份有限公司 Secondary etching-prior-to-plametal metal frame subtraction buries flip-chip bump structure and process
CN103646930B (en) * 2013-12-05 2016-02-24 江苏长电科技股份有限公司 Secondary etching-prior-to-plametal metal frame subtraction buries the flat leg structure of flip-chip and process
CN103646938B (en) * 2013-12-05 2016-02-24 江苏长电科技股份有限公司 Once first plate and lose metal frame subtraction afterwards and bury flip-chip bump structure and process
CN103646938A (en) * 2013-12-05 2014-03-19 江苏长电科技股份有限公司 Primary plating-prior-to-etching metal frame subtraction imbedded chip flip bump structure and process method
CN103646937A (en) * 2013-12-05 2014-03-19 江苏长电科技股份有限公司 Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip bump structure and process method
CN103681581B (en) * 2013-12-05 2016-04-27 江苏长电科技股份有限公司 Once after first erosion, plating frame subtraction buries the flat leg structure of flip-chip and process
CN103681583B (en) * 2013-12-05 2016-04-27 江苏长电科技股份有限公司 Once after first erosion, plating frame subtraction buries the flat leg structure of chip formal dress and process
CN103681580B (en) * 2013-12-05 2016-07-06 江苏长电科技股份有限公司 Etching-prior-to-plametal metal frame subtraction imbedded chip flipchip bump structure and process
CN107492536A (en) * 2017-08-09 2017-12-19 林英洪 Lead frame and its manufacture craft

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