Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
It should be noted that, in accompanying drawing or instructions description, similar or identical part is all used identical figure number.The implementation that does not illustrate in accompanying drawing or describe is form known to a person of ordinary skill in the art in affiliated technical field.In addition, although the demonstration of the parameter that comprises particular value can be provided herein, should be appreciated that, parameter is without definitely equaling corresponding value, but can in acceptable error margin or design constraint, be similar to corresponding value.
The invention provides a kind of BMCIRS system and control method thereof.This system and method utilizes the programming Control to system hardware module device, realizes communication between each equipment and synchronous, and the generation of control signal, transmitting, reception, sampling and storage, to realize the new theory of microwave imaging and the verification experimental verification of new technology.
Fig. 1 is the principle schematic of embodiment of the present invention BMCIRS system.Please refer to Fig. 1, it is mounting platform that this BMCIRS system be take ground traffic tools etc., and the motion by platform realizes the synthetic and orientation of antenna aperture to resolution, by use array antenna realize array to real aperture differentiate.
Fig. 2 is the structural representation of embodiment of the present invention BMCIRS system.Please refer to Fig. 2, embodiment of the present invention BMCIRS system comprises following hardware module:
1, baseband signal generation module, comprises at least one AWG (Arbitrary Waveform Generator), and every AWG (Arbitrary Waveform Generator) takies a transmission channel, and a vector microwave signal source that forms orthogonal modulation up-converter module with this passage place supports the use.The digital waveform sequence of this AWG (Arbitrary Waveform Generator) for inputting according to user, externally under the triggering of timer, the outer sampled clock signal of the frequency source module of usining output is as sampling clock, by DA, synthesize and convert Analog Baseband transmit waveform and corresponding pulse envelope signal to, as vector microwave signal source input matching used with it, that form orthogonal modulation up-converter module;
2, orthogonal modulation up-converter module, comprises at least one vector microwave signal source, and every vector microwave signal source takies a transmission channel, and an AWG (Arbitrary Waveform Generator) that forms baseband signal generation module with this passage place supports the use.This vector microwave signal source is done orthogonal modulation and pulsed modulation for the Analog Baseband of the AWG (Arbitrary Waveform Generator) supporting with it output is transmitted waveform and corresponding pulse envelope signal, produce modulated RF pulse signal and pulse envelope thereof, as the input signal of transmitting terminal channel switching module;
3, transmitting terminal channel switching module, comprises a Multi-channel microwave switchgear.The input common port of this Multi-channel microwave switchgear connects the modulated RF pulse signal of orthogonal modulation up-converter module output, and a plurality of output terminals connect respectively and export radiofrequency signal to different transmitter power amplifier module.During work, the steering order sending according to receiving control apparatus, the switching gate signal of the timer module of usining output is as trigger pip, carry out the switching of radiofrequency signal different paths in microwave switch equipment, radiofrequency signal is switched on to different transmitter power amplifiers carries out power amplification, and radiate by emitting antenna, thereby realize the expansion in time of BMCIRS system transmission channel.
4, receiving end channel switching module, comprises a Multi-channel microwave switchgear.A plurality of input terminals of this Multi-channel microwave switchgear connect different receiving antennas, and output common port connects receiver down conversion module.During work, the steering order sending according to the opertaing device receiving, the switching gate signal of the timer module of usining output is as trigger pip, carry out different antennae place and receive the path switching of signal in microwave switch equipment, radiofrequency signal by timesharing conducting to receiver down conversion module, thereby realize the expansion in time of BMCIRS system receiving cable.
5, receiver down conversion module, comprise at least one hyperchannel low-converter, this hyperchannel low-converter is usingd frequency source module output local oscillation signal as mixed frequency signal, receiving end channel switching module radiofrequency signal output, that receiving antenna receives is carried out to RF preselection, low noise amplification, down coversion mixing and intermediate frequency filtering, amplification, be output as intermediate-freuqncy signal, the input as AD sampling with storage hardware module;
6, AD sampling and memory module, be used for according to the parameter setting of opertaing device, externally under the triggering of timer, the outer sampled clock signal of the frequency source module of usining output is as sampling clock, intermediate-freuqncy signal to the output of receiver down conversion module is carried out high-speed data acquisition and record, finally forms required original echo data;
7, frequency source module, comprises at least two analog signal generators.According to the parameter setting of opertaing device, analog signal generator provides local oscillation signal input for receiver down conversion module, and another analog signal generator provides outer sampled clock signal with memory module for baseband signal generation module and AD sampling;
8, timer module, be used for according to the parameter setting of opertaing device, on the one hand for baseband signal generation module and AD sampling provide triggering input pulse with memory module, on the other hand for transmitting terminal channel switching module and receiving end channel switching module provide switching gate signal;
9, opertaing device, be connected with storage hardware module, frequency source module, timer module with above-mentioned baseband signal generation module, orthogonal modulation up-converter module, transmitting terminal channel switching module, receiving end channel switching module, receiver down coversion hardware module, AD sampling, for after above-mentioned hardware device is configured, by coordinated operation, carry out wideband hyperchannel coherent radar imaging simulation.
This opertaing device carries out IO communication connection by interface bus LXI (LAN) with above-mentioned other hardware modules, the baseband signal generation module in above-mentioned hardware module wherein, orthogonal modulation up-converter module, transmitting terminal channel switching module, receiving end channel switching module, frequency source module, timer module all adopts all purpose instrument equipment to form, virtual instrument software framework VISA (the Virtual Instrument Software Architecture) standard agreement that meets American National instrument NI (National Instrument) company, opertaing device is controlled it by VISA application programming interfaces, receiver down coversion hardware module in hardware module, AD sampling adopt equipment for customizing to form with storage hardware module, and its application programming interfaces are also controlled with controlled device according to the customization of VISA standard agreement.Therefore, opertaing device all carries out equipment control with VISA standard agreement.
On the basis of above-described embodiment BMCIRS system, the present invention also provides a kind of control method of above-mentioned BMCIRS system.Please refer to Fig. 3, this control method is carried out by above-mentioned opertaing device, comprising:
Steps A: the system works pattern information that receives user's input, be system works transmission channel number N and receiving cable number M, wherein, this system works pattern information at least comprises a kind of in following scheme: single-shot list is received, N=1, M=1 mode of operation, single-shot are received more, N=1, M >=2 mode of operation, multiple illuminators and single receiver, N >=2, M=1 mode of operation, MIMO (Multiple-Input Multiple-Out-put), N >=2, M >=2 mode of operation;
Step B: according to this system works pattern information, corresponding hardware device is configured and initialization setting, the operation mode if selection single-shot list is knocked off, performs step B1; The operation mode if selection single-shot is knocked off more, execution step B2; If select multiple illuminators and single receiver mode of operation, execution step B3; If select MIMO (Multiple-Input Multiple-Out-put) mode of operation, execution step B4;
Sub-step B1, according to the single-shot list operation mode configuration device of knocking off, this sub-step comprises again:
B1a, configures a waveform generator and forms baseband signal generation module, and send instruction to it step by step, makes its initialization;
B1b, configures a vector microwave signal source supporting with above-mentioned waveform generator and forms orthogonal modulation up-converter module, and send instruction to it step by step, makes its initialization;
B1c, configures the hyperchannel low-converter that a passage number is K and forms receiver down conversion module, and send instruction to it step by step, makes any one in its K bar passage to be activated as receiving path;
B1d, configures multi-channel high-speed data collection and the register that a passage number is L and forms AD sampling and memory module, and send instruction to it step by step, makes any one in its L bar passage to be activated as sampling channel;
B1e, configures two analog signal generators and as outer sampling clock frequency source and down coversion local frequency source, forms frequency source module respectively, and send instruction to it step by step, makes its initialization;
B1f, configures a pulse signal generator and forms timer module, and send instruction to it step by step, makes its initialization; Execution step C;
After executing above-mentioned B1a to B1f, BMCIRS system hardware structure is as shown in Fig. 4-1.
Sub-step B2, according to the single-shot operation mode configuration device of knocking off, this sub-step comprises again more:
B2a, configures an AWG (Arbitrary Waveform Generator) and forms baseband signal generation module, and send instruction to it step by step, makes its initialization;
B2b, configures a vector microwave signal source and forms orthogonal modulation up-converter module, and send instruction to it step by step, makes its initialization;
B2c step by step, configure the hyperchannel low-converter that a passage number is K and form receiver down conversion module, and send instruction to it, in M≤K situation, make its M bar passage be activated as receiving path, in M > K situation, make its whole K bar passages be activated as receiving path;
B2d step by step, configure multi-channel high-speed data collection and the register that a passage number is L and form AD sampling and memory module, and send instruction to it, in M≤L situation, make its M bar passage be activated as sampling channel, in M > L situation, make its whole L bar passages be activated as sampling channel;
B2e, configures a microwave switch network equipment and forms receiving end channel switching module, and send instruction to it step by step, makes its initialization;
B2f, configures two analog signal generators and as outer sampling clock frequency source and down coversion local frequency source, forms frequency source module respectively, and send instruction to it step by step, makes its initialization;
B2g, configures a pulse signal generator and forms timer module, and send instruction to it step by step, makes its initialization; Execution step C;
After executing above-mentioned B2a to B2g,, BMCIRS system hardware structure is as shown in Fig. 4-2.
Sub-step B3, according to multiple illuminators and single receiver mode of operation configuration device, this sub-step comprises again:
B3a, configures two passages that two AWG (Arbitrary Waveform Generator) form baseband signal generation module step by step, and sends instruction to it, makes its initialization;
B3b, configures two passages that two vector microwave signal sources form orthogonal modulation up-converter module step by step, and sends instruction to it, makes its initialization; When the system works pattern information N=2 of user input, execution step B3d;
B3c, configures a microwave switch network equipment and forms transmitting terminal channel switching module, and send instruction to it step by step, makes its initialization;
B3d, configures the hyperchannel low-converter that a passage number is K and forms receiver down conversion module, and send instruction to it step by step, makes any one in its K bar passage to be activated as receiving path;
B3e, configures multi-channel high-speed data collection and the register that a passage number is L and forms AD sampling and memory module, and send instruction to it step by step, makes any one in its L bar passage to be activated as sampling channel;
B3f, configures two analog signal generators and as outer sampling clock frequency source and down coversion local frequency source, forms frequency source module respectively, and send instruction to it step by step, makes its initialization;
B3g, configures a pulse signal generator and forms timer module, and send instruction to it step by step, makes its initialization; Execution step C;
After executing above-mentioned B3a to B3g,, BMCIRS system hardware structure is as shown in Fig. 4-3.
Sub-step B4, according to MIMO (Multiple-Input Multiple-Out-put) mode of operation configuration device, this sub-step comprises again:
B4a, configures two passages that two AWG (Arbitrary Waveform Generator) form baseband signal generation module step by step, and sends instruction to it, makes its initialization;
B4b, configures two passages that two vector microwave signal sources form orthogonal modulation up-converter module step by step, and sends instruction to it, makes its initialization; When the system works pattern information N=2 of user input, execution step B4d;
B4c, configures a microwave switch network equipment and forms transmitting terminal channel switching module, and send instruction to it step by step, makes its initialization;
B4d step by step, configure the hyperchannel low-converter that a passage number is K and form receiver down conversion module, and send instruction to it, in M≤K situation, make its M bar passage be activated as receiving path, in M > K situation, make its whole K bar passages be activated as receiving path;
B4e step by step, configure multi-channel high-speed data collection and the register that a passage number is L and form AD sampling and memory module, and send instruction to it, in M≤L situation, make its M bar passage be activated as sampling channel, in M > L situation, make its whole L bar passages be activated as sampling channel;
B4f, configures a microwave switch network equipment and forms receiving end channel switching module, and send instruction to it step by step, makes its initialization;
B4g, configures two analog signal generators and as outer sampling clock frequency source and down coversion local frequency source, forms frequency source module respectively, and send instruction to it step by step, makes its initialization;
B4h, configures a pulse signal generator and forms timer module, and send instruction to it step by step, makes its initialization; Execution step C;
After executing above-mentioned B4a to B4g,, BMCIRS system hardware structure is as shown in Fig. 4-4.
Step C: receive the system operational parameters collection of user's input, by equation of constraint group, the concentrated parameter of system operational parameters is carried out to parameter feasibility analysis, feed back to user and modify, until system operational parameters collection meets the requirements;
The concentrated parameter of system operational parameters is used for generating the input control parameter of each hardware module equipment, comprises system works frequency f
c, bandwidth B, pulse width τ, sample frequency f
s, pulse repetition rate PRF, peak transmitted power P
t, antenna gain G, azimuth beamwidth θ
a, pitching beam angle θ
c, platform speed V, podium level H, ranges of incidence angles Ф ∈ [Ф
1, Ф
2], receiver noise factor F
n, system loss L
n, receiver down coversion local frequency f
0, intermediate frequency output frequency f
i, the parameter such as transmission channel number N and receiving cable number M; Equation of constraint group comprises:
Wherein, formula (1) is nyquist sampling equation of constraint;
Formula (2) is azimuth ambiguity equation of constraint, and D is that antenna bearingt is to size;
Formula (3) is range ambiguity equation of constraint, and C is the light velocity, W
swathfor mapping band distance width;
Formula (4) is signal noise ratio (snr) of image equation of constraint (radar equation), and K is Boltzmann constant, T
0for absolute temperature, D
r=C/2B is range resolution, λ=C/f
cfor radar operation wavelength, P
av=P
t* τ * PRF is average power, and NE σ 0 represents noise equivalent backscattering coefficient, and Thereshold represents the decision threshold of NE σ 0, and the typical value of Thereshold is-30dB.Conventionally, NE σ 0 can be used to weigh the SAR signal noise ratio (snr) of image of final acquisition, when NE σ 0 is less than decision threshold Thereshold, can think that final SAR signal noise ratio (snr) of image meets designing requirement; When NE σ 0 is greater than decision threshold Thereshold, think that target is submerged in noise in final SAR image, and None-identified.Therefore, when NE σ 0 surpasses in threshold value Thereshold situation in given ranges of incidence angles, judge and should not have feasibility by " system operational parameters " collection, feedback user is modified.
Formula (5) is mapping swath width equation, and wherein W1 designs lower limit for mapping swath width, and W2 designs the upper limit for mapping swath width.As mapping swath width W
swathin given ranges of incidence angles, do not meet user's restrictive condition W
1≤ W
swath≤ W
2in situation, judge and should not have feasibility by " system operational parameters " collection, feedback user is modified;
When in given ranges of incidence angles, NE σ 0 is no more than threshold value Thereshold, and mapping swath width W
swathmeet user's restrictive condition W
1≤ W
swath≤ W
2situation under, judge and should there is feasibility by " system operational parameters " collection.
Step D: " transmission signal parameters " collection that receives user's input, predistortion correction transmits, the derivation predistortion digital waveform file that transmits, and the predistortion digital waveform file that will transmit sends to baseband signal generation module as Parameter File;
" transmission signal parameters " collection is described the also waveform of unique definite base band transmit, comprises Signal coding mode, signal bandwidth B, signal pulsewidth τ, D/A sample frequency F
setc. parameter.Wherein, Signal coding mode comprises the modes such as QPSK, 2PSK, QAM, Chirp coding; When " transmission signal parameters " collection and system works frequency f
cafter determining, use baseband signal generation module, orthogonal modulation up-converter module and signal scope to carry out sub-step D1~D5, carry out base band transmit waveform predistortion correction, derive predistortion digital waveform file, and baseband signal generation module is carried out to parameter configuration;
This step D can comprise again:
Sub-step D1, according to " transmission signal parameters " concentrated signal bandwidth and D/A sample frequency parameter, is divided into a plurality of discrete frequency f by signal bandwidth
p=p Δ f, wherein p ∈ [1, P] represents p frequency; To certain discrete frequency f
p, generate the desirable continuous wave signal digital waveform of this frequency;
Sub-step D2, to the resulting corresponding frequency f of sub-step D1
pdesirable continuous wave signal digital waveform, baseband signal produces hardware module synthesize and is translated into simulating signal by DA, and as the orthogonal modulation input of orthogonal modulation up-conversion hardware module, exports modulated RF signals;
Sub-step D3, to the resulting modulated RF signals of sub-step D2, is used signal scope, and as oscillograph, frequency spectrograph are measured, its measured value is as the measured value γ (f of this discrete frequency
p);
Sub-step D4, travels through all frequencies of p ∈ [1, P] successively, carries out the process of D1~D3, is measured [γ (f
1) ..., γ (f
p) ... γ (f
p)], and by the amplitude-phase comparison with ideal waveform, calculate the amplitude predistortion corrected value [A (f of each frequency
1) ..., A (f
p) ... A (f
p)] and phase correcting value
Sub-step D5, usings the resulting result of sub-step D4 as corrected value, first according to " transmission signal parameters " collection, generates desirable base band transmit digital waveform, by Fourier, is converted and is obtained its frequency spectrum s (f
p), use corrected value to carry out predistortion amplitude and phase correction
finally again the frequency spectrum sequence after predistortion correction is carried out to contrary Fourier conversion, the predistortion digital waveform file that obtains transmitting, and derived, as the input parameter file of baseband signal generation module.
Step e: the parameter of respectively controlling of the system operational parameters collection that step C is obtained is sent in corresponding hardware module and goes; The predistortion digital waveform file that transmits that step D is obtained sends to baseband signal generation module;
This step comprises:
Sub-step E1, by frequency of operation parameter f
csend to orthogonal modulation up-converter module, as its input parameter;
Sub-step E2, sends to transmitting terminal channel switching module by transmission channel number Parameter N, as its input parameter;
Sub-step E3, just receiving cable number parameter M sends to receiving end channel switching module, as its input parameter;
Sub-step E4, by frequency of operation parameter f
c, receiver noise factor parameter F
nsend to receiver down conversion module, as its input parameter;
Sub-step E5, by pulse width parameter τ, sample frequency parameter f
s, pulse repetition rate parameter PRF sends to AD sampling and memory module, as its input parameter;
Sub-step E6, by receiver down coversion local frequency parameter f
0send to frequency source module, as its input parameter;
Sub-step E7, sends to timer module by pulse repetition rate parameter PRF, as its input parameter; And
Sub-step E8, the predistortion digital waveform file that transmits that step D is obtained, as Parameter File, sends to baseband signal generation module;
Step F, indicates each equipment to carry out parameter configuration according to input control parameter, and receives hardware device back-to-back running parameter, carries out " system check ", to eliminate the wrong and conflict of parameter in arranging;
This step comprises:
Sub-step F1, opertaing device reads the device parameter collection F (β of feedback from each hardware module
1..., β
q... β
q), wherein, β
qthe user-variable that represents q equipment feedback, q ∈ [1, Q], Q represents the maximum device number that opertaing device can be controlled;
Sub-step F2, to feedback device parameter set F (β
1..., β
q... β
q) with send to the control parameter set f (α of equipment
1..., α
q... α
q) compare α wherein
qrepresent that opertaing device sends to the control parameter of q equipment;
Sub-step F3, processes according to comparative result, comprising:
F3a, when equipment q is without feedback parameter, judges the unsuccessful communication of this equipment step by step, and feedback user connects;
F3b step by step, as the feedback parameter β of equipment q
qwith send to its control parameter alpha
qunequal, judge that this device parameter arranges mistake, feedback user is modified;
F3c step by step, when all devices all has feedback parameter, and feedback parameter with send to it to control parameter to equate, judge all devices communication success, parameter arranges correctly, performs step G;
Step G, opertaing device sends enabled instruction to each hardware device, starts wideband hyperchannel coherent radar imaging simulation.
This step G can comprise again:
Sub-step G1, sends enabled instruction to timer module, makes its output timing pip;
Sub-step G2, sends enabled instruction to frequency source module, makes its outer sampled clock signal of output and receiver down coversion local oscillation signal;
Sub-step G3, sends enabled instruction to baseband signal generation module, makes the outer sampled clock signal of its timing pip that receives timer module output and the output of frequency source module, output base band transmit and envelope signal;
Sub-step G4, sends enabled instruction to orthogonal modulation up-converter module, makes base band transmit and the envelope signal of its receiving baseband signal generation module output, and carries out orthogonal modulation, output modulated RF signals;
Sub-step G5, to transmitting terminal channel switching module, send enabled instruction, make it receive the switching gate pulse of timer module output, carry out passage switching, the transmitter power amplifier that modulated RF signals is switched to corresponding transmission channel gets on, and radiate by emitting antenna;
Sub-step G6, sends instruction to receiving end channel switching module, makes it receive the switching gate signal pulse of timer module output, and the radiofrequency signal that corresponding receiving cable receiving antenna is received is carried out passage switching;
Sub-step G7, to receiver down conversion module, send enabled instruction, make it receive from the radiofrequency signal of receiving end channel switching module output and the down coversion local oscillation signal of frequency source module output, to radiofrequency signal, it carries out RF preselection, low noise amplification, down coversion mixing and intermediate frequency filtering, amplification, is output as intermediate-freuqncy signal;
Sub-step G8, to AD sampling and memory module, send enabled instruction, make the outer sampled clock signal of its timing pip that receives timer module output and the output of frequency source module, the intermediate-freuqncy signal of receiver down conversion module output is sampled, and preserve into original echo sampled data.
So far, by reference to the accompanying drawings the control method of the present embodiment BMCIRS system be have been described in detail.According to above, describe, those skilled in the art should have clearly understanding to the control method of BMCIRS system of the present invention.
In addition, the interface of using in above-mentioned control method and standard are not limited in the various concrete forms of mentioning in embodiment, and those of ordinary skill in the art can know simply and replace it, for example:
(1) IO communication connection and the control of opertaing device to hardware module, except passing through LXI (LAN) interface bus, all right GPIB, VXI, PXI interface bus form, as long as hardware device has the bottom layer driving of the corresponding interface bus;
(2) the application programming interfaces agreement that custom hardware module comprises receiver down conversion module, AD sampling and memory module is except adopting the VISA standard agreement of all purpose instrument, can also replace by ICP/IP protocol, UART agreement, as long as provide the programming Control interface of controlling this equipment according to corresponding communication protocol standard for user.
In sum, the invention provides a kind of can be flexibly BMCIRS system control method that effectively control hardware module is carried out data acquisition.The method by distinctive parameter designing, setting and feedback check method realize the complexity under BMCIRS system various modes, successional microwave imaging experimental data gathers, the research of carrying out the relevant issues such as microwave imaging scattering mechanism, imaging system and signal processing for experiment and the mode of theoretical combination provides basic.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.