CN103607203B - ADC chip, digital scale and analog-digital conversion circuit based on Sigma-Delta - Google Patents
ADC chip, digital scale and analog-digital conversion circuit based on Sigma-Delta Download PDFInfo
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- CN103607203B CN103607203B CN201310602040.9A CN201310602040A CN103607203B CN 103607203 B CN103607203 B CN 103607203B CN 201310602040 A CN201310602040 A CN 201310602040A CN 103607203 B CN103607203 B CN 103607203B
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Abstract
The invention belongs to the field of integrated circuits, and provides an ADC chip, a digital scale and an analog-digital conversion circuit based on a Sigma-Delta structure. The analog-digital conversion circuit comprises a control logic unit, a reference voltage unit, a Sigma-ADC modulator and a filtering unit. The control logic unit is used for generating power source enable signals, analog-digital conversion enable signals and filtering control enable signals. The reference voltage unit is used for outputting a reference voltage when the power source enable signals are valid. The Sigma-ADC modulator is used for regarding the reference voltage as a working voltage and converting analog voltage signals into pulse density modulation codes when the analog-digital conversion enable signals are valid. The filtering unit is used for filtering the pulse density modulation codes when the filtering control enable signals are valid and outputting digital signals. According to the analog-digital conversion circuit, the control logic unit is used for controlling the reference voltage unit to stop outputting the reference voltage under the situation that the Sigma-ADC modulator does not work, and the power consumption of the analog-digital conversion circuit is effectively reduced.
Description
Technical field
The invention belongs to electronic applications, particularly relate to a kind of based on Sigma-Delta(sigma-delta) mould of structure
Number conversion circuit, ADC chip and digital calculation balance.
Background technology
In today that digital product is growing, analog-digital converter (Analog to Digital Converter, ADC)
Role more and more important, and Sigma-Delta(is also called sigma-delta) ADC of structure is with its high-resolution
The advantage of rate, high integration and low price is widely used in process control and DC measurement field, especially
Weigh the application in field.
At present, digital calculation balance uses sensor acquisition weight information, and by this information with the shape of analogue signal
Formula is converted into digital signal by Sigma-Delta ADC, in order to carry out further data process, and
Sigma-Delta ADC is largely affected by precision and the power consumption of digital calculation balance as core technology.
When measuring, due to reference voltage sensor to be simultaneously supplied to and ADC chip, therefore can cause several
The power consumption of mA to tens mA, the power consumption maximum especially produced with sensor, next to that the power consumption of ADC,
Therefore social development main flow and the market demand of energy-conserving and environment-protective are not met.
Summary of the invention
The purpose of the embodiment of the present invention is to provide a kind of analog to digital conversion circuit based on Sigma-Delta structure,
Aim to solve the problem that existing market is for the highest problem of the low-power consumption demand of ADC and digital calculation balance.
The embodiment of the present invention is achieved in that a kind of analog to digital conversion circuit based on Sigma-Delta structure,
Described circuit includes:
Control logical block, be used for generating power supply enable signal, analog digital conversion enable signal and filtering control and make
Can signal；
Reference voltage unit, for the output reference voltage when the power supply enable signal received is effective, described
The Enable Pin of reference voltage unit enables outfan with the power supply of described control logical block and is connected, described reference
The outfan of voltage cell is the voltage output end of described circuit；
Sigma-ADC manipulator, is used for described reference voltage as running voltage, and at the mould received
When number conversion enable signal is effective, analog voltage signal is converted into pulse density modulated code (PDM code),
The power end of described Sigma-ADC manipulator is connected with the outfan of described reference voltage unit, described
The Enable Pin of Sigma-ADC manipulator enables outfan with the analog digital conversion of described control logical block and is connected；
Filter unit, for when the filtering control enable signal received is effective, adjusting described impulse density
Code processed is filtered, output digit signals, the Enable Pin of described filter unit and described control logical block
Filtering controls to enable outfan and connects, the input of described filter unit and described Sigma-ADC manipulator
Outfan connects, and the outfan of described filter unit is the outfan of described circuit.
The another object of the embodiment of the present invention be to provide a kind of use above-mentioned based on Sigma-Delta structure
The ADC chip of analog to digital conversion circuit.
The another object of the embodiment of the present invention is to provide a kind of digital calculation balance using above-mentioned ADC chip.
The embodiment of the present invention controls reference voltage unit at Sigma-ADC manipulator by controlling logical block
In the case of idle, turn off the output of reference voltage, effectively reduce the power consumption of analog to digital conversion circuit, symbol
Close social development main flow and the market demand of energy-conserving and environment-protective.
Accompanying drawing explanation
The structure of the analog to digital conversion circuit based on Sigma-Delta structure that Fig. 1 provides for the embodiment of the present invention
Figure；
Preferably showing of the analog to digital conversion circuit based on Sigma-Delta structure that Fig. 2 provides for the embodiment of the present invention
Example circuit diagram；
During the work of the analog to digital conversion circuit based on Sigma-Delta structure that Fig. 3 provides for the embodiment of the present invention
Sequence schematic diagram.
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with accompanying drawing and reality
Execute example, the present invention is further elaborated.Only should be appreciated that specific embodiment described herein
Only in order to explain the present invention, it is not intended to limit the present invention.
The embodiment of the present invention controls reference voltage unit at Sigma-ADC manipulator by controlling logical block
In the case of idle, turn off the output of reference voltage, effectively reduce the power consumption of analog to digital conversion circuit, symbol
Close social development main flow and the market demand of energy-conserving and environment-protective.
Below in conjunction with specific embodiment, the realization of the present invention is described in detail:
Fig. 1 shows the knot of the analog to digital conversion circuit based on Sigma-Delta structure that the embodiment of the present invention provides
Structure, for convenience of description, illustrate only part related to the present invention.
As one embodiment of the invention, should can apply to by analog to digital conversion circuit based on Sigma-Delta structure
In various ADC chips and digital calculation balance, when this analog to digital conversion circuit 1 based on Sigma-Delta structure
When being applied in digital calculation balance, the reference voltage being somebody's turn to do analog to digital conversion circuit 1 based on Sigma-Delta structure is defeated
Go out end to be connected with sensor 2, including:
Control logical block 11, be used for generating power supply and enable signal, analog digital conversion enable signal and filtering control
Enable signal；
Reference voltage unit 12, for output reference voltage, ginseng when the power supply enable signal received is effective
The Enable Pin examining voltage cell 12 is connected with the power supply enable outfan controlling logical block 11, reference voltage
The outfan of unit 12 is the reference voltage output terminal of analog to digital conversion circuit 1 based on Sigma-Delta；
Sigma-ADC manipulator 13, is used for reference voltage as running voltage, and at the modulus received
When transition enabled signal is effective, analog voltage signal is converted into pulse density modulated code (PDM code),
The power end of Sigma-ADC manipulator 13 is connected with the outfan of reference voltage unit 12, Sigma-ADC
The Enable Pin of manipulator 13 enables outfan with the analog digital conversion controlling logical block 11 and is connected；
Filter unit 14, for when the filtering control enable signal received is effective, to pulse density modulated
Code is filtered, output digit signals, the Enable Pin of filter unit 14 and the filtering controlling logical block 11
Control to enable outfan to connect, the input of filter unit 14 and the outfan of Sigma-ADC manipulator 13
Connecting, the outfan of filter unit 14 is the outfan of analog to digital conversion circuit 1 based on Sigma-Delta.
In embodiments of the present invention, analog voltage signal is converted into after powering on by Sigma-ADC manipulator 13
Pulse density modulated code, and by filter unit 14, pulse density modulated code is filtered, output numeral letter
Number.
Reference voltage unit 12 provides for Sigma-ADC manipulator 13 and external circuit and makes it normally work
Reference voltage, this reference voltage unit 12 can by enable switch realize selectivity export, receiving control
When the power supply enable signal of logical block 11 processed generation is effective, Guan Bi switch, output reference voltage, for
Sigma-ADC manipulator 13 is powered, and when power supply enables invalidating signal, disconnects switch, stops output ginseng
Examine voltage.
Control logical block 11 to make with out-put supply enable signal, analog digital conversion enable signal and filtering control
Energy signal, to enable reference voltage unit 12, Sigma-ADC manipulator 13 and filter unit 14
Control, after control logical block 11 controls Sigma-ADC manipulator 13 work, control reference voltage unit
12 provide power supply to Sigma-ADC manipulator 13, it is to avoid when Sigma-ADC manipulator 13 does not works
The high energy consumption that output reference voltage causes.
The embodiment of the present invention controls reference voltage unit at Sigma-ADC manipulator by controlling logical block
In the case of idle, turn off the output of reference voltage, effectively reduce the power consumption of analog to digital conversion circuit, symbol
Close social development main flow and the market demand of energy-conserving and environment-protective.
Fig. 2 shows the excellent of the analog to digital conversion circuit based on Sigma-Delta structure that the embodiment of the present invention provides
Select exemplary circuit structure, for convenience of description, illustrate only part related to the present invention.
As one embodiment of the invention, reference voltage unit 12 includes:
Reference voltage signal generating unit 121, is used for generating reference voltage；
Enabling switch S1, for the output reference voltage when the power supply enable signal received is effective, enable is opened
Close the Enable Pin that Enable Pin is reference voltage unit 12 of S1, enable a conduction terminal and the reference of switch S1
The outfan of voltage generating unit 121 connects, and another conduction terminal enabling switch S1 is reference voltage unit
The outfan of 12.
In embodiments of the present invention, reference voltage signal generating unit 121 can use power-switching circuit, will outward
Portion's Power convert is Sigma-ADC manipulator 13 and the running voltage of sensor 2 use, and works as
Sigma-ADC manipulator 13 and the running voltage of sensor 2 be not it is also possible to distinguish the most defeated by two-way
Go out.
As one embodiment of the invention, enable switch S1 and can use semiconductor switch or other gate-controlled switches,
Such as single-pole single-throw switch (SPST), when enabling switch S1 and being semiconductor switch, the control end of this semiconductor switch is
Enabling the Enable Pin of switch S1, the current input terminal of semiconductor switch is the conduction terminal enabling switch S1,
The current output terminal of semiconductor switch is another conduction terminal enabling switch S1.Such as, if enabling switch S1
When using p-type metal-oxide-semiconductor to realize, the source electrode of this p-type metal-oxide-semiconductor is the current input terminal of semiconductor switch,
The current output terminal that drain electrode is semiconductor switch of p-type metal-oxide-semiconductor, the grid of p-type metal-oxide-semiconductor is quasiconductor
The control end of switch.
As one embodiment of the invention, filter unit 14 includes:
First digital filter 141, for when the filtering control enable signal received is effective, filtering arteries and veins
Rush the noise of density modulation code medium-high frequency part, export j position digital signal, the first digital filter 141
Enable Pin is the Enable Pin of filter unit 14, and the input of the first digital filter 141 is filter unit 14
Input；
Second digital filter 142, for exporting the digital signal of k j position at the first digital filter 141
After, the digital signal of k j position is carried out High frequency filter, the digital signal of output j position, the second digital filtering
The input of device 142 and the outfan of the first digital filter 141 connect, the second digital filter 142
Outfan is the outfan of filter unit 14；
Described j, k are natural number.
As one embodiment of the present invention, the first digital filter can be adopted as L rank digital filter.
As one embodiment of the invention, should can also wrap by analog to digital conversion circuit 1 based on Sigma-Delta structure
Include interface unit 15, for digital signal being exported circuit external, the input of interface unit 15 and the
The outfan of two digital filters 142 connects, and the outfan of interface unit 15 is based on Sigma-Delta
The outfan of analog to digital conversion circuit 1.
In embodiments of the present invention, measurement signal is converted to analog voltage signal by sensor 2, passes through
Sigma-ADC manipulator 13 carries out analog digital conversion, then is made an uproar by the worry of filter unit 14 high frequency, output numeral
Signal.
Reference voltage unit 12 is powered for Sigma-ADC manipulator 13 and sensor 2, by reference voltage list
Unit 12 is integrated in ADC chip, when digital calculation balance is not measured, controls logical block 11 and passes through power supply
Enable signal and control its enable switch S1 disconnection, stop Sigma-ADC manipulator 13 and sensor 2
Power supply, greatly reduces the energy consumption of analog to digital conversion circuit and sensor.
Control logical block 11 and control Sigma-ADC manipulator 13 and L rank digital filter 141 simultaneously
Duty, L rank digital filter 141 the filtering that receives control to enable signal effective time, filter
The noise of pulse density modulated code medium-high frequency part, exports j position digital signal, L rank digital filter 141
When often exporting the digital signal of k j position, the second digital filter 142 is defeated to L rank digital filter 141
The digital signal of k the j position gone out carries out signal processing, further filters out the noise of HFS, conversion
Become the digital signal of j position.
When the data of the DRDY pin output low level of ADC chip prepare marking signal, ADC is described
Output data DA be already prepared to, this analog to digital conversion circuit tranmitting data register can be believed by external microcontroller
Number to read the value of analog digital conversion by turn from interface unit 15, when the value of analog digital conversion is sent by ADC chip
Time complete, the data of the DRDY pin output high level of ADC chip prepare marking signal, see Fig. 3.
In embodiments of the present invention, when adc data converts, the DRDY pin of ADC chip draws
Low, after the data of ADC conversion are read, DRDY pin is drawn high, and controls logical block 11 and controls
Reference voltage unit 12 output reference voltage, controls Sigma-ADC manipulator 13 and filter unit simultaneously
14 work；After L rank digital filter 141 exports the digital signal D1-Dk of k j position, control logic
Unit 11 controls to close Sigma-ADC manipulator 13, close reference voltage unit 12, closedown L exponent number
Word wave filter 141 exports, until next data prepare again to export when marking signal is driven high.
In DC measurement, the switching rate of ADC is usually several hertz to tens hertz, now will conversion speed
Rate increases exponentially.Assuming that improving the switching rate before speed is n hertz, the switching rate after raising is
M hertz.The exponent number that L rank digital filter is different, the time of setting up of output digit signals is different.As
Really the first digital filter is L rank digital filters, then the analog digital conversion of l-th analog to digital conversion circuit is defeated
Go out data and be only correct value.In embodiments of the present invention, the conversion speed of analog to digital conversion circuit is improved in inside
After rate, every 1/n second takes k word signal D1-Dk, and before abandoning, L-1 digital signal is (such as,
When L is 3, abandon digital signal D1, D2), data (D3-Dk) below are averaging,
Meansigma methods is exported as signal, turns off the most rapidly reference voltage unit 12, and Sigma-ADC is adjusted
Device 13 processed and filter unit 14 are closed.It is the output speed of n hertz the most equally, but
Power consumption has had reduction greatly.If power consumption before is P, new power consumption only has (k n/m) p.As
The front sensor of fruit is 15mA plus the power consumption of analog to digital conversion circuit, and analog to digital conversion circuit switching rate is
10Hz, the first digital filter is 4 rank, then, the internal conversion speed of this analog to digital conversion circuit rises to
2KHz, output takes the meansigma methods of 32 data every time, then the power consumption after improvement is actual the most about
2.63mA。
The another object of the embodiment of the present invention is that providing a kind of uses above-mentioned modulus based on Sigma-Delta
The ADC chip of change-over circuit.
The another object of the embodiment of the present invention is to provide a kind of digital calculation balance using above-mentioned ADC chip.
The embodiment of the present invention, when not measuring, turns off the ginseng of reference voltage unit by controlling logical block
Examine power supply output, reduce the energy consumption of analog to digital conversion circuit and sensor, meet the social development of energy-conserving and environment-protective
Main flow and the market demand, and after L-1 digital signal, data below are averaging, will be flat
Average exports as signal, turns off the most rapidly reference voltage unit and analog to digital conversion circuit, is greatly improved
The conversion efficiency of analog to digital conversion circuit.
These are only presently preferred embodiments of the present invention, not in order to limit the present invention, all the present invention's
Any amendment, equivalent and the improvement etc. made within spirit and principle, should be included in the guarantor of the present invention
Within the scope of protecting.
Claims (8)
1. an analog to digital conversion circuit based on Sigma-Delta structure, described circuit includes:
Control logical block, be used for generating power supply enable signal, analog digital conversion enable signal and filtering control and make
Can signal；
Reference voltage unit, for the output reference voltage when the power supply enable signal received is effective, described
The Enable Pin of reference voltage unit enables outfan with the power supply of described control logical block and is connected, described reference
The outfan of voltage cell is the reference voltage output terminal of described circuit；
Sigma-ADC manipulator, is used for described reference voltage as running voltage, and at the mould received
When number conversion enable signal is effective, analog voltage signal is converted into pulse density modulated code, described
The power end of Sigma-ADC manipulator is connected with the outfan of described reference voltage unit, described
The Enable Pin of Sigma-ADC manipulator enables outfan with the analog digital conversion of described control logical block and is connected；
Filter unit, for when the filtering control enable signal received is effective, adjusting described impulse density
Code processed is filtered, output digit signals, the Enable Pin of described filter unit and described control logical block
Filtering controls to enable outfan and connects, the input of described filter unit and described Sigma-ADC manipulator
Outfan connects, and the outfan of described filter unit is the outfan of described circuit；
Described control logical block controls described reference voltage unit in described Sigma-ADC manipulator not work
In the case of work, turn off the output of reference voltage.
2. circuit as claimed in claim 1, it is characterised in that described reference voltage unit includes:
Reference voltage signal generating unit, is used for generating reference voltage；
Enable switch, for output reference voltage, described enable when the power supply enable signal received is effective
The Enable Pin that Enable Pin is described reference voltage unit of switch, a conduction terminal of described enable switch is with described
The outfan of reference voltage signal generating unit connects, and described another conduction terminal enabling switch is described reference voltage
The outfan of unit.
3. circuit as claimed in claim 2, it is characterised in that described enable switch is semiconductor switch,
The end that controls of described semiconductor switch is the described Enable Pin enabling switch, and the electric current of described semiconductor switch is defeated
Entering an end conduction terminal for described enable switch, the current output terminal of described semiconductor switch is that described enable is opened
Another conduction terminal closed.
4. circuit as claimed in claim 1, it is characterised in that described filter unit includes:
First digital filter, for when the filtering control enable signal received is effective, filtering described arteries and veins
Rush the noise of density modulation code medium-high frequency part, export j position digital signal, described first digital filter
Enable Pin is the Enable Pin of described filter unit, and the input of described first digital filter is that described filtering is single
The input of unit；
Second digital filter, after the digital signal in described first k j position of digital filter output,
The digital signal of described k j position is carried out High frequency filter, the digital signal of output j position, described second numeral
The input of wave filter is connected with the outfan of described first digital filter, described second digital filter
Outfan is the outfan of described filter unit；
Described j, k are natural number.
5. circuit as claimed in claim 4, it is characterised in that described first digital filter is L rank
Digital filter.
6. circuit as claimed in claim 4, it is characterised in that described circuit also includes interface unit, uses
In described digital signal being exported described circuit external, the input of described interface unit and described second number
The outfan of word wave filter connects, and the outfan of described interface unit is the outfan of described circuit.
7. an ADC chip, it is characterised in that described ADC chip includes such as claim 1 to 6
Analog to digital conversion circuit based on Sigma-Delta structure described in any one.
8. a digital calculation balance, it is characterised in that described digital calculation balance includes as claimed in claim 7
ADC chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310602040.9A CN103607203B (en) | 2013-11-25 | 2013-11-25 | ADC chip, digital scale and analog-digital conversion circuit based on Sigma-Delta |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310602040.9A CN103607203B (en) | 2013-11-25 | 2013-11-25 | ADC chip, digital scale and analog-digital conversion circuit based on Sigma-Delta |
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| Publication Number | Publication Date |
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| CN103607203A CN103607203A (en) | 2014-02-26 |
| CN103607203B true CN103607203B (en) | 2017-01-11 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6121911A (en) * | 1998-08-19 | 2000-09-19 | The United States Of America As Represented By The Secretary Of The Navy | Data gathering circuit having reduced power consumption |
| US7477178B1 (en) * | 2007-06-30 | 2009-01-13 | Cirrus Logic, Inc. | Power-optimized analog-to-digital converter (ADC) input circuit |
| CN102801424A (en) * | 2012-09-03 | 2012-11-28 | 中国科学院微电子研究所 | Sigma-Delta modulator and analog-digital converter |
| CN203661042U (en) * | 2013-11-25 | 2014-06-18 | 深圳市芯海科技有限公司 | Analog-to-digital conversion circuit based on Sigma-Delta, ADC chip and digital balance |
-
2013
- 2013-11-25 CN CN201310602040.9A patent/CN103607203B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6121911A (en) * | 1998-08-19 | 2000-09-19 | The United States Of America As Represented By The Secretary Of The Navy | Data gathering circuit having reduced power consumption |
| US7477178B1 (en) * | 2007-06-30 | 2009-01-13 | Cirrus Logic, Inc. | Power-optimized analog-to-digital converter (ADC) input circuit |
| CN102801424A (en) * | 2012-09-03 | 2012-11-28 | 中国科学院微电子研究所 | Sigma-Delta modulator and analog-digital converter |
| CN203661042U (en) * | 2013-11-25 | 2014-06-18 | 深圳市芯海科技有限公司 | Analog-to-digital conversion circuit based on Sigma-Delta, ADC chip and digital balance |
Non-Patent Citations (1)
| Title |
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| "基于sigma-delta ADC的高精度温度测量";马伯宁;《微处理机》;20040831(第4期);第55-57页 * |
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Address after: 518000, A building, block 9, garden city digital garden, 1079 Nanhai Road, Guangdong, Shenzhen, Nanshan District Patentee after: Chipsea Technology (Shenzhen) Co., Ltd. Address before: 518057 No. 901A, Block A, Garden City Digital Building, 1079 Nanhai Avenue, Nanshan District, Shenzhen City, Guangdong Province Patentee before: Xinhai Science and Technology Co., Ltd., Shenzhen City |