CN103580276A - Power supply circuit and power supply switching circuit of clock chip, power supply switching method and microwave oven - Google Patents
Power supply circuit and power supply switching circuit of clock chip, power supply switching method and microwave oven Download PDFInfo
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- CN103580276A CN103580276A CN201310503606.2A CN201310503606A CN103580276A CN 103580276 A CN103580276 A CN 103580276A CN 201310503606 A CN201310503606 A CN 201310503606A CN 103580276 A CN103580276 A CN 103580276A
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Abstract
The invention provides a power supply switching circuit of a clock chip. The power supply switching circuit comprises a first sampling terminal, a second sampling terminal, an output terminal and a switching control component, wherein the first sampling terminal is used for sampling a first direct current voltage; the second sampling terminal is used for sampling a second direct current voltage; the output terminal is connected to a power input terminal of the clock chip; the switching control component is used for comparing the first direct current voltage with the second direct current voltage and stopping or recovering connection between a second power supply terminal and the power input terminal of the clock chip. The invention further provides a corresponding power supply circuit of the clock chip, a microwave oven and a power supply switching method of the clock chip. By means of the technical scheme, different power sources can be used on different conditions, and the situation that the clock chip cannot be driven due to voltage drops can be avoided at the same time of ensuring that voltages of two power sources cannot flow backward mutually.
Description
Technical field
The present invention relates to electrical source exchange technical field, in particular to power supply circuits and a kind of microwave oven of a kind of power switching circuit of clock chip and power switching method, a kind of clock chip.
Background technology
On people's electrical equipment used in everyday, also start clock or perpetual calendar etc. are installed, so that check at any time time or date.In above-mentioned electrical equipment, such as microwave oven, baking box etc., mainly adopt civil power (alternating current) to be converted to after direct current, be directly clock chip power supply.But while adopting mains-supplied, if there is situations such as power failure, attaching plug come off, just may cause the problems such as clock need to reset, cause the inconvenience in use.
For fear of the frequent setting to clock, can consider, in electrical equipment inside, stand-by power supply is set, as by button cell, make after civil power power down, still can, by switching power supply source, guarantee the continuous operation of clock chip.Direct voltage after civil power is changed is 5V, and the direct voltage of button cell etc. is 3V, and pours in down a chimney for fear of voltage, conventionally also need, between Liang Tiao supply line, diode is set, with control voltage source to.Yet, diode can cause the voltage drop of about 0.7V, while powering by stand-by power supply, the magnitude of voltage of actual input clock chip is only 2.3V, but when cell voltage reduces to 2.5V and when following, clock chip is cisco unity malfunction, thereby cannot normal power supply, and the useful life that can reduce battery.
Therefore, how, when can avoiding voltage between Liang Tiao supply line to pour in down a chimney, guarantee the normal power supply to clock chip, become technical problem urgently to be resolved hurrily at present.
Summary of the invention
The present invention is intended at least solve one of technical problem existing in prior art or correlation technique.
For this reason, one object of the present invention has been to propose a kind of power switching circuit of clock chip.
Another object of the present invention has been to propose a kind of power supply circuits of clock chip.
Another object of the present invention is to have proposed a kind of microwave oven.
Another object of the present invention has been to propose a kind of power switching method of clock chip.
For achieving the above object, embodiment according to a first aspect of the invention, a kind of power switching circuit of clock chip has been proposed, comprise: the first sampling end, be connected to the first feeder ear, described the first feeder ear the first direct voltage output, that be converted to by the external communication signal of telecommunication is sampled, and wherein, described the first feeder ear is also connected to the power input of described clock chip through one-way conduction element; The second sampling end, be connected to the second feeder ear, to described the second feeder ear output, from the second direct voltage of DC power supply, sample, wherein, the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends; Output, is connected to the power input of described clock chip; Switching controls parts, more described the first direct voltage and described the second direct voltage, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
In this technical scheme, by respectively the first feeder ear and the second feeder ear being carried out to voltage sample and comparison, can judge in time, exactly the situation whether the first feeder ear exists power down, for situations such as power failure, attaching plug come off.
By the circuit switching between the first feeder ear and the second feeder ear, thereby guarantee the continuous power supply to clock chip, avoid the frequent setting of user to time, date etc.
By the control to the connection status of the power input of the second feeder ear and clock chip by switching controls parts, specifically direct connection or the disconnection to the power input of the second feeder ear and clock chip, can not produce the voltage drop problem that one-way conduction element (as diode etc.) is caused, make the second feeder ear can realize the normal power supply to clock chip, guarantee the normal switching of feeder ear, avoid shortening the useful life of the DC power supply such as battery.
In addition, the power switching circuit of clock chip according to the above embodiment of the present invention, can also have following additional technical characterictic:
Above-mentioned power switching circuit also comprises: triode.Dissimilar based on triode, can specifically be divided into two kinds of different structures.
According to one embodiment of present invention, described triode is positive-negative-positive triode, described the first sampling end is connected to the base stage of described positive-negative-positive triode, described the second sampling end is connected to the emitter of described positive-negative-positive triode, described output is connected to the collector electrode of described positive-negative-positive triode, described switching controls parts are by relatively inputting the first direct voltage of base stage and second direct voltage of input emitter of described positive-negative-positive triode, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
According to another embodiment of the invention, described triode is NPN type triode, described the first sampling end is connected to the base stage of described NPN type triode, described the second sampling end is connected to the collector electrode of described NPN type triode, described output is connected to the emitter of described NPN type triode, described switching controls parts are by relatively inputting the first direct voltage of base stage and second direct voltage of input set electrode of described NPN type triode, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
In the scheme forming at above-mentioned additional technical feature, by substitute the diode in correlation technique with triode, on the one hand, when the first direct voltage is greater than in the situation of the second direct voltage, can be by disconnecting being connected between the power input of the second feeder ear and clock chip, be that triode enters cut-off state, to avoid the first direct voltage pouring in down a chimney to the second feeder ear; On the other hand, when the first direct voltage is less than in the situation of the second direct voltage, can be by recovering being connected between the power input of the second feeder ear and clock chip, triode enters conducting state so that the second direct voltage can without pressure drop power for clock chip.
According to the embodiment of second aspect present invention, a kind of power supply circuits of clock chip have been proposed, comprise: the first power supply circuits, through one-way conduction element, be connected to the power input of described clock chip, by the first direct voltage being converted to by the external communication signal of telecommunication, it is described clock chip power supply; The second power supply circuits, are connected to commutation circuit, obtain the second direct voltage from DC power supply, and the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends; Described commutation circuit, is also connected to the power input of described the first power supply circuits and described clock chip, for more described the first direct voltage and described the second direct voltage; Wherein, described commutation circuit is in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second power supply circuits and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second power supply circuits and described clock chip, take by described the second power supply circuits without pressure drop power as described clock chip.
In this technical scheme, by respectively the first power supply circuits and the second power supply circuits being carried out to voltage sample and comparison, can judge in time, exactly the situation whether the first power supply circuits exist power down, for situations such as power failure, attaching plug come off.
By the circuit switching between the first power supply circuits and the second power supply circuits, thereby guarantee the continuous power supply to clock chip, avoid the frequent setting of user to time, date etc.
By the control to the connection status of the power input of the second power supply circuits and clock chip by switching controls parts, specifically direct connection or the disconnection to the power input of the second power supply circuits and clock chip, can not produce the voltage drop problem that one-way conduction element (as diode etc.) is caused, make the second power supply circuits can realize the normal power supply to clock chip, guarantee the normal switching of feeder ear, avoid shortening the useful life of the DC power supply such as battery.
In addition, the power supply circuits of clock chip according to the above embodiment of the present invention, can also have following additional technical characterictic:
According to one embodiment of present invention, described commutation circuit comprises: the first triode, and the base stage of described the first triode is connected to described the first power supply circuits, for described the first direct voltage of sampling; Wherein, when described the first triode is positive-negative-positive triode, the emitter of described positive-negative-positive triode is connected to the power input that described the second power supply circuits, collector electrode are connected to described clock chip; When described the first triode is NPN type triode, the collector electrode of described NPN type triode is connected to the power input that described the second power supply circuits, emitter are connected to described clock chip; And described the first triode is by more described the first direct voltage and described the second direct voltage, control being connected of power input that disconnects or recover described the second power supply circuits and described clock chip.
In this technical scheme, according to the particular type of triode, be positive-negative-positive and NPN type, from between other circuit, formed different separately circuit connecting modes, but be all by the second direct voltage of the first direct voltage of the base stage of input triode, the emitter of input positive-negative-positive triode or the collector electrode of NPN type triode is compared, to pass through cut-off or the conducting of triode, realize the disconnection between the second power supply circuits and clock chip or be connected, and avoiding voltage drop to cause driving clock chip.
According to one embodiment of present invention, described power supply circuits also comprise: sample circuit, and one end of described sample circuit is connected to described the first power supply circuits, and the other end is connected to the base stage of described the first triode; Power consumption element, one end of described power consumption element is connected to the base stage of described the first triode, other end ground connection.
In this technical scheme, by sample circuit is specifically set, realize the first direct voltage of the first power supply circuits output is carried out to real-time sampling, during with convenient the first power supply circuits generation power-down conditions, can switch in time the second power supply circuits, realize the uninterrupted power supply to clock chip.
By power consumption element is set, make when the first triode cut-off, sample circuit still can be by the ground connection of power consumption element in conducting state, thereby can make timely reaction to the change in voltage of the first power supply circuits, switch to fast the second power supply circuits, to guarantee that clock chip can not be reset because of power-off.
Particularly, described sample circuit can comprise the second triode, and specifically can comprise two kinds of situations:
The first situation, described the second triode is NPN type triode, the base stage of described NPN type triode and collector electrode are connected to respectively the base stage that described the first power supply circuits, emitter are connected to described the first triode.
The second situation, when described the second triode is positive-negative-positive triode, the base stage of described positive-negative-positive triode and emitter are connected to respectively the base stage that described the first power supply circuits, collector electrode are connected to described the first triode.
In this technical scheme, by the first power supply circuits being sampled with the second triode, contribute to control the power consumption of whole circuit.Certainly, can also adopt other components and parts, such as diode, resistance etc., all the first direct voltage of the first power supply circuits can be inputed to the base stage of the first triode, for the comparison with the second direct voltage.
According to one embodiment of present invention, described DC power supply is button cell.
In this technical scheme, DC power supply can be disposable battery, can be also rechargeable battery; When adopting button cell, contribute to reduce the volume of the common clock modules that form such as clock chip.Certainly, obviously also can adopt other DC power supply, such as dry cell, lithium battery etc.
According to one embodiment of present invention, also comprise: filter circuit, is connected to the power input of described clock chip, for described the first direct voltage or described the second direct voltage are carried out to filtering processing.
In this technical scheme, by filter circuit is set, thereby the HF noise signal comprising in filtering the first direct voltage or the second direct voltage etc. contribute to the stable operation of clock chip.
According to the embodiment of third aspect present invention, a kind of microwave oven has been proposed, comprise the power supply circuits of the clock chip of above-mentioned arbitrary technical scheme.
According to the embodiment of fourth aspect present invention, a kind of power switching method of clock chip has been proposed, comprise: the first feeder ear the first direct voltage output, that be converted to by the external communication signal of telecommunication is sampled, wherein, described the first feeder ear is also connected to the power input of described clock chip through one-way conduction element; To described the second feeder ear output, from the second direct voltage of DC power supply, sample, wherein, the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends; More described the first direct voltage and described the second direct voltage, if described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip; If described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
In this technical scheme, by respectively the first feeder ear and the second feeder ear being carried out to voltage sample and comparison, can judge in time, exactly the situation whether the first feeder ear exists power down, for situations such as power failure, attaching plug come off.
By the circuit switching between the first feeder ear and the second feeder ear, thereby guarantee the continuous power supply to clock chip, avoid the frequent setting of user to time, date etc.
By the control to the connection status of the power input of the second feeder ear and clock chip, specifically direct connection or the disconnection to the power input of the second feeder ear and clock chip, can not produce the voltage drop problem that one-way conduction element (as diode etc.) is caused, make the second feeder ear can realize the normal power supply to clock chip, guarantee the normal switching of feeder ear, avoid shortening the useful life of the DC power supply such as battery.
By above technical scheme, can under different situations, use different power supplys, and when guaranteeing that mutually pouring in down a chimney of voltage can not occur two power supplys, can avoid because voltage drop causes driving clock chip.
Additional aspect of the present invention and advantage in the following description part provide, and part will become obviously from the following description, or recognize by practice of the present invention.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present invention and advantage accompanying drawing below combination obviously and is easily understood becoming the description of embodiment, wherein:
Fig. 1 shows the structural representation of the power switching circuit of clock chip according to an embodiment of the invention;
Fig. 2 shows the structural representation of the power switching circuit of clock chip according to another embodiment of the invention;
Fig. 3 shows the structural representation of the power supply circuits of clock chip according to an embodiment of the invention;
Fig. 4 is the electrical block diagram of a kind of execution mode embodiment illustrated in fig. 3;
Fig. 5 is the electrical block diagram of another kind of execution mode embodiment illustrated in fig. 3;
Fig. 6 is the electrical block diagram of another execution mode embodiment illustrated in fig. 3;
Fig. 7 shows the concrete structure schematic diagram of the power supply circuits of clock chip according to an embodiment of the invention;
Fig. 8 shows the concrete structure schematic diagram of the power supply circuits of clock chip according to another embodiment of the invention;
Fig. 9 shows the schematic flow diagram of the power switching method of clock chip according to an embodiment of the invention.
Embodiment
In order more clearly to understand above-mentioned purpose of the present invention, feature and advantage, below in conjunction with the drawings and specific embodiments, the present invention is further described in detail.It should be noted that, in the situation that not conflicting, the application's embodiment and the feature in embodiment can combine mutually.
A lot of details have been set forth in the following description so that fully understand the present invention; but; the present invention can also adopt other to be different from other modes described here and implement, and therefore, protection scope of the present invention is not limited to the restriction of following public specific embodiment.
One, the power switching circuit of clock chip
Embodiment mono-
Fig. 1 shows the structural representation of the power switching circuit of clock chip according to an embodiment of the invention.
As shown in Figure 1, the power switching circuit of clock chip according to an embodiment of the invention, comprise: the first sampling end 102, be connected to the first feeder ear, described the first feeder ear the first direct voltage output, that be converted to by the external communication signal of telecommunication is sampled, wherein, described the first feeder ear is also connected to the power input of described clock chip through one-way conduction element; The second sampling end 104, be connected to the second feeder ear, to described the second feeder ear output, from the second direct voltage of DC power supply, sample, wherein, the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends; Output 106, is connected to the power input of described clock chip; Switching controls parts 108, more described the first direct voltage and described the second direct voltage, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
In this technical scheme, by respectively the first feeder ear and the second feeder ear being carried out to voltage sample and comparison, can judge in time, exactly the situation whether the first feeder ear exists power down, for situations such as power failure, attaching plug come off.
By the circuit switching between the first feeder ear and the second feeder ear, thereby guarantee the continuous power supply to clock chip, avoid the frequent setting of user to time, date etc.
By the control to the connection status of the power input of the second feeder ear and clock chip by switching controls parts, specifically direct connection or the disconnection to the power input of the second feeder ear and clock chip, can not produce the voltage drop problem that one-way conduction element (as diode etc.) is caused, make the second feeder ear can realize the normal power supply to clock chip, guarantee the normal switching of feeder ear, avoid shortening the useful life of the DC power supply such as battery.
Be similar to the above embodiments one, the present invention, by forming the variation of the components and parts of this power switching circuit, has also proposed following embodiment bis-.
Embodiment bis-
Fig. 2 shows the structural representation of the power switching circuit of clock chip according to another embodiment of the invention.
As shown in Figure 2, the power switching circuit of clock chip according to another embodiment of the invention, comprises the first sampling end 102, the second sampling end 104, output 106 and switching controls parts 108 described in embodiment mono-, and comprises triode 110.
Particularly, due to possible dissimilar of triode 110, respectively corresponding circuit structure and annexation are described below.
Execution mode one: triode 110 is positive-negative-positive triode.
The first sampling end 102 is connected to the base stage (not shown) of described positive-negative-positive triode, described the second sampling end 104 is connected to the emitter (not shown) of described positive-negative-positive triode, described output 106 is connected to the collector electrode (not shown) of described positive-negative-positive triode, described switching controls parts 108 are by relatively inputting the first direct voltage of base stage and second direct voltage of input emitter of described positive-negative-positive triode, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
Execution mode two: triode 110 is NPN type triode.
The first sampling end 102 is connected to the base stage (not shown) of described NPN type triode, described the second sampling end 104 is connected to the collector electrode (not shown) of described NPN type triode, described output 106 is connected to the emitter (not shown) of described NPN type triode, described switching controls parts 108 are by relatively inputting the first direct voltage of base stage and second direct voltage of input set electrode of described NPN type triode, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
In the embodiment bis-forming at above-mentioned additional technical feature, by substitute diode in correlation technique with triode 110, (as be connected to the one-way conduction element of the first feeder ear, not shown), on the one hand, when the first direct voltage is greater than in the situation of the second direct voltage, can be by disconnecting being connected between the power input of the second feeder ear and clock chip, triode 110 enters cut-off state, to avoid the first direct voltage pouring in down a chimney to the second feeder ear; On the other hand, when the first direct voltage is less than in the situation of the second direct voltage, can be by recovering being connected between the power input of the second feeder ear and clock chip, triode enters conducting state so that the second direct voltage can without pressure drop power for clock chip.
Two, the power supply circuits of clock chip
Fig. 3 shows the structural representation of the power supply circuits of clock chip according to an embodiment of the invention.
As shown in Figure 3, the power supply circuits of clock chip according to an embodiment of the invention, comprise: the first power supply circuits 302, through one-way conduction element, be connected to the power input of described clock chip, by the first direct voltage being converted to by the external communication signal of telecommunication, it is described clock chip power supply; The second power supply circuits 304, are connected to commutation circuit 306, obtain the second direct voltage from DC power supply, and the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends; Described commutation circuit 306, is also connected to the power input of described the first power supply circuits 302 and described clock chip, for more described the first direct voltage and described the second direct voltage; Wherein, described commutation circuit 306 is in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second power supply circuits 304 and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second power supply circuits 304 and described clock chip, take by described the second power supply circuits 304 without pressure drop power as described clock chip.
The present invention is by commutation circuit 306 is set, and main hope realizes the function of three aspects:
(1) switching controls to the first power supply circuits 302 and the second power supply circuits 304, guarantees the non-stop run of clock chip.
(2), in the process of powering to clock chip at the first power supply circuits 302, avoid the first direct voltage to pour in down a chimney to the second power supply circuits 304.
(3), in the process of powering to clock chip at the second power supply circuits 304, avoid the second direct voltage to cause the minimum operating voltage lower than clock chip because of voltage drop, to guarantee the normal operation of clock chip.
For above-mentioned functions (one), the present invention is by carrying out voltage sample and comparison to the first power supply circuits and the second power supply circuits respectively, can judge in time, exactly the situation whether the first power supply circuits exist power down, for situations such as power failure, attaching plug come off.
Meanwhile, by the circuit switching between the first power supply circuits and the second power supply circuits, thereby guarantee the continuous power supply to clock chip, avoid the frequent setting of user to time, date etc.
For above-mentioned functions (two), by being greater than the second direct voltage at the first direct voltage, the first power supply circuits 302 are in the situation of clock chip normal power supply, disconnect the connection of the power input of the second power supply circuits 304 and clock chip, also just disconnect being connected of the second power supply circuits 304 and the first power supply circuits 302, thereby avoided the pour in down a chimney phenomenon of the first direct voltage to the second power supply circuits 304.
For above-mentioned functions (three), because the first direct voltage is converted to from civil power (220V) by the first power supply circuits 302, thereby can make the magnitude of voltage of generation larger, such as being 5V, by one-way conduction element (for avoiding the second direct voltage to pour in down a chimney to the first power supply circuits 302) afterwards, even if there is the voltage drop of 0.7V, still can guarantee the normal operation of clock chip; But the second direct voltage can not simply adopt which, because the second direct voltage is often for dc-battery produces, be only 3V, through after voltage drop, 2.3V voltage cannot drive clock chip.
So, the present invention is realized the second power supply circuits 302 is connected to control with the circuit of clock chip by commutation circuit 306, avoid directly using diode, also just cannot produce voltage drop, make the second direct voltage can realize smoothly the driving to clock chip, also can avoid shortening the useful life of the DC power supply such as battery.
The concrete structure of commutation circuit 306 can have a variety of, and such as the present invention is below in conjunction with Fig. 4-Fig. 6, the multiple concrete condition of take wherein describes as example.
Execution mode one
Above-mentioned commutation circuit 306 can be triode, more specifically, can be the positive-negative-positive triode Q1 shown in Fig. 4.
Wherein, the base stage of positive-negative-positive triode Q1 is connected to described the first power supply circuits 302, emitter and is connected to the power input that described the second power supply circuits 304, collector electrode are connected to described clock chip.
When the first power supply circuits 302 normal power supply, on the one hand via one-way conduction element, directly to the power input of clock chip, power; To the base stage of positive-negative-positive triode Q1, input the first direct voltage on the other hand, i.e. 5V voltage.The second direct voltage of exporting due to the second power supply circuits 304 is 3V, i.e. first direct voltage > the second direct voltage, make positive-negative-positive triode Q1 in cut-off state, the power input of the second power supply circuits and the first power supply circuits, clock chip, all in off-state, guarantees that the first direct voltage cannot pour in down a chimney to the second power supply circuits 304.
When the first power supply circuits 302 power down, such as power failure, plug from falling etc., or because the transfer process of 302 pairs of civil powers of the first power supply circuits occurs abnormal, cause the first direct voltage lower than the second direct voltage, cannot drive clock chip, make the base stage, collector voltage of positive-negative-positive triode Q1 all lower than 3V, emitter voltage is still 3V, positive-negative-positive triode Q1 reverts to conducting state, the second power supply circuits 304 reconnect to the power input of clock chip, guarantee the non-stop run of clock chip.
Execution mode two
Above-mentioned commutation circuit 306 can be triode, more specifically, can be the NPN type triode Q1 ' shown in Fig. 5.
Wherein, the base stage of NPN type triode Q1 ' is connected to described the first power supply circuits 302, collector electrode and is connected to the power input that described the second power supply circuits 304, emitter are connected to described clock chip.Simultaneously, can introduce independently working signal for the base stage of NPN type triode Q1 ', such as connecing to the base stage of NPN type triode Q1 ' by biasing resistor R1 ' from the second power supply circuits 304, even if stop output signal at the first power supply circuits 302, during such as AC signal power down, NPN type triode Q1 ' also can be under the driving of R1 ' normally.
Particularly, different situations for the first direct voltage, the state change process of NPN type triode Q1 ' and above-mentioned execution mode one are similar, when the first power supply circuits 302 are normal, NPN type triode Q1 ' is in cut-off state, disconnect being connected of power input of the second power supply circuits 304 and clock chip, avoid the first direct voltage to pour in down a chimney to the second power supply circuits 304; When the first power supply circuits 302 are abnormal, NPN type triode Q1 ' is in conducting state, recovers being connected of power input of the second power supply circuits 304 and clock chip, guarantees the non-stop run of clock chip.
Execution mode three
Above-mentioned commutation circuit 306 can be controller and switching device.
As shown in Figure 6, controller is connected with the second power supply circuits 304 with the first power supply circuits 302 simultaneously, and the first direct voltage and the second direct voltage are sampled.When monitoring the first direct voltage and be greater than the second direct voltage, by switching device, disconnect being connected of power input of the second power supply circuits 304 and clock chip, avoid the first direct voltage to pour in down a chimney to the second power supply circuits 304; When monitoring the first direct voltage and be less than the second direct voltage, by switching device, recover being connected of power input of the second power supply circuits 304 and clock chip, guarantee the non-stop run of clock chip.
For above-mentioned multiple different execution mode, the present invention is directed to a kind of concrete condition wherein, than positive-negative-positive triode Q1 as shown in Figure 4, and in conjunction with other structures and the element of power supply circuits, provided concrete circuit diagram as shown in Figure 7.
Fig. 7 shows the concrete structure schematic diagram of the power supply circuits of clock chip according to an embodiment of the invention.
As shown in Figure 7, Vcc is the input of the first power supply circuits, for inputting the first direct voltage being converted to by civil power; Vbat is the input of the second power supply circuits, for inputting the second direct voltage being produced by DC power supply; Positive-negative-positive triode Q1 is commutation circuit; U1 is clock chip.
For the first direct voltage of Vcc input, via the port 6 of diode D1 input chip U1, i.e. the power input of clock chip, wherein, diode D1 is for avoiding the second direct voltage of being inputted by Vbat to pour in down a chimney.
Because the first direct voltage is to be converted to by civil power, thereby the first direct voltage can have high value, such as being 5V, even if there is the voltage drop of 0.7V via D1, and work that also still can driven chip U1.
Be similar to Fig. 4, Vbat is connected to the emitter of Q1, to input the second direct voltage; Vcc is connected to the base stage of Q1 via diode D2; The collector electrode of Q1 exports the port 6 of chip U1 to.Wherein, D2 has formed the sample circuit to the first direct voltage of Vcc input, and is connected to the resistance R 1 between Q1 base stage and ground, even if can so that Q1 when cut-off state, D2 and R1 still can form loop, make D2 in running order, thus when Vcc changes, can be in time by D2 perception and transfer to Q1, the sensitiveness of raising system, the operational terminal of avoiding postponing to cause U1, cannot make clock non-stop run, has also just lost the meaning of dual power supply.
In addition, can also carry out filtering processing by the first direct voltage or the second direct voltage of 1 couple of input chip U1 of capacitor C, thereby guarantee that chip U1 can be in stable operating state.
Certainly, above-mentioned sample circuit, except using diode D2, can also adopt much other components and parts, such as resistance (not shown), or ratio triode Q2 as shown in Figure 8.
Particularly, the triode Q2 shown in Fig. 8 is NPN type triode, and its base stage and collector electrode are all connected to Vcc, and emitter is connected to the base stage of triode Q1, thereby can sample to the first direct voltage of triode Vcc input equally.
In addition, the invention allows for a kind of microwave oven (not shown), be wherein provided with the power supply circuits of the clock chip described in above-mentioned arbitrary technical scheme.
Three, the power switching method of clock chip
Fig. 9 shows the schematic flow diagram of the power switching method of clock chip according to an embodiment of the invention.
As shown in Figure 9, the power switching method of clock chip according to an embodiment of the invention comprises:
In this technical scheme, by respectively the first feeder ear and the second feeder ear being carried out to voltage sample and comparison, can judge in time, exactly the situation whether the first feeder ear exists power down, for situations such as power failure, attaching plug come off.
By the circuit switching between the first feeder ear and the second feeder ear, thereby guarantee the continuous power supply to clock chip, avoid the frequent setting of user to time, date etc.
By the control to the connection status of the power input of the second feeder ear and clock chip, specifically direct connection or the disconnection to the power input of the second feeder ear and clock chip, can not produce the voltage drop problem that one-way conduction element (as diode etc.) is caused, make the second feeder ear can realize the normal power supply to clock chip, guarantee the normal switching of feeder ear, avoid shortening the useful life of the DC power supply such as battery.
More than be described with reference to the accompanying drawings technical scheme of the present invention, the present invention proposes power supply circuits and a kind of microwave oven of a kind of power switching circuit of clock chip and power switching method, a kind of clock chip, can under different situations, use different power supplys, and when guaranteeing that mutually pouring in down a chimney of voltage can not occur two power supplys, can avoid because voltage drop causes driving clock chip.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (10)
1. a power switching circuit for clock chip, is characterized in that, comprising:
The first sampling end, be connected to the first feeder ear, described the first feeder ear the first direct voltage output, that be converted to by the external communication signal of telecommunication is sampled, and wherein, described the first feeder ear is also connected to the power input of described clock chip through one-way conduction element;
The second sampling end, be connected to the second feeder ear, to described the second feeder ear output, from the second direct voltage of DC power supply, sample, wherein, the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends;
Output, is connected to the power input of described clock chip;
Switching controls parts, more described the first direct voltage and described the second direct voltage, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
2. power switching circuit according to claim 1, is characterized in that, also comprises:
Triode, described the first sampling end is connected to the base stage of described triode;
When described triode is positive-negative-positive triode, described the second sampling end is connected to the emitter of described positive-negative-positive triode, described output is connected to the collector electrode of described positive-negative-positive triode, described switching controls parts are by relatively inputting the first direct voltage of base stage and second direct voltage of input emitter of described positive-negative-positive triode, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip,
When described triode is NPN type triode, described the second sampling end is connected to the collector electrode of described NPN type triode, described output is connected to the emitter of described NPN type triode, described switching controls parts are by relatively inputting the first direct voltage of base stage and second direct voltage of input set electrode of described NPN type triode, in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
3. power supply circuits for clock chip, is characterized in that, comprising:
The first power supply circuits, are connected to the power input of described clock chip through one-way conduction element, by the first direct voltage being converted to by the external communication signal of telecommunication, be described clock chip power supply;
The second power supply circuits, are connected to commutation circuit, obtain the second direct voltage from DC power supply, and the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends;
Described commutation circuit, is also connected to the power input of described the first power supply circuits and described clock chip, for more described the first direct voltage and described the second direct voltage;
Wherein, described commutation circuit is in the situation that described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second power supply circuits and described clock chip, and in the situation that described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second power supply circuits and described clock chip, take by described the second power supply circuits without pressure drop power as described clock chip.
4. power supply circuits according to claim 3, is characterized in that, described commutation circuit comprises:
The first triode, the base stage of described the first triode is connected to described the first power supply circuits, for described the first direct voltage of sampling;
Wherein, when described the first triode is positive-negative-positive triode, the emitter of described positive-negative-positive triode is connected to the power input that described the second power supply circuits, collector electrode are connected to described clock chip; When described the first triode is NPN type triode, the collector electrode of described NPN type triode is connected to the power input that described the second power supply circuits, emitter are connected to described clock chip; And
Described the first triode is by more described the first direct voltage and described the second direct voltage, controls being connected of power input that disconnects or recover described the second power supply circuits and described clock chip.
5. power supply circuits according to claim 4, is characterized in that, also comprise:
Sample circuit, one end of described sample circuit is connected to described the first power supply circuits, and the other end is connected to the base stage of described the first triode;
Power consumption element, one end of described power consumption element is connected to the base stage of described the first triode, other end ground connection.
6. power supply circuits according to claim 5, is characterized in that, described sample circuit comprises:
The second triode;
Wherein, when described the second triode is NPN type triode, the base stage of described NPN type triode and collector electrode are connected to respectively the base stage that described the first power supply circuits, emitter are connected to described the first triode; When described the second triode is positive-negative-positive triode, the base stage of described positive-negative-positive triode and emitter are connected to respectively the base stage that described the first power supply circuits, collector electrode are connected to described the first triode.
7. according to the power supply circuits described in any one in claim 3 to 6, it is characterized in that, described DC power supply is button cell.
8. according to the power supply circuits described in any one in claim 3 to 6, it is characterized in that, also comprise:
Filter circuit, is connected to the power input of described clock chip, for described the first direct voltage or described the second direct voltage are carried out to filtering processing.
9. a microwave oven, is characterized in that, comprising: the power supply circuits of the clock chip as described in any one in claim 3 to 8.
10. a power switching method for clock chip, is characterized in that, comprising:
The first feeder ear the first direct voltage output, that be converted to by the external communication signal of telecommunication is sampled, and wherein, described the first feeder ear is also connected to the power input of described clock chip through one-way conduction element;
To described the second feeder ear output, from the second direct voltage of DC power supply, sample, wherein, the difference of the minimum of described the second direct voltage and described clock chip is less than or equal to the voltage difference at described one-way conduction element two ends;
More described the first direct voltage and described the second direct voltage, if described the first direct voltage is greater than described the second direct voltage, disconnect being connected of power input of described the second feeder ear and described clock chip; If described the first direct voltage is less than described the second direct voltage, recover being connected of power input of described the second feeder ear and described clock chip, take by described the second feeder ear without pressure drop power as described clock chip.
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CN104167807A (en) * | 2014-08-01 | 2014-11-26 | 科立讯通信股份有限公司 | RTC power source circuit of digital wireless terminal |
CN104504874A (en) * | 2014-08-06 | 2015-04-08 | 广东群兴玩具股份有限公司 | Remote control buggy and buggy remote control system |
CN105281422A (en) * | 2015-10-09 | 2016-01-27 | 中国科学院声学研究所 | Method and circuit for automatically switching off power supply switch |
CN111491400A (en) * | 2020-05-08 | 2020-08-04 | 广东美的厨房电器制造有限公司 | Heating circuit, heating device and cooking equipment |
CN112034974A (en) * | 2020-08-22 | 2020-12-04 | 深圳市海曼科技股份有限公司 | Clock chip power supply switching method, device, terminal and medium |
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CN202282641U (en) * | 2011-11-07 | 2012-06-20 | 美的集团有限公司 | Power supply circuit for high-frequency ignition of integrated stove |
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CN104167807A (en) * | 2014-08-01 | 2014-11-26 | 科立讯通信股份有限公司 | RTC power source circuit of digital wireless terminal |
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