CN103577291A - System and method for testing power failure of embedded system - Google Patents
System and method for testing power failure of embedded system Download PDFInfo
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- CN103577291A CN103577291A CN201310560005.5A CN201310560005A CN103577291A CN 103577291 A CN103577291 A CN 103577291A CN 201310560005 A CN201310560005 A CN 201310560005A CN 103577291 A CN103577291 A CN 103577291A
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Abstract
The invention discloses a method for testing the power failure of an embedded system. The method comprises the steps that an embedded system terminal sends a power failure instruction to a power module according to power failure events; the embedded system terminal carries out a test case; the power module carries out power failure and electrification on the embedded system terminal according to the power failure instruction; the embedded system terminal carries out a checkout function. The invention further discloses a system for testing the power failure of the embedded system. Compared with a testing method with manual electrification and power failure in the prior art, the method has the advantages that the automation of power failure testing is achieved through operation of a testing module, the working efficiency is improved remarkably, the workloads of testing personnel are relieved, power failure points cover the whole process when the embedded system terminal carries out the test case in the process of carrying out the power failure events, and the power failure can be tested in the whole process.
Description
Technical field
The present invention relates to embedded system, relate in particular to a kind of power down test macro and method of embedded system.
Background technology
Embedded system is in application process, inevitably there will be the fortuitous events such as unexpected power down to occur, the reliability of product has just been proposed to higher requirement, this just needs us to simulate power loss condition and environment, with testing authentication product, whether can in the situation that surprisingly losing electric power, keep high reliability.The artificial power-on and power-off of the general employing of existing method of testing, labor intensive and time, efficiency is low, and power down dot coverage is very limited.
Summary of the invention
The technical matters that the present invention mainly solves is to provide a kind of power down test macro and method that realizes the embedded system of power down test automation.
For solving the problems of the technologies described above, the technical scheme that the present invention adopts is:
The power down test macro that a kind of embedded system is provided, comprising: test module, sends power down instructions according to power loss event to power module for controlling embedded system terminal; Execution module, for controlling embedded system terminal implementation of test cases; Power module, for carrying out power down and power on embedded system terminal according to power down instructions; Correction verification module, carries out verification function for controlling embedded system terminal.
Wherein, described test module specifically comprises:
The first judge module, for judging whether to receive the instruction of exiting power down test, if so, finishes test, if not, notifies the first execution module executable operations;
The first execution module, for obtaining current power loss event, then notifies the second judge module to carry out judgement;
Whether first the second judge module, for judging the operation of obtained power loss event, if so, notify the 4th execution module executable operations, if not, notifies described correction verification module executable operations, and after operation completes, notify the 3rd judge module to carry out judgement;
The 3rd judge module, for judging whether current power loss event completes the test of whole power down points, if so, notifies the 5th judge module to carry out judgement, if not, notifies the 4th judge module to carry out judgement;
The 4th judge module, for judging whether to receive initialization directive, if so, notifies the 7th execution module executable operations, if not, notifies the second execution module executable operations;
The second execution module, for execution time computing function, this function generates the power down instructions of this power loss event for add up according to power down time and the power down time interval, then notify the 3rd execution module executable operations;
The 3rd execution module, for carrying out described power supply instruction functions, this function, for sending described power down instructions to power module, is then notified described execution module and power module executable operations, and after operation completes, notifies the first judge module to carry out judgement;
The 4th execution module, for carrying out initialization function, then notifies the 5th execution module executable operations;
The 5th execution module, for sending power down instructions to described power module, the parameter that this power down instructions comprises power down and power-on time, then notifies described execution module and power module executable operations, and after operation completes, notifies the first judge module to carry out judgement;
The 5th judge module, for judging whether that all power loss event all complete test, if so, finishes test, if not, notifies the 6th execution module executable operations;
The 6th execution module, for obtaining next power loss event, then notifies the 7th execution module executable operations;
The 7th execution module, for carrying out initialization function, then notifies the second execution module executable operations.
Another technical solution used in the present invention is:
The power down method of testing that a kind of embedded system is provided, comprises step: embedded system terminal sends power down instructions according to power loss event to power module; Embedded system terminal implementation of test cases; Power module is carried out power down and powers on embedded system terminal according to power down instructions; Embedded system terminal is carried out verification function.
Wherein, described step " embedded system terminal sends power down instructions according to power loss event to power module " comprises the steps:
S1, judge whether to receive the instruction of exiting power down test, if so, finish test, if not, enter step S2;
S2, obtain current power loss event, then enter step S3;
First whether the power loss event that S3, judgement are obtained operation, if so, enters step S8, if not, carries out described step " embedded system terminal is carried out verification function ", then enters step S4;
S4, judge whether current power loss event completes the test of whole power down points, if so, enter step S10, if not, enter step S5;
S5, judge whether to receive initialization directive, if so, enter step S12, if not, enter step S6;
S6, execution time computing function, this function generates the power down instructions of this power loss event for add up according to power down time and the power down time interval, then enter step S7;
S7, carry out described power supply instruction functions, this function is for sending described power down instructions to power module, then carry out successively described step " embedded system terminal implementation of test cases " and " power module is carried out power down and powers on embedded system terminal according to power down instructions ", then enter step S1;
S8, execution initialization function, then enter step S9;
S9, to described power module, send power down instructions, the parameter that this power down instructions comprises power down and power-on time, then carry out described step " embedded system terminal implementation of test cases " and " power module is carried out power down and powers on embedded system terminal according to power down instructions ", then enter step S1;
S10, judge whether that all power loss event all complete test, if so, finish test, if not, enter step S11;
S11, obtain next power loss event, then enter step S12;
S12, execution initialization function, then enter step S6.
The invention has the beneficial effects as follows: with respect to adopting the method for testing manually powering on power down in existing technology, by the running of test module, realized the robotization of power down test, significantly improved work efficiency, alleviated tester's workload; And the whole process that the distribution of power down point is covered to embedded system terminal implementation of test cases in the process of carrying out power loss event, whole flow process all can measure power down.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the power down test macro of a kind of embedded system in an embodiment of the present invention;
Fig. 2 is the flowchart of the power down method of testing of a kind of embedded system in an embodiment of the present invention;
Fig. 3 is the concrete flowchart of step S2 in Fig. 2;
Fig. 4 is the structured flowchart of the power down test macro of a kind of embedded system in an embodiment of the present invention.
Main element symbol description:
100, embedded system terminal; 110, test module; 120, execution module; 130, authentication module;
200, power module; 210, first serial; 220, second serial; 230, the 3rd serial ports; 240, the first socket; 250, the second socket; 260, the 3rd socket.
Embodiment
By describing technology contents of the present invention, structural attitude in detail, being realized object and effect, below in conjunction with embodiment and coordinate accompanying drawing to be explained in detail.
Refer to Fig. 1, Fig. 1 is the structured flowchart of the power down test macro of embedded system, the power down test macro of this embedded system comprises and is contained in embedded system terminal 100 and power module 200, and embedded system terminal 100 comprises test module 110, execution module 120, correction verification module 130.
Execution module 120 is for controlling embedded system 100 end implementations of test cases eventually.
Correction verification module 130 is carried out verification function for controlling embedded system terminal 100.
Wherein, described test module 110 specifically comprises the first judge module, the first execution module, the second judge module, the 3rd judge module, the 4th judge module, the second execution module, the 3rd execution module, the 4th execution module, the 5th execution module, the 5th judge module, the 6th execution module, the 7th execution module.
The first judge module, for judging whether to receive the instruction of exiting power down test, if so, finishes test, if not, notifies the first execution module executable operations.
The first execution module is used for obtaining current power loss event, then notifies the second judge module to carry out judgement.
Whether first the second judge module, for judging the operation of obtained power loss event, if so, notifies the 4th execution module executable operations, if not, notifies described correction verification module executable operations, and after operation completes, notifies the 3rd judge module to carry out judgement.
The 3rd judge module, for judging whether current power loss event completes the test of whole power down points, if so, notifies the 5th judge module to carry out judgement, if not, notifies the 4th judge module to carry out judgement.
The 4th judge module is used for judging whether to receive initialization directive, if so, notifies the 7th execution module executable operations, if not, notifies the second execution module executable operations.
The second execution module is for execution time computing function, and this function generates the power down instructions of this power loss event for add up according to power down time and the power down time interval, then notify the 3rd execution module executable operations.
The 3rd execution module is used for carrying out described power supply instruction functions, and this function, for sending described power down instructions to power module, is then notified described execution module and power module executable operations, and after operation completes, notifies the first judge module to carry out judgement.
The 4th execution module is used for carrying out initialization function, then notifies the 5th execution module executable operations.
The 5th execution module is for sending power down instructions to described power module, and the parameter that this power down instructions comprises power down and power-on time, then notifies described execution module and power module executable operations, and after operation completes, notifies the first judge module to carry out judgement.
The 5th judge module is used for judging whether that all power loss event all complete test, if so, finishes test, if not, notifies the 6th execution module executable operations.
The 6th execution module is used for obtaining next power loss event, then notifies the 7th execution module executable operations.
The 7th execution module is used for carrying out initialization function, then notifies the second execution module executable operations.
With respect to adopting the method for testing manually powering on power down in existing technology, by the running of test module, realized the robotization of power down test, significantly improve work efficiency, alleviate tester's workload; And the whole process that the distribution of power down point is covered to embedded system terminal implementation of test cases in the process of carrying out power loss event, whole flow process all can measure power down.
Refer to Fig. 2, Fig. 2 is the flowchart of the power down method of testing of a kind of embedded system in an embodiment of the present invention.The power down method of testing of this embedded system comprises step:
Step S1, embedded system terminal send power down instructions according to power loss event to power module;
Step S2, embedded system terminal implementation of test cases;
Step S3, power module are carried out power down and power on embedded system terminal according to power down instructions;
Step S4, embedded system terminal are carried out verification function.
Refer to Fig. 3, Fig. 3 is the concrete flowchart of step S1 in Fig. 2.Described step S2 specifically comprises step:
S101, judge whether to receive the instruction of exiting power down test, if so, finish test, if not, enter step S102;
S102, obtain current power loss event, then enter step S103;
First whether S103, the power loss event obtained of judgement operation, if so, enters step S108, if not, carries out described step S4, enters step S104 after complete;
S104, judge whether current power loss event completes the test of whole power down points, if so, enter step S110, if not, enter step S105;
S105, judge whether to receive initialization directive, if so, enter step S112, if not, enter step S106;
S106, execution time computing function, this function generates the power down instructions of this power loss event for add up according to power down time and the power down time interval, then enter step S107;
S107, carry out described power supply instruction functions, this function, for sending described power down instructions to power module, is then carried out described step S2 and S3 successively, enters step S101 after complete;
S108, execution initialization function, then enter step S109;
S109, to described power module, send power down instructions, the parameter that this power down instructions comprises power down and power-on time, then carries out described step S2 and S3, enters step S101 after complete;
S110, judge whether that all power loss event all complete test, if so, finish test, if not, enter step S111;
S111, obtain next power loss event, then enter step S112;
S112, execution initialization function, then enter step S106.
In real work, the power down test macro of embedded system can be used for the power down test of the modules such as file system, parameter management, Pinpad, IC-card, radio-frequency card, magnetic card, printing device, Modem communication apparatus, wireless telecommunications system, Ethernet, WIFI, GPS, bluetooth, charactron.The power down of Pinpad module in TDES, 3DES ciphering process of take below further illustrates embodiments of the present invention as example.
Equipment power down in TDES, 3DES ciphering process, after heavily powering on, master key, working key should not lost, and should be able to normally use.Need the power loss event of test to have: TDES encrypts (using master key to carry out) and 3DES encrypts (using working key to carry out).
Above two power loss event are encrypted the time in 100ms left and right, so power down is set, are accumulated as 10ms, and after power down, time delay 20s powers on (electricity of also having a surplus after electricity under power supply, so need time delay), and test execution step is as follows:
1) obtaining current power loss event: TDES encrypts;
2) judge the whether first operation of this power loss event, if so, carry out initialization function: download master key; If not, carry out verification function: whether verification master key lose, whether available;
3) judge the whether test of complete all power down points of current power loss event, if so, enter next power loss event, perform step 10);
4) calculate power down time T 1=power down number of times * 10ms;
5) notice power module is carried out power down to Pinpad module after power down time T 1;
6) Pinpad module is carried out TDES encryption, if complete, record TDES power loss event and has tested;
7) power module is electric to carrying out under the Pinpad module execution in TDES encryption after power down time T 1;
8) power module is carried out and is powered on Pinpad module after 20s;
9) circulation step 1)～8);
10) obtaining current power loss event: 3DES encrypts;
11) judge the whether first operation of this power loss event, if so, carry out initialization function: download working key; If not, carry out verification function: whether verifying work key lose, whether available;
12) judge the whether test of complete all power down points of current event, if so, finish test;
13) calculate power down time T 2=power down number of times * 10ms;
14) notice power module is carried out power down to Pinpad module after power down time T 2;
15) Pinpad module is carried out 3DES encryption, if complete, record 3DES power loss event and has tested;
16) power module is electric to carrying out under the Pinpad module execution in 3DES power down after power down time T 2;
17) power module is carried out and is powered on Pinpad module after 20s;
18) circulation step 10)～17).
Because TDES encrypts, 3DES encrypts the execution time in 100ms left and right, if adopt the mode power down of manually cutting off the electricity supply, will be difficult to test power down in ciphering process; Adopt after power down Auto-Test System, the overall process power down point of encryption, can testedly arrive, and for automatically performing.
In addition, if the power loss event execution time is longer, for example, Modem communication apparatus is carried out dialer event needs the time of about 8 seconds, can be 500ms by the cumulative set of time of power down.
Refer to Fig. 4, Fig. 4 is the structured flowchart of power down test macro of the embedded system of one embodiment of the present invention.In the present embodiment, between embedded system terminal 100 and power module 200, adopt serial communication to transmit power down order, described power module 200 comprises first serial 210, second serial 220 and the 3rd serial ports 230, the setting of corresponding serial ports, power module 200 is also provided with the first socket 240, the second socket 250 and the 3rd socket 260, each serial ports can be controlled corresponding socket, each insert row is respectively an embedded system terminal 100 provides power supply to connect, and each serial ports is respectively used to receive the power down instructions that an embedded system terminal 100 is sent.In the present embodiment, each serial ports can receive the instruction of an embedded system terminal 100 to control the break-make of socket, and a power module 200 can support 3 embedded system terminal 100 to test simultaneously simultaneously, and testing efficiency improves greatly.
When carrying out power loss event, first serial 21, second serial 22 or the 3rd serial ports 23 receive the instruction of the power down after special time of embedded system terminal 100 transmissions; After instruction is sent completely, embedded system terminal 100 starts implementation of test cases; Arrive after described special time, power down, embedded system terminal 100 power-off are carried out in the first socket 24, the second socket 25 or the 3rd socket 26; After power-off certain hour, the first socket 24, the second socket 25 or the 3rd socket 26 are carried out and are powered on, embedded system terminal 100 telegrams in reply; After this, embedded system terminal 100 is carried out verification function, and it is default whether the implementation status of check test use-case meets.
The foregoing is only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or conversion of equivalent flow process that utilizes instructions of the present invention and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.
Claims (4)
1. a power down test macro for embedded system, is characterized in that, comprising:
Test module, sends power down instructions according to power loss event to power module for controlling embedded system terminal;
Execution module, for controlling embedded system terminal implementation of test cases;
Power module, for carrying out power down and power on embedded system terminal according to power down instructions;
Correction verification module, carries out verification function for controlling embedded system terminal.
2. the power down test macro of embedded system according to claim 1, is characterized in that: described test module specifically comprises:
The first judge module, for judging whether to receive the instruction of exiting power down test, if so, finishes test, if not, notifies the first execution module executable operations;
The first execution module, for obtaining current power loss event, then notifies the second judge module to carry out judgement;
Whether first the second judge module, for judging the operation of obtained power loss event, if so, notify the 4th execution module executable operations, if not, notifies described correction verification module executable operations, and after operation completes, notify the 3rd judge module to carry out judgement;
The 3rd judge module, for judging whether current power loss event completes the test of whole power down points, if so, notifies the 5th judge module to carry out judgement, if not, notifies the 4th judge module to carry out judgement;
The 4th judge module, for judging whether to receive initialization directive, if so, notifies the 7th execution module executable operations, if not, notifies the second execution module executable operations;
The second execution module, for execution time computing function, this function generates the power down instructions of this power loss event for add up according to power down time and the power down time interval, then notify the 3rd execution module executable operations;
The 3rd execution module, for carrying out described power supply instruction functions, this function, for sending described power down instructions to power module, is then notified described execution module and power module executable operations, and after operation completes, notifies the first judge module to carry out judgement;
The 4th execution module, for carrying out initialization function, then notifies the 5th execution module executable operations;
The 5th execution module, for sending power down instructions to described power module, the parameter that this power down instructions comprises power down and power-on time, then notifies described execution module and power module executable operations, and after operation completes, notifies the first judge module to carry out judgement;
The 5th judge module, for judging whether that all power loss event all complete test, if so, finishes test, if not, notifies the 6th execution module executable operations;
The 6th execution module, for obtaining next power loss event, then notifies the 7th execution module executable operations;
The 7th execution module, for carrying out initialization function, then notifies the second execution module executable operations.
3. a power down method of testing for embedded system, is characterized in that, comprises step:
Embedded system terminal sends power down instructions according to power loss event to power module;
Embedded system terminal implementation of test cases;
Power module is carried out power down and powers on embedded system terminal according to power down instructions;
Embedded system terminal is carried out verification function.
4. the power down method of testing of embedded system according to claim 3, is characterized in that: described step " embedded system terminal sends power down instructions according to power loss event to power module " comprises the steps:
S1, judge whether to receive the instruction of exiting power down test, if so, finish test, if not, enter step S2;
S2, obtain current power loss event, then enter step S3;
First whether the power loss event that S3, judgement are obtained operation, if so, enters step S8, if not, carries out described step " embedded system terminal is carried out verification function ", then enters step S4;
S4, judge whether current power loss event completes the test of whole power down points, if so, enter step S10, if not, enter step S5;
S5, judge whether to receive initialization directive, if so, enter step S12, if not, enter step S6;
S6, execution time computing function, this function generates the power down instructions of this power loss event for add up according to power down time and the power down time interval, then enter step S7;
S7, carry out described power supply instruction functions, this function is for sending described power down instructions to power module, then carry out successively described step " embedded system terminal implementation of test cases " and " power module is carried out power down and powers on embedded system terminal according to power down instructions ", then enter step S1;
S8, execution initialization function, then enter step S9;
S9, to described power module, send power down instructions, the parameter that this power down instructions comprises power down and power-on time, then carry out described step " embedded system terminal implementation of test cases " and " power module is carried out power down and powers on embedded system terminal according to power down instructions ", then enter step S1;
S10, judge whether that all power loss event all complete test, if so, finish test, if not, enter step S11;
S11, obtain next power loss event, then enter step S12;
S12, execution initialization function, then enter step S6.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107870271A (en) * | 2016-11-03 | 2018-04-03 | 珠海市杰理科技股份有限公司 | Automated testing method and device |
| CN109669826A (en) * | 2018-12-07 | 2019-04-23 | 天津津航计算技术研究所 | A kind of embedded system power on and off automatization test system |
| CN112542200A (en) * | 2020-12-30 | 2021-03-23 | 深圳市芯天下技术有限公司 | Method and device for checking power-on parameters of nonvolatile flash memory, storage medium and terminal |
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| CN101170791A (en) * | 2007-11-29 | 2008-04-30 | 中兴通讯股份有限公司 | An industrial installation device for testing automatic power on and off |
| CN103364650A (en) * | 2012-04-06 | 2013-10-23 | 鸿富锦精密工业（深圳）有限公司 | Testing system and testing method |
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| CN101170791A (en) * | 2007-11-29 | 2008-04-30 | 中兴通讯股份有限公司 | An industrial installation device for testing automatic power on and off |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107870271A (en) * | 2016-11-03 | 2018-04-03 | 珠海市杰理科技股份有限公司 | Automated testing method and device |
| CN109669826A (en) * | 2018-12-07 | 2019-04-23 | 天津津航计算技术研究所 | A kind of embedded system power on and off automatization test system |
| CN112542200A (en) * | 2020-12-30 | 2021-03-23 | 深圳市芯天下技术有限公司 | Method and device for checking power-on parameters of nonvolatile flash memory, storage medium and terminal |
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