CN103532561A - Switching circuit for improving frequency voltage conversion linearity - Google Patents
Switching circuit for improving frequency voltage conversion linearity Download PDFInfo
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- CN103532561A CN103532561A CN201310502017.2A CN201310502017A CN103532561A CN 103532561 A CN103532561 A CN 103532561A CN 201310502017 A CN201310502017 A CN 201310502017A CN 103532561 A CN103532561 A CN 103532561A
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Abstract
The invention relates to a switching circuit for improving frequency voltage conversion linearity. The switching circuit comprises a comparator U1, a schmidt trigger U2, a rising delay trigger U3, a trigger U4, a phase inverter U5, an or gate U6, a counting frequency divider U7, a phase inverter U 8, a voltage regulator tube Z1, a crystal oscillator Q1 and a jumper K1. The circuit adopts a crystal oscillating circuit, a D trigger, a frequency divider and an available gate circuit to realize conversion between a frequency signal and a voltage signal, and the cost is lower; the crystal oscillator generates a standard timing benchmark, integral time in all frequency periods is kept consistent through the frequency divider and is not changed with amplitude and frequency of an input signal, and accordingly, the linearity of conversion between frequency and voltage is guaranteed.
Description
Technical field
The invention belongs to engine electric-controlled system field, be specifically related to a kind of change-over circuit of pressing transfer linearity degree frequently that improves.
Background technology
In engine electric-controlled system, frequency signal need to be converted to voltage signal, generally adopt the conversion of the direct settling signal of mode of first-order filtering; Sometimes in order to improve frequency signal to the linearity of voltage signal conversion, adopt special-purpose chip to complete.The mode that adopts first-order filtering directly to complete conversion can convert corresponding voltage signal to frequency signal, but can not guarantee the linearity of conversion, voltage signal strengthens with signal frequency, but can not form the relation of direct ratio, and signals collecting and computational accuracy are difficult to ensure card; Adopt special chip to complete frequency signal to the conversion of voltage signal, can guarantee proportional relation between the two, the linearity also can guarantee, but the cost of chip is higher, and the operating frequency range of conversion is generally limited.
Summary of the invention
The present invention provides a kind of change-over circuit of pressing transfer linearity degree frequently that improves in order to solve problems of the prior art.
Technical scheme of the present invention: a kind of change-over circuit of pressing transfer linearity degree frequently that improves, trigger U3, trigger U4, inverter U5 or door U6, frequency-dividing counter U7, inverter U8, voltage-stabiliser tube Z1, crystal oscillator Q1, jumper K1 while comprising comparator U1, Schmidt trigger U2, rising edge, input signal IN is connected with resistance R 1, the other end of R1 is with the negative pole of capacitor C 1, voltage-stabiliser tube Z1, one end of resistance R 2 is connected, and the positive pole of the other end of capacitor C 1, voltage-stabiliser tube Z1 is connected to GND; The other end of resistance R 2 is connected with one end of the positive output end of U1 3 pin, resistance R 5, and the other end of resistance R 5 is connected to output 1 pin, one end of resistance R 6, the input of U2 1 pin of U1, and the other end of resistance R 6 connects VCC; Negative input end 2 pin of U1 are connected with the common port of resistance R 3, R4, and one end of resistance R 4 is connected to GND, and the other end of resistance R 3 is connected to VCC, and 8 pin of U1 are connected to VCC, and 4 pin of U1 are connected to GND; Output 2 pin of U2 and the CLK of U3 are connected, and the D pin of U3 is connected to VCC, and the S pin of U3 is connected to GND, and the Q pin of U3 is connected to the D pin of U4, and the R pin of U3 is connected to the RST pin of the Q pin of U4, U7; The S pin that the R pin of U4 is connected to GND, U4 is connected to GND, and the CLK pin of U4 is connected to one end, one end of resistance R 7, input 1 pin of the output of U5 2 pin, U2 of resistance R 8; Another pin of R8 is connected to a pin of Q1, a pin of C3, and another pin of R7 is connected to a pin of another pin of Q1, C2, input 1 pin of U5, and another pin of C2, C3 is connected to GND; 2 pin of U6 are connected to input 1 pin of U8,1～5 pin of K1, and 3 pin of U6 are connected to the CLK pin of U7; Q1～Q5 pin of U7 is connected with 6～10 pin of K1 respectively, and the GND pin of U7 is connected to GND, and the VCC pin of U7 is connected to VCC; Output 2 pin of U8 are connected with resistance R 9 one end, and the other end of R9 is connected to one end, the output OUT of capacitor C 4, and the other end of capacitor C 4 is connected to GND.
Beneficial effect of the present invention: this circuit adopts crystal oscillating circuit, d type flip flop, frequency divider and general gate circuit to realize frequency signal to the conversion of voltage signal, and cost is lower; Crystal oscillator produces the timing benchmark of standard, by frequency divider, is consistent the time of integration in each frequency period, does not follow that input signal obtains amplitude and frequency converts, and assurance frequency is to the linearity of voltage transitions; Frequency divider is connected with jumper, by selecting different on off states, inversion frequency can be adjusted according to scope, and whole operating frequency range is wide, can meet the demand for control of engine electric-controlled system.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of voltage stabilizing circuit of the present invention;
Fig. 2 is circuit signal figure of the present invention.
Embodiment
As shown in Figure 1, this change-over circuit input signal IN is connected with resistance R 1, and the other end of R1 is with the negative pole of capacitor C 1, voltage-stabiliser tube Z1, one end of resistance R 2 is connected, and the positive pole of the other end of capacitor C 1, voltage-stabiliser tube Z1 is connected to GND; The other end of resistance R 2 is connected with one end of the positive output end of U1 3 pin, resistance R 5, and the other end of resistance R 5 is connected to output 1 pin, one end of resistance R 6, the input of U2 1 pin of U1, and the other end of resistance R 6 connects VCC; Negative input end 2 pin of U1 are connected with the common port of resistance R 3, R4, and one end of resistance R 4 is connected to GND, and the other end of resistance R 3 is connected to VCC, and 8 pin of U1 are connected to VCC, and 4 pin of U1 are connected to GND; Output 2 pin of U2 and the CLK of U3 are connected, and the D pin of U3 is connected to VCC, and the S pin of U3 is connected to GND, and the Q pin of U3 is connected to the D pin of U4, and the R pin of U3 is connected to the RST pin of the Q pin of U4, U7; The S pin that the R pin of U4 is connected to GND, U4 is connected to GND, and the CLK pin of U4 is connected to one end, one end of resistance R 7, input 1 pin of the output of U5 2 pin, U2 of resistance R 8; Another pin of R8 is connected to a pin of Q1, a pin of C3, and another pin of R7 is connected to a pin of another pin of Q1, C2, input 1 pin of U5, and another pin of C2, C3 is connected to GND; 2 pin of U6 are connected to input 1 pin of U8,1～5 pin of K1, and 3 pin of U6 are connected to the CLK pin of U7; Q1～Q5 pin of U7 is connected with 6～10 pin of K1 respectively, and the GND pin of U7 is connected to GND, and the VCC pin of U7 is connected to VCC; Output 2 pin of U8 are connected with resistance R 9 one end, and the other end of R9 is connected to one end, the output OUT of capacitor C 4, and the other end of capacitor C 4 is connected to GND.
The sine wave signal of transducer output is input to the input IN of this change-over circuit, by filter circuit R1, C1, carries out filtering processing, and high-frequency interferencing signal is carried out to filtering processing; By zener diode Z1, carry out amplitude limiting processing afterwards, guarantee that the signal V1 that enters comparator U1 by current-limiting resistance R2 is no more than the higher limit of comparator.Divider resistance R3, R4 form relatively threshold voltage signal V2, and signal V1 and V2 are by comparator U1 output square-wave signal V3 to Schmidt trigger U2, and the relatively formation hysteresis voltage of feedback resistance R5 to V1, V2, prevents circuit oscillation; Pull-up resistor R6 arranges in order to meet the open circuit output of comparator U1.Schmidt trigger U2 carries out to square-wave signal V3 the square-wave signal V4 that regular processing forms standard, and V4 is as the clock CLK signal of d type flip flop, and when rising edge, the output Q of trigger U3 exports high level V5.Capacitor C 3, C2, crystal oscillator Q1 and current-limiting resistance R8, false-touch prevention generating resistance R7, inverter U5 form the concentrated signal V6 that oscillating circuit is exported whole operating circuit; V6 signal is as the clock CLK signal of d type flip flop U4, and at the output Q of trigger U4 output high level V7, V7 is input to the reset terminal RST of frequency-dividing counter U7, makes the output Q1(of U7 or Q2, Q3, Q4, Q5) output low level signal V8; V7 high level signal feeds back to again the reset terminal R of d type flip flop U3 simultaneously, at the next rising edge of signal V6, makes d type flip flop U4 output signal V7 become low level; Clock signal V6 by or a door U6 be input to count splitter CLK end and start counting, during counting, the output Q1(of frequency-dividing counter U7 or Q2, Q3, Q4, Q5) output low level signal V8 always, V8 signal charges to integrating capacitor C4 by inverter U8, integrating resistor R9; After U7 has counted, output Q1(or Q2, Q3, Q4, Q5) output high level signal V8, stop the charging process to integrating capacitor C4, till this state is continued until when the next rising edge of V4 arrives, complete the integral process of a frequency period.Output Q1, Q2, Q3, Q4, the Q5 of U7 counting are connected with jumper K1 according to changed operating frequency range, to meet the frequency of wide region, press conversion demand, U7 utilizes reference frequency signal V6 to guarantee that the electric time of depositing of every frequency period is T, guarantees that voltage and the operating frequency changed are proportional.
Claims (1)
1. one kind is improved the change-over circuit of pressing transfer linearity degree frequently, trigger U3, trigger U4, inverter U5 or door U6, frequency-dividing counter U7, inverter U8, voltage-stabiliser tube Z1, crystal oscillator Q1, jumper K1 while comprising comparator U1, Schmidt trigger U2, rising edge, it is characterized in that input signal IN is connected with resistance R 1, the other end of R1 is with the negative pole of capacitor C 1, voltage-stabiliser tube Z1, one end of resistance R 2 is connected, and the positive pole of the other end of capacitor C 1, voltage-stabiliser tube Z1 is connected to GND; The other end of resistance R 2 is connected with one end of the positive output end of U1 3 pin, resistance R 5, and the other end of resistance R 5 is connected to output 1 pin, one end of resistance R 6, the input of U2 1 pin of U1, and the other end of resistance R 6 connects VCC; Negative input end 2 pin of U1 are connected with the common port of resistance R 3, R4, and one end of resistance R 4 is connected to GND, and the other end of resistance R 3 is connected to VCC, and 8 pin of U1 are connected to VCC, and 4 pin of U1 are connected to GND; Output 2 pin of U2 and the CLK of U3 are connected, and the D pin of U3 is connected to VCC, and the S pin of U3 is connected to GND, and the Q pin of U3 is connected to the D pin of U4, and the R pin of U3 is connected to the RST pin of the Q pin of U4, U7; The S pin that the R pin of U4 is connected to GND, U4 is connected to GND, and the CLK pin of U4 is connected to one end, one end of resistance R 7, input 1 pin of the output of U5 2 pin, U2 of resistance R 8; Another pin of R8 is connected to a pin of Q1, a pin of C3, and another pin of R7 is connected to a pin of another pin of Q1, C2, input 1 pin of U5, and another pin of C2, C3 is connected to GND; 2 pin of U6 are connected to input 1 pin of U8,1～5 pin of K1, and 3 pin of U6 are connected to the CLK pin of U7; Q1～Q5 pin of U7 is connected with 6～10 pin of K1 respectively, and the GND pin of U7 is connected to GND, and the VCC pin of U7 is connected to VCC; Output 2 pin of U8 are connected with resistance R 9 one end, and the other end of R9 is connected to one end, the output OUT of capacitor C 4, and the other end of capacitor C 4 is connected to GND.
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| CN201310502017.2A CN103532561B (en) | 2013-10-23 | 2013-10-23 | A kind of frequency that improves presses the change-over circuit of transfer linearity degree |
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| CN201310502017.2A CN103532561B (en) | 2013-10-23 | 2013-10-23 | A kind of frequency that improves presses the change-over circuit of transfer linearity degree |
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| CN103532561B CN103532561B (en) | 2016-08-31 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105632448A (en) * | 2016-04-01 | 2016-06-01 | 北京爱格信达科技有限公司 | Signal automatic transformation device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10242756A (en) * | 1997-02-27 | 1998-09-11 | Kinseki Ltd | Voltage control circuit and temperature compensation piezoelectric oscillator using it |
| US20040155804A1 (en) * | 2001-03-21 | 2004-08-12 | Fujitsu Limited | Reducing jitter in mixed-signal integrated circuit devices |
| CN102437727A (en) * | 2011-12-26 | 2012-05-02 | 杭州矽力杰半导体技术有限公司 | Boost power factor correction (PFC) controller |
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2013
- 2013-10-23 CN CN201310502017.2A patent/CN103532561B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10242756A (en) * | 1997-02-27 | 1998-09-11 | Kinseki Ltd | Voltage control circuit and temperature compensation piezoelectric oscillator using it |
| US20040155804A1 (en) * | 2001-03-21 | 2004-08-12 | Fujitsu Limited | Reducing jitter in mixed-signal integrated circuit devices |
| CN102437727A (en) * | 2011-12-26 | 2012-05-02 | 杭州矽力杰半导体技术有限公司 | Boost power factor correction (PFC) controller |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105632448A (en) * | 2016-04-01 | 2016-06-01 | 北京爱格信达科技有限公司 | Signal automatic transformation device |
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