CN103529381A - IC with programmable fuse - Google Patents
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- CN103529381A CN103529381A CN201310349632.4A CN201310349632A CN103529381A CN 103529381 A CN103529381 A CN 103529381A CN 201310349632 A CN201310349632 A CN 201310349632A CN 103529381 A CN103529381 A CN 103529381A
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Abstract
The present invention relates to a programmable integrated circuit and a fuse protection method, the IC can be re-induced expansion of JTAG operations can have been banned. The apparatus includes a JTAG control chain, a feature fuse, a machine specific register, and an access controller. The JTAG control chain is configured to enable/disable the extended JTAG operations. The feature fuse is configured to indicate whether the extended JTAG features are to be disabled. The machine specific register is configured to store a value therein. The access controller is coupled to the feature fuse, the machine specific register, and the JTAG control chain, and is configured to determine that the feature fuse is blown, and is configured to direct the JTAG control chain to enable the precluded extended JTAG operations if the value matches an override value within the access controller during a period that the value is stored within the machine specific register. The present invention can prevent unauthorized users from tampering with state fuse fuse array.
Description
The application is to be that on 05 06th, 2011, application number are dividing an application of 201110117356.X, the denomination of invention application that is " having integrated circuit and the guard method thereof of programmable fuse " the applying date.
Technical field
The present invention is relevant for a kind of microelectronics, particularly relevant for a kind of device and method, in order to the programmable fuse array in Protective IC (programmable fuse array)
Background technology
In current integrated circuit, the fuse mostly consisting of metal or polymkeric substance, comes some elements of activation and forbidden energy or feature, and wherein fuse is arranged on the chip of integrated circuit.Generally speaking in the manufacture process of ， factory, by blowing some fuse, to produce the device of a particular version.For example, in the general design of microprocessor, microprocessor may have a ciphering unit or other protection feature, and wherein ciphering unit or protection feature are all arranged on chip, and just can activation ciphering unit and protection feature by blowing some fuse.By fuse activation or forbidden energy particular element or feature, the cost that not only can meet while manufacturing microprocessor is considered, and also can make fabricator more easily produce the microprocessor with different performance and price simultaneously.
Yet, in recent years, the deviser of integrated circuit not only can be in the process of manufacturing the above-mentioned feature of activation/forbidden energy, also can be after manufacture completes, by blowing some fuse with feature to be selected in the practical application of activation/forbidden energy.In the similar structure of majority, the sequencing of fuse can be passed through from existing joint test (the Joint Test Action Group of working group; JTAG) interface/agreement sends particular command and data realize.Jtag interface/agreement is present in microprocessor, mobile phone, chip or other device.By transmitting suitable order and data, or by the voltage in the specialized range on specific encapsulation pin, can select and blow the specific insurance silk on chip, with feature to be selected in activation or forbidden energy practical application.
Along with increasing feature can be made uncommitted user under not agreeing to through fabricator by programming operations, have an opportunity to reconfigure integrated circuit.
Therefore, need a device and method, in order to prevent that sequencing fuse in uncommitted ground is with activation or forbidden energy feature originally.
In addition, need a device and method, in order to judge whether that uncommitted user's attempt alters the programmable feature of device, and prevent that it from altering.
Moreover, need a kind of technology, make fabricator can be temporarily the programmable functions of activation one device again, to allow authorized activation or forbidden energy Partial Feature.
Summary of the invention
The object of the invention is to solve above-mentioned proposed problem and other problem, shortcoming and existing restriction.
The invention provides a kind of preferably technology, in order to a JTAG operation of expanding of forbidding using in an integrated circuit.The invention provides a kind of integrated circuit, the JTAG of the forbidden expansion of activation operation again.Integrated circuit of the present invention comprises a JTAG Quality Initiative, a feature fuse, a machine-specific working storage and an access controller.JTAG Quality Initiative can activation/JTAG operation that forbidden energy expands.Whether feature fuse is disabled in order to the JTAG operation that represents to expand.Machine-specific working storage is in order to store a particular value.Whether access controller couples feature fuse, machine-specific working storage and JTAG Quality Initiative and is blown in order to judging characteristic fuse.When the particular value in machine-specific working storage meets a coverage values of access controller, access controller makes the JTAG operation of the forbidden expansion of activation again of JTAG Quality Initiative.
The present invention separately provides a kind of activation method, in order to the JTAG operation of activation forbidden expansion in an integrated circuit again.Activation method of the present invention comprises, by blowing a feature fuse, with the JTAG operation that represents to expand, is disabled, and wherein feature fuse is arranged in integrated circuit; Carry out one first judgement action, in order to judge whether this feature fuse is blown; Carry out one second judgement action, in order to judge whether a particular value meets a coverage values, wherein above-mentioned particular value is stored in a machine-specific working storage; And when particular value meets coverage values, make the JTAG Quality Initiative JTAG operation of the forbidden expansion of activation again.
The invention provides a kind of preferably technology, in order to a JTAG operation of expanding of forbidding using in an integrated circuit.Can pass through blowout, the JTAG operation that activation/forbidden energy expands.For achieving the above object, the invention provides a kind of integrated circuit, in order to the JTAG operation of forbidding expanding.Integrated circuit of the present invention comprises a JTAG Quality Initiative, a feature fuse and an access controller.The JTAG operation that JTAG Quality Initiative activation/forbidden energy expands.The JTAG operation of feature fuse in order to represent whether forbidden energy expands.Access controller couples feature fuse and JTAG Quality Initiative, in order to judging characteristic fuse, whether is blown, and the JTAG operation that JTAG Quality Initiative forbidden energy is expanded.
The present invention separately provides a kind of method of forbidding, in order to forbid the JTAG operation of the expansion in an integrated circuit.Of the present inventionly forbid that method comprises, by blowing a feature fuse, with the JTAG operation that represents whether forbidden energy expands, wherein above-mentioned feature fuse is arranged in this integrated circuit; Whether judging characteristic fuse is blown; And when above-mentioned feature fuse has been blown, the JTAG operation that a JTAG Quality Initiative forbidden energy is expanded.
The invention provides a kind of preferably technology, in order to a JTAG operation of expanding of forbidding using in an integrated circuit.By blowout, the JTAG operation that activation/forbidden energy expands.For achieving the above object, the invention provides a kind of integrated circuit, in order to forbid the JTAG operation of an expansion.Integrated circuit of the present invention comprises, a JTAG Quality Initiative, a feature fuse, a magnitude of voltage detector and an access controller.The JTAG operation that the activation of JTAG Quality Initiative or forbidden energy expand.Feature fuse represents whether the JTAG operation of expanding is disabled.Magnitude of voltage detector is monitored an external voltage signal, in order to judge that whether external voltage signal is in a defective magnitude of voltage.Access controller couples feature fuse, magnitude of voltage detector and JTAG Quality Initiative, and whether judging characteristic fuse is blown.As long as external voltage signal is in this defective magnitude of voltage, no matter whether feature fuse is blown, access controller operates the JTAG that JTAG Quality Initiative forbidden energy expands.
The present invention separately provides a kind of method of forbidding, in order to the JTAG operation of forbidding that one in an integrated circuit expands, this forbids that method comprises: by blowing a feature fuse, with the JTAG operation that represents to expand, be disabled, wherein feature fuse is arranged in integrated circuit; Carry out one first judgement action, in order to judge that whether an external voltage signal is in a defective magnitude of voltage; Carry out one second judgement action, in order to judging characteristic fuse, whether be blown; When external voltage signal is during in this defective magnitude of voltage, the JTAG operation that makes a JTAG Quality Initiative forbidden energy expand; And when external voltage signal is during in a qualified voltage value, and feature fuse is blown, the JTAG operation that makes JTAG Quality Initiative forbidden energy expand.
The present invention separately provides a kind of integrated circuit, and in order to forbid the use of the JTAG operation of an expansion, this integrated circuit comprises: a JTAG Quality Initiative, in order to the JTAG operation of activation or this expansion of forbidden energy, one feature fuse, in order to represent whether the JTAG operation of this expansion is disabled, one magnitude of voltage detector, in order to monitor an external voltage signal, and in order to judge that whether this external voltage signal is in a qualified voltage value, one access controller, couple this feature fuse, this magnitude of voltage detector and this JTAG Quality Initiative, this access controller is in order to judge whether this feature fuse is blown, and when this feature fuse has been blown, this access controller uses so that the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy, and when this external voltage signal is during in a defective magnitude of voltage, no matter whether this feature fuse is blown, this access controller uses so that the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy, and one blow controller, couple a fuse array, in order to receive this external voltage signal, and according to the magnitude of voltage of this external voltage signal, blow the selecteed fuse in this fuse array, wherein this blows controller and when the JTAG of this expansion operation is enabled, blows this selecteed fuse.
The present invention separately provides a kind of integrated circuit, and in order to forbid the use of the JTAG operation of an expansion, this integrated circuit comprises: a JTAG Quality Initiative, in order to the JTAG operation of activation or this expansion of forbidden energy; One feature fuse, in order to represent whether the JTAG operation of this expansion is disabled; One magnitude of voltage detector, in order to monitor an external voltage signal, and in order to judge that whether this external voltage signal is in a defective magnitude of voltage; An and access controller, couple this feature fuse, this magnitude of voltage detector and this JTAG Quality Initiative, this access controller is in order to judge whether this feature fuse is blown, and when this external voltage signal is during in this defective magnitude of voltage, no matter whether this feature fuse is blown, this access controller uses so that the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy.
The present invention separately provides a kind of integrated circuit, it is characterized in that, in order to the use of the JTAG operation that activation forbidden is expanded again, this integrated circuit comprises: a JTAG Quality Initiative, in order to the JTAG operation of activation or this expansion of forbidden energy; One feature fuse, in order to represent whether the JTAG operation of this expansion is disabled; One magnitude of voltage detector, in order to monitor an external voltage signal, and in order to judge that whether this external voltage signal is in a qualified voltage value; One machine-specific working storage, in order to store a particular value; An and access controller, couple this feature fuse, this magnitude of voltage detector, this machine-specific working storage and this JTAG Quality Initiative, this access controller is in order to judge whether this feature fuse is blown, and when this external voltage signal is when in this qualified voltage value and in this particular value is stored in the time cycle in this machine-specific working storage, this particular value meets a coverage values of this access controller, this access controller is with so that the JTAG operation of this this expansion of JTAG Quality Initiative activation.
The present invention can avoid undelegated user to alter the fuse state of fuse array.
Accompanying drawing explanation
Fig. 1 is the schematic diagram with the microprocessor of fuse activation function.
Fig. 2 is the schematic diagram of protecting the microprocessor of programmable fuse array of the present invention.
Fig. 3 is the schematic diagram with the device of the programmable fuse array that prevents from altering function of the present invention.
Fig. 4 is a process flow diagram of guard method of the present invention.
Fig. 5 is the schematic diagram that activation again of the present invention has the fuse array that prevents from altering function.
Being simply described as follows of symbol in accompanying drawing:
100,200,300,500: microprocessor
101,201,301,501: fuse array
102,202,302,502: crypto engine
103,203,303,503: protection feature
105,205,305,505: activation logic element
106,206,306,506: microcode reservoir
107,207,307,507: blow controller
108,208,308,508:JTAG Quality Initiative
109,209,309,509:JTAG bus interface element
110,210,310,510: connecting leads
211,311,511: feature fuse
212,312,512: access controller
313,513: magnitude of voltage detector
401～408: step
521: machine-specific working storage.
Embodiment
For the features and advantages of the present invention can be become apparent, cited below particularlyly go out preferred embodiment, and coordinate appended graphicly, be described in detail below.
Fig. 1 is the schematic diagram with the microprocessor of fuse activation function.As shown in the figure, microprocessor 100 has a fuse array 101, and fuse array 101 couples one or more activation logic elements 105.Each activation logic element 105 provides a disable signal DIS to give characteristic of correspondence element 102-103, as crypto engine (cryptography engine) 102 or other protection feature 103.
JTAG Quality Initiative 108 couples microcode reservoir 106.Microcode reservoir 106 may comprise that a storage temporary is (as random access memory ram, working storage ... etc.), a nonvolatile reservoir is (as read only memory ROM, fixing programmable logic cells ... etc.) or comprise the combination of storage temporary and nonvolatile reservoir.By existing mechanism, can provide the logic element that gives microprocessor 100 by the stored microcode (or micro-order) of microcode reservoir 106, in order to the operation of executive routineization order.General logic element comprises crypto engine 102 and protection feature 103, but also may comprise that the hardware, power management hardware of memory cache, specific purpose or other can be enabled or the element of forbidden energy.Logic element can directly be carried out microcode and carry out programming operations, or by contact element (associated element) (not shown), carries out microcode and carry out operation logic element.
As mentioned above, in the manufacture process of microprocessor 100, can be by some fuse in laser or other method blowout array 101, to represent whether corresponding protection feature 103 and/or crypto engine 102 are disabled.Therefore,, when microprocessor 100 is activated, each activation logic element 105 judges the state of the fuse of fuse array 101 interior correspondences, and can trigger the disable signal DIS of a correspondence.Disable signal DIS is in order to the corresponding crypto engine 102 of forbidden energy and protection feature 103.Therefore, generally speaking, the state of the fuse of the fuse array 101 by microprocessor itself, definable goes out many microprocessors with different characteristic.For example, when all fuses are blown with crypto engine 102 corresponding to forbidden energy and protection feature 103, definable goes out the microprocessor of low usefulness.On the contrary, when the fuse of all crypto engines 102 of correspondence and protection feature 103 is not blown, definable goes out dynamical microprocessor.
As mentioned above, in the process of conventionally manufacturing at microprocessor 100 (in encapsulation (packaging) before), the fuse state of fuse array 101 has just been set.Yet, recent years, it is more welcome allowing the microprocessor of optionally activation or forbidden energy crypto engine 102 and protection feature 103.Therefore, the invention provides programmable functions, be enough to meet demand in the market.For example, a fuse being blown may represent crypto engine 102 and protection feature 103 activations or forbidden energy.Crypto engine 102 or protection feature 103 may have a plurality of fuses that are associated, in order to allow activation and the forbidden energy of certain number of times.
Those skilled in the art all know very well, jtag bus JT[1:N] in order to test and sequencing microprocessor 100.JTAG is the abbreviation of joint test working group (Joint Test Action Group), its be a kind of in this area widely used common standard, in order to microprocessor is carried out to boundary scan (boundary scan) and test access (test access), especially for the test and evaluation of microprocessor.Therefore, jtag bus JT[1:N] state by a test cell, a debugger (debugger) or microprocessor 100 outsides other similarly device institute controlled.Jtag bus interface element 109 receives by jtag bus JT[1:N] transmit and next JTAG order (commands), and received order is sent to JTAG Quality Initiative 108, wherein JTAG Quality Initiative 108 couple microprocessor 100 interior nearly all can testing element (testableelement).
Generally speaking, JTAG order is in order to test circuit and the element of microprocessor 100 inside.Yet, because JTAG structure, order and relevant apparatus are to belong to common, therefore, circuit designers is normal use of expanding JTAG technology recently, in order to test other operation in addition, the checking of the checking that comprises microcode reservoir 106 Program microcodes and fuse array 101 Program fuse states to be provided.In order to complete these operations, the JTAG order being associated is transferred into JTAG Quality Initiative 108, then by bus RDCODE, is sent to microcode reservoir 106, and is sent to fuse array 101 by bus RDARRAY.In addition, recycle an external testing unit (external test unit) (not shown) and read the fuse state in fuse array 101, and read the stored microcode of microcode reservoir 106.
Except reading fuse array 101 and microcode reservoir 106, JTAG order can microprocessor is manufactured complete after, some fuse being used in blowout array 101.Therefore, blow data by jtag bus JT[1:N] be sent to JTAG Quality Initiative 108, and be sent to fuse array 101 by bus RDARRAY.Then, by setting, be coupled to the magnitude of voltage on the connecting leads 110 of signal FSOURCE, just can allow and blow controller 107 and blow some fuse.For blowout, suitable blow data and can pass through jtag bus JT[1:N], via bus RDARRAY, be sent to fuse scan chain, then blow order meeting by jtag bus JT[1:N] transmit, make chip enter the state that allows blowout.The voltage of signal FSOURCE is set at a suitable magnitude of voltage, and maintains one section of Preset Time of this magnitude of voltage, and blowing controller 107 just can be according to the magnitude of voltage of signal FSOURCE, the fuse in blowout array 101.
Generally speaking, in system board (not shown), the voltage of signal FSOURCE is VSS, and wherein VSS is generally 0V or ground voltage.This voltage must be enough to allow activation logic element 105 and JTAG Quality Initiative 108 read the state of fuse array 101.For blowout, the magnitude of voltage of signal FSOURCE can be promoted to a preset value, and its kind by process technique and fuse (as metal or polymkeric substance) determines.When the manufacture of a chip is during according to 90nm process technique, the magnitude of voltage of signal FSOURCE is about 3.5V.If the manufacture of chip is during according to 65nm process technique, the magnitude of voltage of signal FSOURCE is about 1.7V.
Therefore, no matter be that current microprocessor 100 is to have sizable elasticity in programmable functions in the field of manufacturing or applying.This structural elasticity can make fabricator and system designer utilize more efficiently common structure, under different cost requirements, produces the device with different performance.Above-mentioned structure also can make microprocessor 100 at electronic circuit flaggy (board level), that is after completing manufacture, encapsulate and transport (shipped), can increase the function of selected execution newly.
For the distant view of product, such elasticity is useful, but the function that its shortcoming is product is easily altered by uncommitted operation.That is to say, above-mentioned structure allows directly activation/forbidden energy feature member 102 and 103 of authorized user.But meanwhile, uncommitted user also can use identical activation method.Uncommitted user can pass through jtag bus JT[1:N] and signal FSOURCE, read the stored microcode of microcode reservoir 106, and read the state of fuse array 101.Uncommitted user also can be blown some fuse, in order to activation or some feature member 102 and 103 of forbidden energy.
In current integrated circuit, many functions and element are all relevant with the activation method of fuse.In the present embodiment, the device and method providing can be avoided this uncommitted altering.
The present invention also provides a kind of mechanism, in order to detect and to prevent that unwarranted user from carrying out the operation of the access JTAG outside normal boundary scan function, to overcome restriction and the shortcoming that can pass through at present the integrated circuit structure of some features of programmable fuse activation/forbidden energy.To describe the present invention in detail by Fig. 2 to Fig. 5 after a while.
Fig. 2 is the schematic diagram of protecting the microprocessor of programmable fuse array of the present invention.The microprocessor 200 of Fig. 2 is similar in appearance to the microprocessor 100 of Fig. 1.Microprocessor 200 has a fuse array 201.Fuse array 201 couples one or more activation logic elements 205.Each activation logic element 205 provides a disable signal DIS to give corresponding feature member 202-203, as crypto engine 202 or other protection feature 203.
JTAG Quality Initiative 208 couples microcode reservoir 206.Microcode reservoir 206 may comprise that a temporary reservoir is (as random access memory ram, working storage ... etc.), a nonvolatile reservoir is (as read only memory ROM, fixing programmable logic cells ... etc.) or comprise the combination of temporary reservoir and nonvolatile reservoir.By existing mechanism, can provide the logic element that gives microprocessor 200 by the stored microcode (or micro-order) of microcode reservoir 206, in order to the operation of executive routineization order.Logic element comprises crypto engine 202 and protection feature 203, but also may comprise that the hardware, power management hardware of memory cache, specific purpose or other can be enabled or the element of forbidden energy.These logic elements can directly be carried out microcode and carry out programming operations, or by contact element (associated element) (not shown), carry out microcode and carry out operation logic element.
As mentioned above, in the manufacture process of microprocessor 200, can be by some fuse in laser or other method blowout array 201, in order to activation or forbidden energy some protection feature 203 and/or crypto engine 202.Therefore, when microprocessor 200 is activated or is reset, the fuse state of each activation logic element 205 judgement fuse array 201, and can trigger corresponding disable signal DIS, in order to the corresponding crypto engine 202 of forbidden energy and protection feature 203.
One fuse blowing may represent that some feature member 202,203 is enabled or is disabled.One feature member 202,203 may have a plurality of fuses that are associated, in order to allow activation or the forbidden energy of certain number of times.
Jtag bus JT[1:N] on signal can carry out boundary scan and test operation to microprocessor 200, and jtag bus JT[1:N] state by a test cell, a debugger or microprocessor 200 outsides other similarly device institute controlled.Jtag bus interface element 209 receives by jtag bus JT[1:N] transmit and the JTAG order that comes, and received order is sent to JTAG Quality Initiative 208, wherein JTAG Quality Initiative 208 couple nearly all in microprocessor 200 can testing element.Except the scanner uni test operation of JTAG, the structure of microprocessor 200 allows the operation of other expansion, as the checking of the checking of microcode reservoir 206 Program microcodes and fuse array 201 Program fuse states.In order to complete these operations, the JTAG order being associated can be sent to JTAG Quality Initiative 208, then is sent to microcode reservoir 206 by bus RDCODE, and is sent to fuse array 201 by bus RDARRAY.In addition, recycle an external testing unit (not shown) and read the fuse state in fuse array 201, and read the stored microcode of microcode reservoir 206.
Except reading fuse array 201 and microcode reservoir 206, JTAG order can microprocessor 200 is manufactured complete after, some fuse being used in blowout array 201.Therefore, blow data by jtag bus JT[1:N] be sent to JTAG Quality Initiative 208, and be sent to fuse array 201 by bus RDARRAY.Then, by setting, be coupled to the magnitude of voltage on the connecting leads 210 of signal FSOURCE, just can control and blow controller 207 and blow some fuse.For blowout, suitable blow data and can pass through jtag bus JT[1:N], via bus RDARRAY, be sent to fuse scan chain, then blow order meeting by jtag bus JT[1:N] transmit, make chip enter the state that allows blowout.The magnitude of voltage of signal FSOURCE is set at a suitable value, and maintains one section of Preset Time of this magnitude of voltage, and blowing controller 207 just can be according to the magnitude of voltage of signal FSOURCE, blowout.
Generally speaking, in system board (not shown), the voltage of signal FSOURCE is VSS, and wherein VSS is generally 0V or ground voltage, and this voltage must be enough to allow activation logic element 205 and JTAG Quality Initiative 208 read the state of fuse array 201.For blowout, the magnitude of voltage of signal FSOURCE can be promoted to a preset value, and its kind by process technique and fuse (as metal or polymkeric substance) determines.When the manufacture of a chip is during according to 90nm process technique, the magnitude of voltage of signal FSOURCE is about 3.5V.If the manufacture of chip is during according to 65nm process technique, the magnitude of voltage of signal FSOURCE is about 1.7V.
Compared to current microprocessor 100, microprocessor 200 provides a mechanism, in order to prevent that uncommitted user from carrying out any JTAG action except normal boundary scanner uni test operation.In a possibility embodiment, microprocessor 200 has a feature fuse (feature fuse) 211.Feature fuse 211 is arranged among fuse array 201.When feature fuse 211 is blown, to harmful or uncommitted JTAG action forbidden energy.One access controller (access controller) 212 couples feature fuse 211 by bus FSENSE.Access controller 212 receives a microprocessor reset signal (RESET), and couples JTAG Quality Initiative 208 by bus B SONLY.
As other fuse (not shown) in fuse array 201, feature fuse 211 may be formed by metal or polymkeric substance, it can be when microprocessor 200 be manufactured, utilize known technology to blow feature fuse 211, or after having manufactured, utilize the mechanism of above-mentioned signal FSOURCE to blow feature fuse 211.
In operation, when microprocessor 200 is unlocked or is reset, reset signal RESET can be set up, and access controller 212 is by bus FSENSE, detects the state of feature fuse 211.When if feature fuse 211 is not blown, access controller 212 can be controlled JTAG Quality Initiative 208 by bus B SONLY and allow all JTAG to operate.JTAG operation comprises reads the stored microcode of microcode reservoir 206, and the fuse of read/blowout array 201.Yet when if feature fuse 211 is blown, access controller 212 can be controlled JTAG Quality Initiative 208 by bus B SONLY and forbid that all JTAG except normal boundary scanner uni test operation operate.Therefore, when feature fuse 211 is blown, if microprocessor 200 is from jtag bus JT[1:N] received order for attempt, blow or read fuse in fuse array 201 or attempt while reading the order of the stored data of microcode reservoir 206, these orders will be left in the basket or be disabled.
Similarly, JTAG Quality Initiative 208 is not in order to allow/to allow the JTAG operation of above-mentioned expansion according to the indication of access controller 212.JTAG Quality Initiative 208 comprises logical block, circuit, device or microcode (as micro-order or primary instruction) or the combination of logical block, circuit, device and microcode or other can carry out the element of function of the present invention.The element of carrying out function of the present invention also can with microprocessor 200 in carry out other function circuit or microcode share.
In one embodiment, microprocessor 200 comprises a CPU (central processing unit) (CPU).CPU (central processing unit) can be arranged in the single wafer of an integrated circuit.In other embodiments, microprocessor 200 has the compatible CPU (central processing unit) of an x86, it is in the single wafer of an integrated circuit, and can be a SuperScale microprocessor (superscalar), with pipeline, carry out by a system bus and from a storer, capture the compatible macro instruction of x86 out.
In other embodiments, can utilize the integrated circuit being arranged in single wafer to replace microprocessor 200.In this example, integrated circuit provides above-mentioned programmable fuse, and above-mentionedly prevents that the mechanism of altering is also integrated in the design of integrated circuit.
Fig. 3 is another possibility embodiment of microprocessor of the present invention.In the present embodiment, microprocessor 300 has a protective device, in order to avoid undelegated user to alter the fuse state of fuse array.The microprocessor 200 of microprocessor 300 similar diagrams 2.Microprocessor 300 has a fuse array 301.Fuse array 301 couples one or more activation logic elements 305.Each activation logic element 305 provides a disable signal DIS to give corresponding feature member 302-303, as crypto engine 302 or other protection feature 303.
As mentioned above, in the manufacture process of microprocessor 300, can be by some fuse in laser or other method blowout array 301, in order to activation or forbidden energy some protection feature 303 and/or crypto engine 302.Therefore, when microprocessor 300 is activated or is reset, the fuse state of each activation logic element 305 judgement fuse array 301, and can trigger corresponding disable signal DIS, in order to the corresponding crypto engine 302 of forbidden energy and protection feature 303.
One fuse blowing may represent that some feature member 302-303 is enabled or is disabled.One feature member 302-303 may have a plurality of fuses that are associated, in order to allow activation or the forbidden energy of certain number of times.
Jtag bus JT[1:N] on signal can carry out boundary scan and test operation to microprocessor 300, and jtag bus JT[1:N] state by a test cell, a debugger or microprocessor 300 outsides other similarly device institute controlled.Jtag bus interface element 309 receives by jtag bus JT[1:N] transmit and the JTAG order that comes, and received order is sent to JTAG Quality Initiative 308, wherein JTAG Quality Initiative 308 couple nearly all in microprocessor 300 can testing element.Except the scanner uni test characteristic of JTAG, the structure of microprocessor 300 allows other extended operation, as the checking of the checking of microcode reservoir 306 Program microcodes and fuse array 301 Program fuse states.In order to complete these operations, the JTAG order being associated can be sent to JTAG Quality Initiative 308, then is sent to microcode reservoir 306 by bus RDCODE, and is sent to fuse array 301 by bus RDARRAY.In addition, recycle an external testing unit (not shown) and read the fuse state in fuse array 301, and read the stored microcode of microcode reservoir 306.
Except reading fuse array 301 and microcode reservoir 306, JTAG order can microprocessor 300 is manufactured complete after, some fuse being used in blowout array 301.Therefore, blow data by jtag bus JT[1:N] be sent to JTAG Quality Initiative 308, and be sent to fuse array 301 by bus RDARRAY.Then, by setting, be coupled to the magnitude of voltage on the connecting leads 310 of signal FSOURCE, just can allow and blow controller 307 and blow some fuse.For blowout, suitable blow data and can pass through jtag bus JT[1:N], via bus RDARRAY, be sent to fuse scan chain, then blow order meeting by jtag bus JT[1:N] transmit, make chip enter the state that allows blowout.The magnitude of voltage of signal FSOURCE is set at a suitable value, and maintains one section of Preset Time of this magnitude of voltage.Blowing controller 307 just can be according to the magnitude of voltage of signal FSOURCE, blowout.
Generally speaking, in system board (not shown), the voltage of signal FSOURCE is VSS, and wherein VSS is generally 0V or ground voltage, and this voltage must be enough to allow activation logic element 305 and JTAG Quality Initiative 308 read the state of fuse array 301.For blowout, the magnitude of voltage of signal FSOURCE can be promoted to a preset value, and its kind by process technique and fuse (as metal or polymkeric substance) determines.When the manufacture of a chip is during according to 90nm process technique, the magnitude of voltage of signal FSOURCE is about 3.5V.If the manufacture of chip is during according to 65nm process technique, the magnitude of voltage of signal FSOURCE is about 1.7V.
As other fuse (not shown) in fuse array 301, feature fuse 311 may be formed by metal or polymkeric substance, it can be when microprocessor 300 be manufactured, utilize known technology to blow feature fuse 311, or after having manufactured, utilize the mechanism of above-mentioned signal FSOURCE to blow feature fuse 311.
In operation, when microprocessor 300 is unlocked or is reset, reset signal RESET can be set up, and access controller 312 is by bus FSENSE, detects the state of feature fuse 311.When if feature fuse 311 is not blown, access controller 312 can be controlled JTAG Quality Initiative 308 by bus B SONLY and allow all JTAG to operate.JTAG operation comprises reads the stored microcode of microcode reservoir 306, and the fuse of read/blowout array 301.Yet when if feature fuse 311 is blown, access controller 312 can be controlled JTAG Quality Initiative 308 by bus B SONLY and forbid that all JTAG except normal boundary scanner uni test operation operate.Therefore, when feature fuse 311 is blown, if microprocessor 300 is from jtag bus JT[1:N] received order blow or read the fuse in fuse array 301 for attempt, or attempt is while reading the order of the stored data of microcode reservoir 306, these orders will be left in the basket or be disabled.
What note is, in some structure, signal FSOURCE may be set at VSS magnitude of voltage in addition, in order to the fuse in blowout array 301, make the state (blow or do not blow) of the fuse in fuse array 301 become the state that is not that it is originally real.The generation of this situation may be that uncommitted user's attempt provides this magnitude of voltage to alter the feature of microprocessor by signal FSOURCE, the JTAG operation of the value indication expansion of the feature fuse 311 on bus FSENSE is enabled, so just, can blowout to increase feature member 302-303, and/or can read the stored data of microcode reservoir 306.In order to address the above problem, magnitude of voltage detector 313 can pilot signal FSOURCE magnitude of voltage, and for example, when a underproof magnitude of voltage (illegal value) (voltage except VSS), by bus ILLEGAL, inform access controller 312 at the magnitude of voltage of signal FSOURCE.Therefore, when access controller 312 reads the state of feature fuse 311, if signal FSOURCE is in a underproof magnitude of voltage, access controller 312 will be controlled JTAG Quality Initiative 308, in order to forbid all JTAG operations except normal boundary scanner uni test operation.On the contrary, when access controller 312 reads the state of feature fuse 311, if the voltage of signal FSOURCE is VSS, access controller 312 will make JTAG Quality Initiative 308 according to the state of feature fuse 311, allows or do not allow the JTAG operation of expanding.
In one embodiment, microprocessor 300 comprises a CPU (central processing unit) (CPU).CPU (central processing unit) can be arranged in the single wafer of an integrated circuit.In other embodiments, microprocessor 300 has the compatible CPU (central processing unit) of an x86, it and can be a SuperScale microprocessor in the single wafer of an integrated circuit, with pipeline, carries out by a system bus and from a storer, captures the compatible macro instruction of x86 out.
In other embodiments, can utilize the integrated circuit being arranged in single wafer to replace microprocessor 300.In this example, integrated circuit provides above-mentioned programmable fuse, and above-mentionedly prevents that the mechanism of altering is also incorporated in the design of integrated circuit.
Fig. 4 is a process flow diagram of guard method of the present invention.Guard method of the present invention can avoid programmable fuse array to be tampered.Guard method of the present invention is started by step 401, please coordinate the microprocessor 300 of Fig. 3 of the present invention.
In step 402, judge whether microprocessor 300 is carrying out the series of operations corresponding to replacement or power supply startup sequence (power on sequence).If not, continue step 402.If so, perform step 403.
In step 403, whether the magnitude of voltage that judges signal FSOURCE is one qualified (VSS) or is a defective magnitude of voltage.If when the magnitude of voltage of signal FSOURCE is a qualified voltage value (VSS), perform step 404.If when the magnitude of voltage of signal FSOURCE is a defective magnitude of voltage (not being VSS), perform step 407.
In step 404, by access controller 312, read the state in order to the feature fuse 311 of protection, then perform step 405.
In step 405, whether judging characteristic fuse 311 is blown.If feature fuse 311 is blown, perform step 407.If feature fuse 311 is not blown, perform step 406.
In step 406, the JTAG operation that access controller 312 expands 308 activations of JTAG Quality Initiative, then performs step 408.
In step 407, the JTAG operation that access controller 312 expands JTAG Quality Initiative 308 forbidden energy.The JTAG operation of expanding comprises reads the stored microcode of microcode reservoir 306, and/or the fuse of read/blowout array 301, then performs step 408.
In step 408, method ends.
For having above-mentioned programmable fuse with for the integrated circuit of activation feature, when feature fuse 311 has been blown, it also may need to blow some fuse, in order to activation or some feature of forbidden energy.In other embodiments, the JTAG operation that microprocessor of the present invention forbidding non-permanently carry out to expand, but can temporarily cancel Fig. 2 to Fig. 4 prevent from altering function.
Fig. 5 is another possibility embodiment of microprocessor of the present invention, and the microprocessor of the present embodiment again activation one has the fuse array that prevents from altering function.Microprocessor 500 is similar in appearance to the microprocessor 300 of Fig. 3.Microprocessor 500 has a fuse array 501.Fuse array 501 couples one or more activation logic elements 505.Each activation logic element 505 provides a disable signal DIS to give corresponding feature member 502-503, as crypto engine 502 or other protection feature 503.
As mentioned above, in the manufacture process of microprocessor 500, can be by some fuse in laser or other method blowout array 501, in order to activation or forbidden energy some protection feature 503 and/or crypto engine 502.Therefore, when microprocessor 500 is activated or is reset, the fuse state of each activation logic element 505 judgement fuse array 501, and can trigger corresponding disable signal DIS, in order to the corresponding crypto engine 502 of forbidden energy and protection feature 503.
One fuse blowing may represent that some feature member 502-503 is enabled or is disabled.One feature member 502-503 may have a plurality of fuses that are associated, in order to allow activation or the forbidden energy of certain number of times.
Jtag bus JT[1:N] on signal can carry out boundary scan and test operation to microprocessor 500, and jtag bus JT[1:N] state by a test cell, a debugger or microprocessor 500 outsides other similarly device institute controlled.Jtag bus interface element 509 receives by jtag bus JT[1:N] transmit and the JTAG order that comes, and received order is sent to JTAG Quality Initiative 508, wherein JTAG Quality Initiative 508 couple nearly all in microprocessor 500 can testing element.Except the scanner uni test characteristic of JTAG, the structure of microprocessor 500 allows the operation of other expansion, as the checking of the checking of microcode reservoir 506 Program microcodes and fuse array 501 Program fuse states.In order to complete these operations, the JTAG order being associated can be sent to JTAG Quality Initiative 508, then is sent to microcode reservoir 506 by bus RDCODE, and is sent to fuse array 501 by bus RDARRAY.In addition, recycle an external testing unit (not shown) and read the fuse state in fuse array 501, and read the stored microcode of microcode reservoir 506.
Except reading fuse array 501 and microcode reservoir 506, JTAG order can microprocessor 500 is manufactured complete after, some fuse being used in blowout array 501.Therefore, blow data by jtag bus JT[1:N] be sent to JTAG Quality Initiative 508, and be sent to fuse array 501 by bus RDARRAY.Then, by setting, be coupled to the magnitude of voltage on the connecting leads 510 of signal FSOURCE, just can control and blow controller 507 and blow some fuse.For blowout, suitable blow data and can pass through jtag bus JT[1:N], via bus RDARRAY, be sent to fuse scan chain, then blow order meeting by jtag bus JT[1:N] transmit, make chip enter the state that blows that allows blowout.The magnitude of voltage of signal FSOURCE is set at a suitable value, and maintains one section of Preset Time of this magnitude of voltage, and blowing controller 507 just can be according to the magnitude of voltage of signal FSOURCE, blowout.
Generally speaking, in system board (not shown), the magnitude of voltage of signal FSOURCE is VSS, and wherein VSS is generally 0V or ground voltage, and this voltage must be enough to allow activation logic element 505 and JTAG Quality Initiative 508 read the state of fuse array 501.For blowout, the magnitude of voltage of signal FSOURCE can be promoted to a preset value, and its kind by process technique and fuse (as metal or polymkeric substance) determines.When the manufacture of a chip is during according to 90nm process technique, the magnitude of voltage of signal FSOURCE is about 3.5V.If when the manufacture of chip basis is 65nm process technique, the magnitude of voltage of signal FSOURCE is about 1.7V.
As other fuse (not shown) in fuse array 501, feature fuse 511 may be formed by metal or polymkeric substance, it can be when microprocessor 500 be manufactured, utilize known technology to blow feature fuse 511, or after having manufactured, utilize the mechanism of above-mentioned signal FSOURCE to blow feature fuse 511.
In operation, when microprocessor 500 is unlocked or is reset, reset signal RESET can be set up, and access controller 512 is by bus FSENSE, detects the state of feature fuse 511.When if feature fuse 511 is not blown, access controller 512 can be controlled JTAG Quality Initiative 508 by bus B SONLY and allow all JTAG to operate.JTAG operation comprises reads the stored microcode of microcode reservoir 506, and the fuse of read/blowout array 501.Yet when if feature fuse 511 is blown, access controller 512 can be controlled JTAG Quality Initiative 508 by bus B SONLY and forbid that all JTAG except normal boundary scanner uni test operation operate.Therefore, when feature fuse 511 is blown, if microprocessor 500 is from jtag bus JT[1:N] received order blow or read the fuse in fuse array 501 for attempt, or attempt is while reading the order of the stored data of microcode reservoir 506, these orders will be left in the basket or be disabled.
In some structure, signal FSOURCE may be set at VSS magnitude of voltage in addition, in order to the fuse in blowout array 501, make the state (blow or do not blow) of the fuse in fuse array 501 become the state that is not that it is originally real.The generation of this situation may be that uncommitted user's attempt provides this magnitude of voltage to alter the feature of microprocessor by signal FSOURCE, the JTAG operation of the value indication expansion of the feature fuse 511 on bus FSENSE is enabled, so just, can blowout to increase feature member 502-503, and/or can read the stored data of microcode reservoir 506.In order to address the above problem, magnitude of voltage detector 513 can pilot signal FSOURCE magnitude of voltage, and for example, when a underproof magnitude of voltage (magnitude of voltage except VSS), by bus ILLEGAL, inform access controller 512 at the magnitude of voltage of signal FSOURCE.Therefore, when access controller 512 reads the state of feature fuse 511, if signal FSOURCE is in a underproof magnitude of voltage, access controller 512 is forbidden all JTAG operations except normal boundary scanner uni test operation by controlling JTAG Quality Initiative 508.On the contrary, when access controller 512 reads the state of feature fuse 511, if the magnitude of voltage of signal FSOURCE is VSS, access controller 512 will make JTAG Quality Initiative 508 according to the state of feature fuse 511, allows or do not allow the JTAG operation of expanding.
Yet, after feature fuse 511 is blown, still may needs blowout or read the microcode in microcode reservoir 506.In a possibility embodiment, preventing from altering function can temporarily be cancelled.Therefore, in the present embodiment, microprocessor 500 also comprises a machine-specific working storage (machine specific register) 521.Machine-specific working storage 521 couples access controller 512 by bus RENVAL.When feature fuse 511 has been blown, the JTAG operation for temporarily activation is expanded again, must have a particular value in machine-specific working storage 521.In a possibility embodiment, only have the fabricator of microprocessor 500 just can know above-mentioned particular value, and this particular value is stored in access controller 512.One may embodiment in, with the microprocessor 500 of a collection of manufacture, may there is identical particular value.In another embodiment, this particular value may be general known value.In other embodiments, this particular value is a value that the fabricator who only has microprocessor 500 just knows, and by crypto engine according to a particular encryption algorithm (prescribe encryption algorithm), utilize an exclusive value of microprocessor 500 as an encryption gold key (encryption key), this value is carried out to the encryption cycle of a specific quantity.
When microprocessor 500 is activated or is reset, access controller 512 judges that whether signal FSOURCE is in a qualified voltage value.If so, access controller 512 again judging characteristic fuse 511 whether be blown.If feature fuse 511 has been blown, the value that access controller 512 is confirmed in machine-specific working storage 521.In a possibility embodiment, when if the value in machine-specific working storage 521 meets the coverage values (override value) (being above-mentioned particular value) in access controller 512, access controller 512 makes the JTAG operation of the above-mentioned expansion of JTAG Quality Initiative 508 activation.At all after dates of a regular time, reaffirm whether in machine-specific working storage 521, detect the value identical with this coverage values originally still exists.If so, allow the JTAG operation of expanding.Yet, when detecting is less than the value identical with this coverage values in machine-specific working storage 521, forbid the JTAG operation of expanding.
In other embodiments, access controller 512 judges that whether signal FSOURCE is in a qualified voltage value.If so, access controller 512 again judging characteristic fuse 511 whether be blown.If feature fuse 511 has been blown, the value that access controller 512 is confirmed in machine-specific working storage 521, and make crypto engine utilize the exclusive value of one of microprocessor 500 as encrypting golden key simultaneously, value in machine-specific working storage 521 is carried out to the encryption cycle of a specific quantity, to produce a secret value (encrypted value).When if this secret value meets a coverage values (being above-mentioned particular value), access controller 512 makes the JTAG operation of the above-mentioned expansion of JTAG Quality Initiative 508 activation.At all after dates of a regular time, reaffirm whether in machine-specific working storage 521, detect the secret value identical with this coverage values originally still exists.If so, allow the JTAG operation of expanding.Yet, when detecting is less than the secret value identical with this coverage values in machine-specific working storage 521, forbid the JTAG operation of expanding.
In one embodiment, microprocessor 500 comprises a CPU (central processing unit) (CPU).CPU (central processing unit) can be arranged in the single wafer of an integrated circuit.In other embodiments, microprocessor 500 has the compatible CPU (central processing unit) of an x86, it and can be a SuperScale microprocessor in the single wafer of an integrated circuit, with pipeline, carries out by a system bus and from a storer, captures the compatible macro instruction of x86 out.
In other embodiments, can utilize the integrated circuit being arranged in single wafer to replace microprocessor 500.In this example, integrated circuit provides above-mentioned programmable fuse, and above-mentionedly prevents that the mechanism of altering is also integrated in the design of integrated circuit.
The foregoing is only preferred embodiment of the present invention; so it is not in order to limit scope of the present invention; anyone familiar with this technology; without departing from the spirit and scope of the present invention; can do on this basis further improvement and variation, so the scope that claims were defined that protection scope of the present invention is worked as with the application is as the criterion.
Claims (23)
1. an integrated circuit, is characterized in that, in order to forbid the use of the JTAG operation of an expansion, this integrated circuit comprises:
One JTAG Quality Initiative, in order to the JTAG operation of activation or this expansion of forbidden energy;
One feature fuse, in order to represent whether the JTAG operation of this expansion is disabled;
One magnitude of voltage detector, in order to monitor an external voltage signal, and in order to judge that whether this external voltage signal is in a qualified voltage value;
One access controller, couple this feature fuse, this magnitude of voltage detector and this JTAG Quality Initiative, this access controller is in order to judge whether this feature fuse is blown, and when this feature fuse has been blown, this access controller uses so that the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy, and when this external voltage signal is during in a defective magnitude of voltage, no matter whether this feature fuse is blown, this access controller is used so that the JTAG of this this expansion of JTAG Quality Initiative forbidden energy operates, and
One blows controller, couple a fuse array, in order to receive this external voltage signal, and according to the magnitude of voltage of this external voltage signal, blow the selecteed fuse in this fuse array, wherein this blows controller and when the JTAG of this expansion operation is enabled, blows this selecteed fuse.
2. integrated circuit according to claim 1, is characterized in that, the JTAG operation of this expansion comprises the fuse state reading in this fuse array.
3. integrated circuit according to claim 1, is characterized in that, the JTAG operation of this expansion comprises the fuse blowing in this fuse array.
4. integrated circuit according to claim 1, is characterized in that, the JTAG operation of this expansion comprises reads the stored microcode of a microcode storage unit.
5. integrated circuit according to claim 1, is characterized in that, this access controller receives a reset signal, and after this reset signal is set up, this access controller judges whether this feature fuse is blown.
6. integrated circuit according to claim 1, is characterized in that, this integrated circuit comprises the compatible microprocessor of an x86.
7. integrated circuit according to claim 1, is characterized in that, when the JTAG of this expansion operation is disabled, a jtag boundary scan operation and a test operation still can be performed.
8. an integrated circuit, is characterized in that, in order to forbid the use of the JTAG operation of an expansion, this integrated circuit comprises:
One JTAG Quality Initiative, in order to the JTAG operation of activation or this expansion of forbidden energy;
One feature fuse, in order to represent whether the JTAG operation of this expansion is disabled;
One magnitude of voltage detector, in order to monitor an external voltage signal, and in order to judge that whether this external voltage signal is in a defective magnitude of voltage; And
One access controller, couple this feature fuse, this magnitude of voltage detector and this JTAG Quality Initiative, this access controller is in order to judge whether this feature fuse is blown, and when this external voltage signal is during in this defective magnitude of voltage, no matter whether this feature fuse is blown, this access controller uses so that the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy.
9. integrated circuit according to claim 8, is characterized in that, the JTAG operation of this expansion comprises the fuse state reading in a fuse array.
10. integrated circuit according to claim 8, is characterized in that, the JTAG operation of this expansion comprises the fuse blowing in a fuse array.
11. integrated circuit according to claim 8, is characterized in that, the JTAG operation of this expansion comprises reads the stored microcode of a microcode storage unit.
12. integrated circuit according to claim 8, it is characterized in that, this access controller receives a reset signal, and after this reset signal is set up, this access controller judges whether this feature fuse is blown, and when this external voltage signal is during in a qualified voltage value, this access controller makes the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy.
13. integrated circuit according to claim 8, is characterized in that, this integrated circuit comprises the compatible microprocessor of an x86.
14. integrated circuit according to claim 8, is characterized in that, when the JTAG of this expansion operation is disabled, a jtag boundary scan operation and a test operation still can be performed.
15. integrated circuit according to claim 8, is characterized in that, also comprise:
One blows controller, couple a fuse array and this magnitude of voltage detector, in order to receive this external voltage signal, and according to the magnitude of voltage of this external voltage signal, blow the selecteed fuse in this fuse array, wherein this blows controller and when the JTAG of this expansion operation is enabled, blows this selecteed fuse.
16. 1 kinds of integrated circuit, is characterized in that, in order to the use of the JTAG operation that activation forbidden is expanded again, this integrated circuit comprises:
One JTAG Quality Initiative, in order to the JTAG operation of activation or this expansion of forbidden energy;
One feature fuse, in order to represent whether the JTAG operation of this expansion is disabled;
One magnitude of voltage detector, in order to monitor an external voltage signal, and in order to judge that whether this external voltage signal is in a qualified voltage value;
One machine-specific working storage, in order to store a particular value; And
One access controller, couple this feature fuse, this magnitude of voltage detector, this machine-specific working storage and this JTAG Quality Initiative, this access controller is in order to judge whether this feature fuse is blown, and when this external voltage signal is when in this qualified voltage value and in this particular value is stored in the time cycle in this machine-specific working storage, this particular value meets a coverage values of this access controller, this access controller is with so that the JTAG operation of this this expansion of JTAG Quality Initiative activation.
17. integrated circuit according to claim 16, is characterized in that, the JTAG operation of this expansion comprises the fuse state reading in a fuse array.
18. integrated circuit according to claim 16, is characterized in that, the JTAG operation of this expansion comprises the fuse blowing in a fuse array.
19. integrated circuit according to claim 16, is characterized in that, the JTAG operation of this expansion comprises reads the stored microcode of a microcode storage unit.
20. integrated circuit according to claim 16, it is characterized in that, this access controller receives a reset signal, and after this reset signal is set up, this access controller judges whether this feature fuse is blown, and when this particular value does not meet this coverage values, this access controller makes the JTAG operation of this this expansion of JTAG Quality Initiative forbidden energy.
21. integrated circuit according to claim 16, is characterized in that, this integrated circuit comprises the compatible microprocessor of an x86.
22. integrated circuit according to claim 16, is characterized in that, when the JTAG of this expansion operation is disabled, a jtag boundary scan operation and a test operation still can be performed.
23. integrated circuit according to claim 16, is characterized in that, also comprise:
One crypto engine, couples this access controller, and this crypto engine is in order to this particular value is carried out to the encryption cycle of a specific quantity according to a particular encryption algorithm, and produces a secret value.
Applications Claiming Priority (7)
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| US12/823,348 | 2010-06-25 | ||
| US12/823,350 | 2010-06-25 | ||
| US12/823,345 | 2010-06-25 | ||
| US12/823,345 US8429471B2 (en) | 2010-06-25 | 2010-06-25 | Microprocessor apparatus and method for securing a programmable fuse array |
| US12/823,348 US8341472B2 (en) | 2010-06-25 | 2010-06-25 | Apparatus and method for tamper protection of a microprocessor fuse array |
| US12/823,350 US8242800B2 (en) | 2010-06-25 | 2010-06-25 | Apparatus and method for override access to a secured programmable fuse array |
| CN201110117356.XA CN102298960B (en) | 2010-06-25 | 2011-05-06 | Apparatus and method for override access to a secured programmable fuse array |
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| CN201110117356.XA Division CN102298960B (en) | 2010-06-25 | 2011-05-06 | Apparatus and method for override access to a secured programmable fuse array |
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| CN103529381A true CN103529381A (en) | 2014-01-22 |
| CN103529381B CN103529381B (en) | 2015-10-28 |
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| CN201310349632.4A Active CN103529381B (en) | 2010-06-25 | 2011-05-06 | There is the integrated circuit of programmable fuse |
| CN201110117356.XA Active CN102298960B (en) | 2010-06-25 | 2011-05-06 | Apparatus and method for override access to a secured programmable fuse array |
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| CN105122225A (en) | 2013-04-03 | 2015-12-02 | 惠普发展公司，有限责任合伙企业 | Disabling counterfeit cartridges |
| TWI556158B (en) * | 2013-08-21 | 2016-11-01 | 威盛電子股份有限公司 | Processing device and method for configuration data |
| TWI552068B (en) * | 2013-08-21 | 2016-10-01 | 上海兆芯集成電路有限公司 | Processing device and method for configuration data |
| JP6869315B2 (en) * | 2019-02-19 | 2021-05-12 | 華邦電子股▲ふん▼有限公司Ｗｉｎｂｏｎｄ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏｒｐ． | Electronic fuse circuit and its operation method |
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| US8850568B2 (en) * | 2008-03-07 | 2014-09-30 | Qualcomm Incorporated | Method and apparatus for detecting unauthorized access to a computing device and securely communicating information about such unauthorized access |
| US8402279B2 (en) * | 2008-09-09 | 2013-03-19 | Via Technologies, Inc. | Apparatus and method for updating set of limited access model specific registers in a microprocessor |
| CN101556825B (en) * | 2009-05-20 | 2011-11-30 | 炬力集成电路设计有限公司 | Integrated circuit |
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| US20060136751A1 (en) * | 2004-12-17 | 2006-06-22 | International Business Machines Corporation | Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable |
| CN200959233Y (en) * | 2006-06-30 | 2007-10-10 | 田正湧 | Power-supply voltage stabilized MP3 player and USB power-supply change-over integrater for automobile |
| US7724022B1 (en) * | 2009-01-28 | 2010-05-25 | International Business Machines Corporation | Implementing enhanced security features in an ASIC using eFuses |
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| CN102298960B (en) | 2014-04-02 |
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