CN103500717A - Layout method for PCB (Printed Circuit Board) mounted with BGA (Ball Grid Array) chip and PCB prepared by applying same - Google Patents
Layout method for PCB (Printed Circuit Board) mounted with BGA (Ball Grid Array) chip and PCB prepared by applying same Download PDFInfo
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- CN103500717A CN103500717A CN201310502693.XA CN201310502693A CN103500717A CN 103500717 A CN103500717 A CN 103500717A CN 201310502693 A CN201310502693 A CN 201310502693A CN 103500717 A CN103500717 A CN 103500717A
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- pcb
- pin
- bga chip
- chip
- bga
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Abstract
The invention discloses a layout method for a PCB (Printed Circuit Board) mounted with a BGA (Ball Grid Array) chip and a PCB prepared by applying the same and relates to the technical field of an electronic circuit. The layout method comprises the following steps: S1, providing a PCB to be mounted with the BGA chip, wherein the PCB is provided with welding spots corresponding to pins of the BGA chip; S2, confirming the positions of the welding spots on the PCB, which correspond to an NC (Not Component) pin and/or a function nonuse pin; S3, covering the welding spots corresponding to the NC pin and/or the function nonuse pin of the BGA chip with insulation ink; and S4, according to functional requirements, wiring or forming metalized through holes in a coverage region of the insulation ink. The invention solves the technical problem of high layout difficulty of the PCB mounted with the GBA chip in the prior art. According to the invention, the layout difficulty of the PCB mounted with the GBA chip is reduced to the greatest extent and development and processing periods of the PCB mounted with the GBA chip are shortened.
Description
Technical field
The present invention relates to the electronic circuit technology field, particularly a kind of PCB layout method of bga chip and PCB that application the method makes of being pasted with.
Background technology
BGA(Ball Grid Array) be a kind of method for packing that integrated circuit adopts organic support plate, bga chip adopts the chip after the BGA encapsulation, its pin is not distributed in around chip, but be distributed in the bottom surface of packaging body, with QFP(Plastic Quad Flat Package) encapsulation chip compare, can keep more envelope capacity under identical package dimension.At present, bga chip is widely used in the electronic product of high integration, as the north and south bridge chip of computer motherboard, high-grade video card chip, and some chip of printer, hard disk etc. even.
Along with scientific and technological development, the volume of electronic equipment is constantly dwindling, the PCB(Printed Circuit Board in electronic equipment) also diminishing thereupon, thus can more and more adopt bga chip to reduce the volume of PCB.But the number of pins of bga chip is more, and be mostly to be the bottom that array format is distributed in chip, distribution density is large, this has just increased the PCB layout(placement-and-routing that mounts bga chip) difficulty, make the PCB that is pasted with bga chip all will expend a large amount of time in design phase or process segment, and then increased construction cycle and the production cycle of electronic equipment.
Summary of the invention
First technical problem to be solved by this invention is to provide a kind of PCB layout method that is pasted with bga chip, this PCB layout method that is pasted with bga chip has effectively been utilized the PCB space of bga chip position, reduce to greatest extent the difficulty of PCB layout, shortened the development and production cycle of the PCB that is pasted with bga chip.
Second technical problem to be solved by this invention is to provide a kind of PCB that is pasted with bga chip, and this difficulty of PCB layout that is pasted with bga chip is low, and the development and production cycle is short.
For solving above-mentioned first technical problem, technical scheme of the present invention is:
A kind of PCB layout method that is pasted with bga chip comprises the following steps: S1, provide the PCB of bga chip to be mounted, described PCB is provided with the solder joint corresponding with the pin of described bga chip; S2, the NC pin of confirming described bga chip and/or function are not used the described bond pad locations of pin correspondence on described PCB; S3, do not use the solder joint of pin to cover with dielectric ink the NC pin of the described bga chip of correspondence and/or function; S4, according to function, need to or make plated-through hole at described dielectric ink area of coverage cloth wire.
Wherein, further comprising the steps of: as in S5, the described plated-through hole made at described step S4, to fill megohmite insulant.
Wherein, the described megohmite insulant used in described step S5 is dielectric ink or resin.
For solving above-mentioned second technical problem, technical scheme of the present invention is:
A kind of PCB that is pasted with bga chip, described PCB is provided with the solder joint corresponding with the pin of described bga chip, do not use on the corresponding described solder joint of pin and be coated with dielectric ink with the NC pin of described bga chip and/or function, the zone that described dielectric ink covers is furnished with wire or is provided with plated-through hole.
Wherein, be filled with megohmite insulant in described plated-through hole.
Wherein, described megohmite insulant is described dielectric ink or resin.
After having adopted technique scheme, the invention has the beneficial effects as follows:
The PCB layout method that is pasted with bga chip due to the present invention is not use the solder joint on the PCB of pin to cover with dielectric ink the NC pin on corresponding bga chip and/or function, the zone that so just dielectric ink can be covered is looked and is done blank PCB zone, can according to function need to be on this zone conventional cabling or beat plated-through hole and wear a layer cabling, thereby effectively utilized the PCB space that is positioned at the bga chip bottom, reduced to greatest extent the difficulty of PCB layout, thereby exploitation and the process-cycle of the PCB that is pasted with bga chip have been shortened, and then shortened development and production time of electronic equipment, can make the electronic equipment that the PCB that PCB layout method that the present invention is pasted with bga chip makes is installed seize to greatest extent the first market opportunities, for enterprise brings larger profit.
Owing to being filled with megohmite insulant in plated-through hole, can effectively avoid after bga chip mounts the pin short circuit with bga chip, guarantee the functional stabilization of PCB, also can effectively avoid chip or electronic device on PCB to damage because of short circuit simultaneously, guaranteed the useful life of equipment.
In sum, the present invention is pasted with bga chip PCB layout method and the PCB that makes of application the method have solved the large technical problem of PCB layout difficulty that is pasted with the GBA chip in the prior art.The present invention has reduced the difficulty of the PCB layout that is pasted with bga chip to greatest extent, has shortened exploitation and the process-cycle of the PCB that is pasted with bga chip.
The accompanying drawing explanation
Fig. 1 is the structural representation that the present invention is pasted with the PCB before the PCB layout method processing of bga chip;
Fig. 2 is the structural representation that the present invention is pasted with the PCB of bga chip;
Fig. 3 is the flow chart that the present invention is pasted with the PCB layout method of bga chip;
Wherein: 10, PCB, 20, solder joint, 30, dielectric ink, 40, plated-through hole, 50, wire.
Embodiment
Below in conjunction with drawings and Examples, further set forth the present invention.
A kind of PCB layout method that is pasted with bga chip comprises the following steps:
S1, provide the PCB of bga chip to be mounted, described PCB is provided with the solder joint corresponding with the pin of described bga chip;
S2, the NC pin of confirming described bga chip and/or function are not used the described bond pad locations of pin correspondence on described PCB;
S3, do not use the solder joint of pin to cover with dielectric ink the NC pin of the described bga chip of correspondence and/or function;
S4, according to function, need to or make plated-through hole at described dielectric ink area of coverage cloth wire.
The specific procedure flow process of said method is as shown in Figure 3:
Program opens and starts from step S101, at step S101, carries out device initialize, and device initialize enters step S102 after finishing;
Whether the PCB provided in step S102 determining step S1 is the PCB of bga chip to be mounted, if answer is "Yes", enters step S103; If answer is "No", enter step S106, termination routine;
In step S103 judges the pin of bga chip to be mounted, whether NC(No Connection being arranged, there is no the unsettled pin be connected with the internal circuit of chip) pin and/or function do not used pin, if answer is "Yes", enters step S104; Or answer is "No", enter step S106, termination routine;
Confirm the position of with NC pin on bga chip and/or function, not using the solder joint on the PCB that pin is corresponding at step S104, and these solder joints are covered with dielectric ink, then enter and walk S105;
Carry out PCB layout at step S105, wherein can be walked wire or make plated-through hole at the area of coverage of dielectric ink, layout enters step S106, termination routine after finishing.
After above-mentioned steps processing, the structure of PCB becomes the structure shown in Fig. 2 with regard to structure as shown in Figure 1.Mount metal conducting layer in rear plated-through hole and the pin short circuit of bga chip for fear of bga chip, also need in plated-through hole, fill the megohmite insulants such as dielectric ink or resin, to guarantee functional stabilization and the fail safe of PCB.
The PCB of the bga chip to be mounted that adopts said method to make, as shown in Figure 2:
PCB10 is provided with the solder joint corresponding with the pin of bga chip to be mounted 20, solder joint 20 can be array format and arrange, be coated with white dielectric ink 30 on the solder joint 20 that wherein the NC pin on corresponding bga chip to be mounted and/or function are not used pin, the zone that dielectric ink 30 covers is furnished with wire 50 or is provided with plated-through hole 40 according to the needs of function, is filled with the megohmite insulants such as dielectric ink or resin in plated-through hole 40.
PCB layout method and the PCB that makes of application the method that visible the present invention is pasted with bga chip have utilized the PCB space that is positioned at the bga chip bottom fully, reduced to greatest extent the difficulty of PCB layout, thereby exploitation and the process-cycle of the PCB that is pasted with bga chip have been shortened, and then shortened development and production time of electronic equipment, can make the electronic equipment that the PCB that PCB layout method that the present invention is pasted with bga chip makes is installed seize to greatest extent the first market opportunities, for enterprise brings larger profit.
The pin layout of the bga chip that the present invention is applicable is not limited to the structure shown in Fig. 1, the structure of PCB layout after method of the present invention processing also is not limited to the structure shown in Fig. 2, and those skilled in the art can be according to the structure of the function setting PCB layout of the pin layout of concrete bga chip and PCB.The present embodiment just be take the PCB structure shown in Fig. 1 and Fig. 2 and is set forth the present invention as example; in order that make the reader can be more vivid concrete understand the present invention; therefore if it is consistent with the present invention to be pasted with the PCB layout method of bga chip; and be only the structure difference of PCB layout, within also falling into protection scope of the present invention.
The present invention is not limited to above-mentioned concrete execution mode, and those of ordinary skill in the art is from above-mentioned design, and without performing creative labour, all conversion of having done, within all dropping on protection scope of the present invention.
Claims (6)
1. be pasted with the PCB layout method of bga chip, it is characterized in that, comprise the following steps:
S1, provide the PCB of bga chip to be mounted, described PCB is provided with the solder joint corresponding with the pin of described bga chip;
S2, the NC pin of confirming described bga chip and/or function are not used the described bond pad locations of pin correspondence on described PCB;
S3, do not use the solder joint of pin to cover with dielectric ink the NC pin of the described bga chip of correspondence and/or function;
S4, according to function, need to or make plated-through hole at described dielectric ink area of coverage cloth wire.
2. the PCB layout method that is pasted with bga chip according to claim 1, is characterized in that, further comprising the steps of:
Fill megohmite insulant in S5, the described plated-through hole made at described step S4.
3. the PCB layout method that is pasted with bga chip according to claim 2, is characterized in that, the described megohmite insulant used in described step S5 is dielectric ink or resin.
4. the PCB that adopts the PCB layout method that is pasted with bga chip claimed in claim 1 to make, described PCB is provided with the solder joint corresponding with the pin of described bga chip, it is characterized in that, do not use on the corresponding described solder joint of pin and be coated with dielectric ink with the NC pin of described bga chip and/or function, the zone that described dielectric ink covers is furnished with wire or is provided with plated-through hole.
5. the PCB that is pasted with bga chip according to claim 4, is characterized in that, in described plated-through hole, is filled with megohmite insulant.
6. the PCB that is pasted with bga chip according to claim 5, is characterized in that, described megohmite insulant is described dielectric ink or resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310502693.XA CN103500717B (en) | 2013-10-23 | 2013-10-23 | It is pasted with the PCB placement-and-routings method of bga chip and using PCB obtained in the method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310502693.XA CN103500717B (en) | 2013-10-23 | 2013-10-23 | It is pasted with the PCB placement-and-routings method of bga chip and using PCB obtained in the method |
Publications (2)
| Publication Number | Publication Date |
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| CN103500717A true CN103500717A (en) | 2014-01-08 |
| CN103500717B CN103500717B (en) | 2017-04-05 |
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| CN201310502693.XA Active CN103500717B (en) | 2013-10-23 | 2013-10-23 | It is pasted with the PCB placement-and-routings method of bga chip and using PCB obtained in the method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019056749A1 (en) * | 2017-09-19 | 2019-03-28 | 北京嘉楠捷思信息技术有限公司 | Printed circuit board structure, and wiring method therefor |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6150729A (en) * | 1999-07-01 | 2000-11-21 | Lsi Logic Corporation | Routing density enhancement for semiconductor BGA packages and printed wiring boards |
| CN101932207A (en) * | 2010-09-06 | 2010-12-29 | 创扬通信技术（深圳）有限公司 | Multilayer PCB (Printed Circuit Board) and design method thereof |
| CN202587598U (en) * | 2012-04-01 | 2012-12-05 | 惠州Tcl移动通信有限公司 | Pad structure and printed circuit board (PCB) |
| CN203536378U (en) * | 2013-10-23 | 2014-04-09 | 青岛歌尔声学科技有限公司 | A PCB provided with a BGA chip |
-
2013
- 2013-10-23 CN CN201310502693.XA patent/CN103500717B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6150729A (en) * | 1999-07-01 | 2000-11-21 | Lsi Logic Corporation | Routing density enhancement for semiconductor BGA packages and printed wiring boards |
| CN101932207A (en) * | 2010-09-06 | 2010-12-29 | 创扬通信技术（深圳）有限公司 | Multilayer PCB (Printed Circuit Board) and design method thereof |
| CN202587598U (en) * | 2012-04-01 | 2012-12-05 | 惠州Tcl移动通信有限公司 | Pad structure and printed circuit board (PCB) |
| CN203536378U (en) * | 2013-10-23 | 2014-04-09 | 青岛歌尔声学科技有限公司 | A PCB provided with a BGA chip |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019056749A1 (en) * | 2017-09-19 | 2019-03-28 | 北京嘉楠捷思信息技术有限公司 | Printed circuit board structure, and wiring method therefor |
| US10834816B2 (en) | 2017-09-19 | 2020-11-10 | Canaan Creative Co., Ltd. | Printed circuit board structure, and wiring method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103500717B (en) | 2017-04-05 |
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