CN103500565B - A kind of storage means and device - Google Patents
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- CN103500565B CN103500565B CN201310465949.4A CN201310465949A CN103500565B CN 103500565 B CN103500565 B CN 103500565B CN 201310465949 A CN201310465949 A CN 201310465949A CN 103500565 B CN103500565 B CN 103500565B
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Abstract
Embodiments of the invention provide a kind of storage means and device, it relates to electronic technology field, it is possible to cancel exterior storage equipment, save hardware cost. The method comprises: the static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by controller, then by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID, according to the first address of this internal memory, write EDID, finally, calculate the School Affairs of EDID, if School Affairs is preset value, then enable DDC port access EDID.
Description
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of storage means and device.
Background technology
EDID(ExtendedDisplayIdentificationData, external display device mark data) by institute of video electronics standard association specification, contain the basic parameter of display equipment, comprise supplier information, maximum image size, color is arranged, manufacturer pre-sets, the restriction of range of frequency and the character string of indicating meter name and sequence number.
In the prior art, the EDID of indicating meter is stored in exterior storage equipment, signal source equipment is at HDMI(HighDefinitionMultimediaInterface, high-resolution multimedia interface) or VGA(VideoGraphicsArray, video and graphic matrix) cable is when accessing, by DDC(DisplayDataChannel, display data passage) bus access exterior storage equipment, after reading the EDID being stored therein, the resolving power then supported according to EDID sends signal.
But, owing to the EDID of indicating meter is stored in exterior storage equipment, namely need special chip to store this EDID, it is to increase hardware cost.
Summary of the invention
Embodiments of the invention provide a kind of storage means and device, the EDID solving indicating meter is stored in the high problem of hardware cost that exterior storage equipment causes, utilize the SRAM(StaticRandomAccessMemory of the ADV7850 chip internal of indicating meter, static RAM) space, by software mode, EDID is write, eliminate exterior storage equipment, save hardware cost.
For achieving the above object, embodiments of the invention adopt following technical scheme:
The embodiment of the present invention provides a kind of storage means, and when the ADV7850 chip of indicating meter powers on, described method comprises:
Forbid the static RAM SRAM of ADV7850 chip described in the display data passage DDC port access of described indicating meter;
By the I of described indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write;
According to the first address of described internal memory, write described EDID;
Calculate the School Affairs of described EDID;
If described School Affairs is preset value, then EDID described in enable described DDC port access.
The static RAM SRAM of ADV7850 chip described in the described display data passage DDC port access forbidding described indicating meter, specifically comprises:
Pass through I2C bus, to described ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0, forbids the static RAM SRAM of ADV7850 chip described in the display data passage DDC port access of described indicating meter.
The described I by described indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write, specifically comprises:
Pass through I2C bus is ordered to the write switching of described ADV7850 chip, by the I of described indicating meter2The interface of C bus switches to the storage space for storing the EDID for video interface of described SRAM, and to obtain the first address of the internal memory needed for the described EDID of write, described video interface comprises high-resolution multimedia interface HDMI and video and graphic matrix V GA.
Described according to the first address of described internal memory, write described EDID, specifically comprise:
Pass through I2C bus writes order to described ADV7850 chip, so that described ADV7850 chip is according to the first address of described internal memory, writes described EDID.
If described School Affairs is not described preset value, then revise described EDID;
EDID described in enable described DDC port access.
If described School Affairs is preset value, then EDID described in enable described DDC port access, specifically comprises:
If described School Affairs is preset value, then pass through I2C bus to described ADV7850 chip write-enable visit order so that the control register in described ADV7850 chip is set to 1.
The embodiment of the present invention provides a kind of controller, comprising:
Processing unit, for forbidding the static RAM SRAM of ADV7850 chip described in the display data passage DDC port access of described indicating meter, by the I of described indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write, calculate the School Affairs of described EDID, if described School Affairs is preset value, then EDID described in enable described DDC port access.
Storage unit, for according to the first address of described internal memory, writing described EDID.
Described processing unit, specifically for passing through I2C bus, to described ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0, passes through I2C bus is ordered to the write switching of described ADV7850 chip, by the I of described indicating meter2The interface of C bus switches to the storage space for storing the EDID for video interface of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write, described video interface comprises high-resolution multimedia interface HDMI and video and graphic matrix V GA, if described School Affairs is preset value, then pass through I2C bus to described ADV7850 chip write-enable visit order so that the control register in described ADV7850 chip is set to 1;
Described storage unit, specifically for passing through I2C bus writes order to described ADV7850 chip, so that described ADV7850 chip is according to the first address of described internal memory, writes described EDID.
Described processing unit, if not being also described preset value for described School Affairs, then revises described EDID, revises EDID described in enable described DDC port access after EDID.
The embodiment of the present invention provides a kind of storage means and device, and the static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by controller, then by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID, according to the first address of this internal memory, write EDID, finally, calculate the School Affairs of EDID, if School Affairs is preset value, then enable DDC port access EDID. By the program, owing to the EDID of indicating meter is directly stored in the ADV7850 chip of indicating meter, thus eliminate exterior storage equipment, save hardware cost.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, it is briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the schematic flow sheet one of the storage means of the embodiment of the present invention;
Fig. 2 is the schematic flow sheet two of the storage means of the embodiment of the present invention;
Fig. 3 is the structural representation one of the controller of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only the present invention's part embodiment, instead of whole embodiments. Based on the embodiment in the present invention, those of ordinary skill in the art, not making other embodiments all obtained under creative work prerequisite, belong to the scope of protection of the invention.
EDID(ExtendedDisplayIdentificationData, external display device mark data) by institute of video electronics standard association specification, indicating meter by DDC(DisplayDataChannel, display data passage) be transferred to the normal data information of host computer. Dividing with regard to data quantity of information, EDID is divided into 128 bytes and 256 bytes. It contains the basic parameter of display equipment, comprises supplier information, maximum image size, color is arranged, manufacturer pre-sets, the restriction of range of frequency and the character string of indicating meter name and sequence number.
EDID data exchange is that indicating meter and signal source equipment communication are to illustrate a kind of standardized method of self performance. This kind of communication be the performance characteristic (such as original resolution) in order to make indicating meter can send self to signal source equipment, make this equipment generate the video properties being suitable for indicating meter requirement. User does not need manual regulation, just can compatibility between lift technique to greatest extent, thus decrease because incorrect setting and adjustment impact that the global reliability of display image and system is caused.
HDMI(HighDefinitionMultimediaInterface, high-definition multimedia interface) it is that a kind of total digitalization image and sound transmit interface, it is possible to transmit the sound signal without compression and vision signal. HDMI can be used for Set Top Box, DVD player, PC, holder for TV playing, integrated amplifier, digital sound and televisor.HDMI can transmit audio frequency and video-audio signal simultaneously, owing to audio and video frequency signal adopts same bar cable, enormously simplify the installation of system.
HDMI supports EDID, and the equipment therefore with HDMI has the feature of " plug and play ", can automatically carry out " negotiation " between signal source and display equipment, automatically selects the most suitable video/audio format.
VGA(VideoGraphicsArray, video and graphic matrix) it is a kind of video transmission standard, there is resolving power height, show the advantages such as speed is fast, various colors, it is widely used in color monitor field, it is adapted in various electronic and electrical equipment USB interface, such as the wire of the home appliances such as computer, high definition DVD and computer monitor, projector, digital TV in high resolution, rear-projection, plasm TV.
ADV7850 chip is a high quality, single-chip, multi-format video decoder and pattern number instrument, and is integrated with the multiplexed HDMI receiver of 4:1. This chip supports four road HDMI and analog input pattern, therefore allows to switch fast between analog video input and HDMI. The built-in four tunnel input HDMI compatible type receptors of ADV7850, support all HDTV (High-Definition Television) forms being up to 3D1080p60Hz and 2160P24Hz, can switch fast between HDMI port, all HDMI ports also can carry out synchro measure and state monitoring. Each HDMI port has special 5V detection and hot plug set pin. HDMI receiver is integrated with inner EDID and supports, in full power, falls electricity and all can use under power-down mode. ADV7850 chip may be used for HDTV (High-Definition Television), Set Top Box, audio-visual receiving apparatus, projector and video matrix switcher.
Embodiment one
The embodiment of the present invention provides a kind of storage means, and as shown in Figure 1, when the ADV7850 chip of indicating meter powers on, the method comprises:
The static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by S101, controller.
The ADV7850 chip of indicating meter includes control register, status register and SRAM, and the present invention utilizes the SRAM space in this ADV7850 chip, and EDID writes this SRAM. When writing EDID, it is necessary to forbid that DDC port passes through I2C bus access SRAM, to prevent in write EDID process, peripheral equipment, by DDC port access SRAM, ensures the exactness of write EDID simultaneously.
Concrete, controller passes through I2C bus is to ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0.
S102, controller are by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID.
In ADV7850 chip, the control register of SRAM is set to 0, namely forbids that DDC port passes through I2After this SRAM of C bus access, start to write EDID in SRAM.
ADV7850 chip is a high quality, single-chip, multi-format video decoder and pattern number instrument, and is integrated with the multiplexed HDMI receiver of 4:1. This chip supports a four road HDMI and road VGA, and the EDID therefore supported is divided into two groups of EDI to be D, one group of EDID for high-resolution multimedia interface HDMI, and another group is the EDID for video and graphic matrix V GA. When writing EDID in sram, it is necessary to obtain the first address of internal memory for different EDID.
Concrete, controller passes through I2C bus is ordered to the write switching of ADV7850 chip, by the I of indicating meter2The interface of C bus switches to the storage space for storing the EDID for video interface of SRAM, and to obtain the first address of the internal memory needed for write EDID, wherein, video interface comprises HDMI and VGA.
S103, controller, according to the first address of internal memory, write EDID.
Controller writes EDID according to the first address of this internal memory after obtaining the first address of internal memory of EDID, and write EDID is stored in the SRAM in ADV7850 chip by EDID.
S104, controller calculate the School Affairs of EDID.
Wherein, the School Affairs of EDID is used to whether check data is illegally changed or whether have transmission mistake, the setting principle of this byte is that to make 128 byte sums of EDID be 00h or 256 the byte sums making EDID be 00h, if more than the expression scope of a byte in summation process, fail to represent that position is then lost automatically.
Controller calculates the School Affairs of this EDID after writing EDID in the SRAM of ADV7850 chip, to ensure to write the exactness of EDID.
If S105 School Affairs is preset value, then the enable DDC port access EDID of controller.
Wherein, preset value can be EDID byte sum is 00h.
Concrete, if the byte sum of EDID is 00h, then the EDID in the SRAM of ADV7850 chip correctly stores, and controller passes through I2C bus is to ADV7850 chip write-enable visit order, then the control register in ADV7850 chip is set to 1, so that signal source equipment is when video interface cable accesses, by DDC bus access ADV7850 chip, reading the EDID being stored in the SRAM of ADV7850 chip, the resolving power then supported according to this EDID sends signal.
The embodiment of the present invention provides a kind of storage means, and the static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by controller, then by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID, according to the first address of this internal memory, write EDID, finally, calculate the School Affairs of EDID, if School Affairs is preset value, then enable DDC port access EDID. By the program, owing to the EDID of indicating meter is directly stored in the ADV7850 chip of indicating meter, thus eliminate exterior storage equipment, save hardware cost.
Embodiment two
The embodiment of the present invention provides a kind of storage means, and as shown in Figure 2, when the ADV7850 chip of indicating meter powers on, the method comprises:
The static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by S201, controller.
The ADV7850 chip of indicating meter includes control register, status register and SRAM. When ADV7850 chip powers on, this chip carries out hardware reset voluntarily, and namely the content in control register, status register and SRAM is all clear empty.
The present invention utilizes the SRAM space in this ADV7850 chip, is write by EDID in this SRAM. In order to ensure to write validity and the exactness of EDID data, prevent peripheral equipment by DDC port access SRAM, when writing EDID, first forbid that DDC port passes through I2C bus access SRAM.
Concrete, controller passes through I2C bus is to ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0.
S202, controller are by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID.
After the control register of SRAM is set to 0 in ADV7850 chip, namely forbid that DDC port passes through I2After this SRAM of C bus access, start to write EDID in sram, when writing EDID, it is necessary to according to the first address write of the internal memory of EDID.
ADV7850 chip is a high quality, single-chip, multi-format video decoder and pattern number instrument, and is integrated with the multiplexed HDMI receiver of 4:1. This chip supports a four road HDMI and road VGA, and the EDID therefore supported is divided into two groups of EDID, one group for high-resolution multimedia interface HDMI, another group for video and graphic matrix V GA.
Concrete, controller passes through I2C bus is ordered to the write switching of ADV7850 chip, by the I of indicating meter2The interface of C bus switches to the storage space for storing the EDID for HDMI of SRAM, writes for the first address of the internal memory needed for the EDID of HDMI to obtain, and in ADV7850 chip, four road HDMI share the first address of an EDID internal memory;
Or,
Controller passes through I2C bus is ordered to the write switching of ADV7850 chip, by the I of indicating meter2The interface of C bus switches to the storage space for storing the EDID for VGA of SRAM, writes for the first address of the internal memory needed for the EDID of VGA to obtain.
It should be noted that, controller is by the I of indicating meter2The interface of C bus switches to the order being used for storing the storage space of the EDID for VGA that the interface of the I2C bus of indicating meter switches to SRAM being determined for the storage space and controller storing the EDID for HDMI of SRAM according to actual service condition, and the present invention is also not construed as limiting.
S203, controller, according to the first address of internal memory, write EDID.
After controller obtains the first address of internal memory of EDID, start to write EDID according to the first address of this internal memory, it is stored in the SRAM in ADV7850 chip by EDID.
Specifically, after controller obtains the first address of internal memory of the EDID for HDMI, start to write the EDID for HDMI according to the first address of this internal memory;
Or,
After controller obtains the first address of internal memory of the VGA for HDMI, start to write the EDID for VGA according to the first address of this internal memory.
S204, controller calculate the School Affairs of EDID.
Wherein, the School Affairs of EDID is used to whether check data is illegally changed or whether have transmission mistake, the setting principle of this byte is that to make 128 byte sums of EDID be 00h or 256 the byte sums making EDID be 00h, if more than the expression scope of a byte in summation process, fail to represent that position is then lost automatically.
Controller calculates the School Affairs of this EDID after writing EDID in the SRAM of ADV7850 chip, so that ensureing the exactness of EDID.
It should be noted that, no matter EDID is the EDID for HDMI, or the EDID for VGA, all need to calculate its School Affairs.
If S205 School Affairs is not preset value, then controller correction EDID, enable DDC port access EDID after correction EDID.
Wherein, preset value can be EDID byte sum is 00h.
Concrete, if when EDID is illegally changed or has transmission wrong, EDID byte sum is not 00h, then EDID is revised by controller automatically, and after revising EDID, EDID is correctly stored in the SRAM of ADV7850 chip, the enable DDC port access EDID of controller.
If S206 School Affairs is preset value, then the enable DDC port access EDID of controller.
Wherein, preset value can be EDID byte sum is 00h.
Concrete, if illegally not changed in EDID write process and transmitting mistake, its byte sum is 00h, then the EDID in the SRAM of ADV7850 chip is correct storage, and controller passes through I2C bus is to ADV7850 chip write-enable visit order, then the control register in ADV7850 chip is set to 1, so that signal source equipment is when video interface cable accesses, by DDC bus access ADV7850 chip, reading the EDID being stored in the SRAM of ADV7850 chip, the resolving power then supported according to this EDID sends signal.
The embodiment of the present invention provides a kind of storage means, and the static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by controller, then by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID, according to the first address of this internal memory, write EDID, finally, calculate the School Affairs of EDID, if School Affairs is preset value, then enable DDC port access EDID. By the program, owing to the EDID of indicating meter is directly stored in the ADV7850 chip of indicating meter, thus eliminate exterior storage equipment, save hardware cost.
Embodiment three
The embodiment of the present invention provides a kind of controller, as shown in Figure 3, comprising:
Processing unit 10, for forbidding the static RAM SRAM of ADV7850 chip described in the display data passage DDC port access of described indicating meter, by the I of described indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write, calculate the School Affairs of described EDID, if described School Affairs is preset value, then EDID described in enable described DDC port access.
Storage unit 11, for according to the first address of described internal memory, writing described EDID.
Further, described processing unit, specifically for passing through I2C bus, to described ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0, passes through I2C bus is ordered to the write switching of described ADV7850 chip, by the I of described indicating meter2The interface of C bus switches to the storage space for storing the external display device mark data EDID for video interface of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write, described video interface comprises high-resolution multimedia interface HDMI and video and graphic matrix V GA, if described School Affairs is preset value, then pass through I2C bus to described ADV7850 chip write-enable visit order so that the control register in described ADV7850 chip is set to 1.
Further, described storage unit, specifically for passing through I2C bus writes order to described ADV7850 chip, so that described ADV7850 chip is according to the first address of described internal memory, writes described EDID.
Further, described processing unit, if not being also described preset value for described School Affairs, then revises described EDID, revises EDID described in enable described DDC port access after EDID.
The embodiment of the present invention provides a kind of controller, mainly comprises processing unit and storage unit.The static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter forbidden by controller, then by the I of indicating meter2The interface of C bus switches to the storage space for storing external display device mark data EDID of SRAM, to obtain the first address of the internal memory needed for write EDID, according to the first address of this internal memory, write EDID, finally, calculate the School Affairs of EDID, if School Affairs is preset value, then enable DDC port access EDID. By the program, owing to the EDID of indicating meter is directly stored in the ADV7850 chip of indicating meter, thus eliminate exterior storage equipment, save hardware cost.
The technician of art can be well understood to, for convenience and simplicity of description, only it is illustrated with the division of above-mentioned each function module, in practical application, can complete by different function modules as required and by above-mentioned functions distribution, it is divided into different function modules, to complete all or part of function described above by the internal structure of device. The concrete working process of the system of foregoing description, device and unit, it is possible to reference to the corresponding process in aforementioned embodiment of the method, do not repeat them here.
In several embodiments that the application provides, it should be appreciated that, disclosed system, device and method, it is possible to realize by another way. Such as, device embodiment described above is only schematic, such as, the division of described module or unit, being only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can ignore, or do not perform. Another point, shown or discussed coupling each other or directly coupling or communication connection can be the indirect coupling by some interfaces, device or unit or communication connection, it is possible to be electrical, machinery or other form.
The above; it is only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, any it is familiar with those skilled in the art in the technical scope that the present invention discloses; change can be expected easily or replace, all should be encompassed within protection scope of the present invention. Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (9)
1. a storage means, it is characterised in that, when the ADV7850 chip of indicating meter powers on, described method comprises:
Forbid the static RAM SRAM of ADV7850 chip described in the display data passage DDC port access of described indicating meter;
Pass through I2C bus is ordered to the write switching of described ADV7850 chip, by the I of described indicating meter2The interface of C bus switches to the storage space for storing the EDID for video interface of described SRAM, and to obtain the first address of the internal memory needed for the described EDID of write, described video interface comprises high-resolution multimedia interface HDMI and video and graphic matrix V GA;
According to the first address of described internal memory, write described EDID;
Calculate the School Affairs of described EDID;
If described School Affairs is preset value, then EDID described in enable described DDC port access.
2. storage means according to claim 1, it is characterised in that, described in forbid specifically comprising the static RAM SRAM of ADV7850 chip described in the display data passage DDC port access of described indicating meter:
Pass through I2C bus, to described ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0, forbids that the display data passage DDC port of described indicating meter is by described I2C accesses the static RAM SRAM of described ADV7850 chip.
3. storage means according to claim 1, it is characterised in that, described according to the first address of described internal memory, write described EDID, specifically comprise:
Pass through I2C bus writes order to described ADV7850 chip, so that described ADV7850 chip is according to the first address of described internal memory, writes described EDID.
4. storage means according to claim 1, it is characterised in that,
If described School Affairs is not described preset value, then revise described EDID;
EDID described in enable described DDC port access.
5. storage means according to claim 1, it is characterised in that, if described School Affairs is preset value, then EDID described in enable described DDC port access, specifically comprises:
If described School Affairs is preset value, then pass through I2C bus to described ADV7850 chip write-enable visit order so that the control register in described ADV7850 chip is set to 1.
6. a controller, it is characterised in that, comprising:
Processing unit, for forbidding the static RAM SRAM of the display data passage DDC port access ADV7850 chip of indicating meter, passes through I2C bus is ordered to the write switching of described ADV7850 chip, by the I of described indicating meter2The interface of C bus switches to the storage space for storing the EDID for video interface of described SRAM, to obtain the first address of the internal memory needed for the described EDID of write, described video interface comprises high-resolution multimedia interface HDMI and video and graphic matrix V GA, calculate the School Affairs of described EDID, if described School Affairs is preset value, then EDID described in enable described DDC port access;
Storage unit, for according to the first address of described internal memory, writing described EDID.
7. controller according to claim 6, it is characterised in that,
Described processing unit, specifically for passing through I2C bus, to described ADV7850 chip writing prohibition visit order, so that the control register in described ADV7850 chip is set to 0, if described School Affairs is preset value, then passes through I2C bus to described ADV7850 chip write-enable visit order so that the control register in described ADV7850 chip is set to 1.
8. controller according to claim 6, it is characterised in that,
Described storage unit, specifically for passing through I2C bus writes order to described ADV7850 chip, so that described ADV7850 chip is according to the first address of described internal memory, writes described EDID.
9. controller according to claim 6, it is characterised in that,
Described processing unit, if not being also described preset value for described School Affairs, then revises described EDID, revises EDID described in enable described DDC port access after EDID.
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