CN103487693B - The detection method of machine frame slot - Google Patents
The detection method of machine frame slot Download PDFInfo
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- CN103487693B CN103487693B CN201310441710.3A CN201310441710A CN103487693B CN 103487693 B CN103487693 B CN 103487693B CN 201310441710 A CN201310441710 A CN 201310441710A CN 103487693 B CN103487693 B CN 103487693B
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Abstract
The invention discloses a kind of detection method of machine frame slot, relate to field of hardware, this detection method comprises the following steps: S1, introducing signal quality testing, test relative signal quality index, analyze shared signal and the special signal of different single-deck, and comprehensive importance, filter out test signal; S2, carry out clock signal quality test and bus signals delay inequality test; The test result of S3, the different slot of analysis contrast, and unloaded and under being fully loaded with test result, analyze comparing result, according to full test and the complete documentation result of existing signal quality, and the specification handbook of reference relative signal quality, emphasis filters out underproof test result, and in equipment working range, filter out the test result of upper and lower 20% scope, for these slots, do the checking of machine dish hardware testing.The present invention can specify the signal quality of each slot of machine frame, effectively saves test job amount and test duration, promotes test mass and efficiency.
Description
Technical field
The present invention relates to field of hardware, particularly relate to a kind of detection method of machine frame slot.
Background technology
Common communication facilities or data equipment have many machine frame slot, and each slot of machine frame can be plugged dissimilar machine dish and be carried out work, then realize different functions or expansion capacity.The test of machine frame slot, being a basic test of hardware testing, is also the basis of equipment overall mass.Test purpose be detect each slot work of machine frame can be normal, whether can meet the requirement of design specification, whether the compatibility work of dissimilar machine dish normal etc.The test of machine frame slot comprises the detection to signal quality, basic signal quality testing is by the various signal qualitys on testing circuit board, according to the difference of signal kinds, the quality of gauge signal quality is carried out by different indexs, and the analysis to signal quality, to find the deficiency in system.The technical matters that will solve in the test of machine frame slot comprises: how (1) differentiates the quality of slot, and whether the compatibility of each slot of test machine frame is qualified; (2) how to screen key index, in numerous interconnecting signal, filter out critical signal index; (3) how to find potential risk, find out risky slot, carry out stress test.Tester can according to complete test result, the quality of weighing device overall mass.Machine frame slot test more accurate, the hidden danger of machine frame slot just can more early be found, accordingly on the impact of life period of equipment and plant maintenance cost less.So machine frame slot test is indispensable.Machine frame slot test because will travel through each slot, and will do combined test to the variety classes machine dish on each slot, so workload is very large, also very consuming time.
Summary of the invention
The object of the invention is the deficiency in order to overcome above-mentioned background technology, a kind of detection method of machine frame slot is provided, the signal quality of each slot of machine frame can be specified, effectively save test job amount and test duration, promote test mass and efficiency.
The invention provides a kind of detection method of machine frame slot, comprise the following steps:
S1, introducing signal quality testing, test relative signal quality index, analyzes shared signal and the special signal of different single-deck, and comprehensive importance, filter out test signal;
Test signal comprises clock signal and bus signals, clock signal determine test have primary and backup framing signal, primary and backup clock period signal; Bus signals comprises alarm bus signals, overhead bus signal and control bus signal;
The indices of signal quality testing is:
A, rise time and fall time;
B, delay variation, shake refers to event in time relative to the change of nominal value, refers to the comparison of signal self, relative to the side-play amount of expectation value;
C, high level: the minimum high level allowed when ensureing the high level of logic gate, when I/O level is high level higher than level during threshold level;
Low level: the maximum low level allowed when ensureing the low level of logic gate, when I/O level is low level lower than level during threshold level;
The maximum limit of the high level that d, measured signal reach and low level minimum limit value;
E, special-shaped waveform: in special-shaped waveform, edge monotonicity and upper ditch next time will require to judge in conjunction with the low and high level of this signal; If overshoot, ring and burr find that there is the scope of crossing low and high level requirement, then record will be focused on; Dutycycle is 50%;
F, delay inequality: refer to the time delay difference between two signals;
The relevant information of test signal on backboard comprise pinout information, bus signals far away in nearly slot distribution, the slot schematic diagram of equipment machine frame, the distribution situation of bus signals on backboard;
S2, carry out clock signal quality test and bus signals delay inequality test:
Vacant slot test is adopted during clock signal quality test, clock signal waveform quality on each slot of testing apparatus, content measurement comprises rise time and fall time, delay variation, high level and low level, the maximum limit of high level and low level minimum limit value, special-shaped waveform, if the waveform quality of some slot is not good, these slots is plugged machine dish and supplements test;
When carrying out the test of bus signals delay inequality, according to the loading condition in bus, point zero load, underloading and fully loaded three kinds of situations test: time unloaded, in this bus, machine dish is not all inserted in all slots, and empty frame is tested; During underloading, respectively every root bus far away, in, nearly three slots respectively plug in machine looping test; Full load, all sticks with machine dish to test by slots all in this bus; Test the delay inequality of the delay inequality under zero load/full load conditions between framing signal and clock period signal, zero load/underloading/between full load conditions lower clock period signal and bus signals respectively;
The test result of S3, the different slot of analysis contrast, and unloaded and under being fully loaded with test result: the first qualification of judge index, is then analyzed according to different slot, different operating state:
The difference of each slot: by measuring instrument, recording unit is under same duty, and the quality indication signal result of different slot, by the test result of each slot of across comparison, obtains best and the poorest slot situation;
Duty changes: the equipment that adjusts respectively is under zero load and full load conditions, pass through measuring instrument, recording unit is in the quality index test result of different operating range signals, obtain the numerical result of the performance change scope of equipment, obtain the minimum and maximum value of each slot under different operating state, thus obtain the mobility scale of numerical value, and whether this scope has and exceeds acceptance value border;
Analyze comparing result, according to full test and the complete documentation result of existing signal quality, and the specification handbook of reference relative signal quality, emphasis filters out underproof test result, and in equipment working range, filter out the test result of upper and lower 20% scope, for these slots, do the checking of machine dish hardware testing.
On the basis of technique scheme, further comprising the steps of before step S1: between control webmaster and equipment under test, to set up Control on Communication contact, be responsible for command operation and duty feedback; Between equipment under test and auxiliary measurement equipment, set up work connection status, composition testing authentication environment, measuring instrument is by the coherent signal of test probe monitoring equipment under test, and tracer signal index ' s quality.
On the basis of technique scheme, described test signal also comprises data-signal, and data-signal wouldn't be tested early stage, if after test is pinpointed the problems in earlier stage, the later stage, again according to particular problem, increases the test of relevant signals accordingly.
On the basis of technique scheme, described data-signal comprises high-speed data signal and low speed data signal, and working method is divided into parallel and serial.
On the basis of technique scheme, the time that described rise time and signal experience from low transition to high level is relevant.
On the basis of technique scheme, the described rise time is the 10-90 rise time, refers to that signal jumped to for 90% time experienced from 10% of final value.
On the basis of technique scheme, the described rise time is the 20-80 rise time, refers to that signal jumped to for 80% time experienced from 20% of final value.
On the basis of technique scheme, in step S3 during the qualification of judge index, by the index request inquired about the designing requirement from equipment or the components and parts handbook from machine dish, as the acceptability criteria of test result.
Compared with prior art, advantage of the present invention is as follows:
(1) the present invention can specify the signal quality of each slot of machine frame.Obtain concrete signal quality result by test, the signal quality quality of each slot can be weighed out clearly, thus have the total quality of machine frame and clearly understand, facilitate the later stage to the Curve guide impeller of machine frame, reference is targetedly provided.
(2) the present invention can find out the poor slot of test result, and promotes test mass and efficiency.By the across comparison analysis of the signal quality result to each slot, can find out poor slot, make tester in later stage test, emphasis verifies these slots targetedly.On these slots, also easily more pinpoint the problems, and then promote test mass.Find out poor slot, the checking of the better slot of corresponding minimizing, emphasis verifies poor slot, can promote the efficiency of test.
(3) the present invention can save the workload of test, and promotes testing efficiency.According to the no load test of equipment machine frame and the method for full load test (single type machine dish), the combined test of machine dish kind can be avoided, thus effectively reduce test job amount, significantly promote testing efficiency.
Accompanying drawing explanation
Fig. 1 is the structural representation of test environment in the embodiment of the present invention.
Fig. 2 is the process flow diagram of the detection method of machine frame slot in the embodiment of the present invention.
Embodiment
Below in conjunction with drawings and the specific embodiments, the present invention is described in further detail.
Shown in Figure 1, the testing authentication environment in the embodiment of the present invention is: between control webmaster and equipment under test, set up Control on Communication contact, and is responsible for command operation and duty feedback; Between equipment under test and auxiliary measurement equipment, set up work connection status, composition testing authentication environment, measuring instrument is by the coherent signal of test probe monitoring equipment under test, and tracer signal index ' s quality.
Shown in Figure 2, the embodiment of the present invention provides a kind of detection method of machine frame slot, comprises the following steps:
S1, introducing signal quality testing, test relative signal quality index, analyzes shared signal and the special signal of different single-deck, and comprehensive importance, filter out test signal.
Test signal comprises clock signal, bus signals, data-signal, clock signal determine test have primary and backup framing signal, primary and backup clock period signal; Bus signals comprises all categories that equipment is supported, generally has alarm bus signals, overhead bus signal, control bus signal etc.; Data-signal comprises high-speed data signal and low speed data signal, and working method is divided into parallel and serial kind.Also have other signal of some equipment needs, data-signal and other signal wouldn't be tested early stage, if after test is pinpointed the problems in earlier stage, the later stage, again according to particular problem, increases the test of relevant signals accordingly.
The index of test signal comprises common index and delay inequality index, and index request can be inquired about from the designing requirement of equipment, or inquires about index of correlation requirement from the components and parts handbook of shutdown dish mutually.According to the index request of inquiry, as the acceptability criteria of test result.
In the embodiment of the present invention, the indices of signal quality testing is:
A, rise time (Rise Time) and fall time (Fall Time), the time that rise time and signal experience from low transition to high level is relevant, common have two kinds: one is the 10-90 rise time, refers to that signal jumped to for 90% time experienced from 10% of final value; The second definition mode is the 20-80 rise time, refers to that signal jumped to for 80% time experienced from 20% of final value.Also there is a corresponding value fall time of time domain waveform.
B, delay variation (Jitter), shake refers to that event (such as regular clock signal) is in time relative to the change of nominal value.Such as, the shake that regular clock signal occurs, just refers to the difference between the actual pulse transient time of real clock and desired clock.Shake in the embodiment of the present invention refers to the comparison of signal self, relative to the side-play amount of expectation value.
C, high level (high Voltage) and low level (low Voltage), the minimum high level allowed when can ensure the high level of logic gate, namely when I/O level is higher than threshold level, then thinks that level is high level.Similar, the maximum low level allowed when can ensure the low level of logic gate, namely when I/O level is lower than threshold level, then thinks that level is low level.
D, maximal value (Max Voltage) and minimum value (Min Voltage) are the maximum limit of the high level that measured signal can reach and low level minimum limit value.
E, special-shaped waveform: in special-shaped waveform, edge monotonicity and upper ditch next time will require to judge in conjunction with the low and high level of this signal; If overshoot, ring and burr find that there is the scope of crossing low and high level requirement, then record will be focused on; Dutycycle is roughly all about 50%.
F, delay inequality (Delay), refer to the time delay difference between two signals, such as: signal 1 is at t
0moment arrives, and signal 2 is at t
1moment just arrives, and the delay inequality so between signal 2 and signal 1 is exactly (t
1-t
0).
The relevant information of test signal on backboard comprise pinout information, bus signals far away in nearly slot distribution, the slot schematic diagram of equipment machine frame, the distribution situation of bus signals on backboard, these information can inquire in the design data of equipment, pinout information determines anchor point when measuring, bus signals far away in the distribution of nearly slot can measure signal and the numerical value change situation recently between signal farthest, slot schematic diagram and bus backplane distribution situation are for providing comparative analysis reference factor during end-point analysis.
S2, carry out clock signal quality test and bus signals delay inequality test:
The point-to-point mode of the many employings of clock signal, vacant slot is mainly adopted to test during test, clock signal waveform quality on each slot of testing apparatus, content measurement comprises rise time and fall time, delay variation, high level and low level, the maximum limit of high level and low level minimum limit value, special-shaped waveform, if the waveform quality of some slot is not good, machine dish can be plugged supplement test on these emphasis slots.
Bus signals many employings bus mode, when carrying out the test of bus signals delay inequality, according to the loading condition in bus, point zero load, underloading and fully loaded three kinds of situations test.Time unloaded, in this bus, machine dish is not all inserted in all slots, empty frame test.During underloading, respectively every root bus far away, in, nearly three slots respectively plug in machine looping test; Full load, needs slots all in this bus all to stick with machine dish to test; Test the delay inequality of the delay inequality under zero load/full load conditions between framing signal and clock period signal, zero load/underloading/between full load conditions lower clock period signal and bus signals respectively;
S3, the test result analyzing the different slot of contrast and unloaded and under being fully loaded with test result:
First the qualification of judge index, by the index request inquired about the designing requirement from equipment or the components and parts handbook from machine dish, as the acceptability criteria of test result;
Then be analyzed according to different slot, different operating state:
The difference of each slot: by measuring instrument, recording unit is under same duty, and the quality indication signal result of different slot, by the test result of each slot of across comparison, obtains best and the poorest slot situation.
Duty changes: the equipment that adjusts respectively is in the multiple situation such as unloaded and fully loaded, pass through measuring instrument, recording unit is in the quality index test result of different operating range signals, the numerical result of the performance change scope of equipment can be obtained, obtain each slot, minimum and maximum value under different operating state, thus obtain the mobility scale of numerical value, and whether this scope has and exceeds acceptance value border.
Analyze comparing result, according to full test and the complete documentation result of existing signal quality, and the specification handbook of reference relative signal quality, emphasis filters out underproof test result, and in equipment working range, filter out the test result of upper and lower 20% scope, for these slots, do the machine dish hardware testing checking of great dynamics.
The embodiment of the present invention can be assessed machine frame slot effectively, by the test result filtered out, finds out poor slot, does stress test targetedly, thus improves quality and the efficiency of machine frame slot test.
Those skilled in the art can carry out various modifications and variations to the embodiment of the present invention, if these amendments and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then these revise and modification also within protection scope of the present invention.
The prior art that the content do not described in detail in instructions is known to the skilled person.
Claims (8)
1. a detection method for machine frame slot, is characterized in that, comprises the following steps:
S1, introducing signal quality testing, test relative signal quality index, analyzes shared signal and the special signal of different single-deck, and comprehensive importance, filter out test signal;
Test signal comprises clock signal and bus signals, clock signal determine test have primary and backup framing signal, primary and backup clock period signal; Bus signals comprises alarm bus signals, overhead bus signal and control bus signal;
The indices of signal quality testing is:
A, rise time and fall time;
B, delay variation, shake refers to event in time relative to the change of nominal value, refers to the comparison of signal self, relative to the side-play amount of expectation value;
C, high level: the minimum high level allowed when ensureing the high level of logic gate, when I/O level is high level higher than level during threshold level;
Low level: the maximum low level allowed when ensureing the low level of logic gate, when I/O level is low level lower than level during threshold level;
The maximum limit of the high level that d, measured signal reach and low level minimum limit value;
E, special-shaped waveform: in special-shaped waveform, edge monotonicity and upper ditch next time will require to judge in conjunction with the low and high level of this signal; If overshoot, ring and burr find that there is the scope of crossing low and high level requirement, then record will be focused on; Dutycycle is 50%;
F, delay inequality: refer to the time delay difference between two signals;
The relevant information of test signal on backboard comprise pinout information, bus signals far away in nearly slot distribution, the slot schematic diagram of equipment machine frame, the distribution situation of bus signals on backboard;
S2, carry out clock signal quality test and bus signals delay inequality test:
Vacant slot test is adopted during clock signal quality test, clock signal waveform quality on each slot of testing apparatus, content measurement comprises rise time and fall time, delay variation, high level and low level, the maximum limit of high level and low level minimum limit value, special-shaped waveform, if the waveform quality of some slot is not good, these slots is plugged machine dish and supplements test;
When carrying out the test of bus signals delay inequality, according to the loading condition in bus, point zero load, underloading and fully loaded three kinds of situations test: time unloaded, in this bus, machine dish is not all inserted in all slots, and empty frame is tested; During underloading, respectively every root bus far away, in, nearly three slots respectively plug in machine looping test; Full load, all sticks with machine dish to test by slots all in this bus; Test the delay inequality of the delay inequality under zero load/full load conditions between framing signal and clock period signal, zero load/underloading/between full load conditions lower clock period signal and bus signals respectively;
The test result of S3, the different slot of analysis contrast, and unloaded and under being fully loaded with test result: the first qualification of judge index, is then analyzed according to different slot, different operating state:
The difference of each slot: by measuring instrument, recording unit is under same duty, and the quality indication signal result of different slot, by the test result of each slot of across comparison, obtains best and the poorest slot situation;
Duty changes: the equipment that adjusts respectively is under zero load and full load conditions, pass through measuring instrument, recording unit is in the quality index test result of different operating range signals, obtain the numerical result of the performance change scope of equipment, obtain the minimum and maximum value of each slot under different operating state, thus obtain the mobility scale of numerical value, and whether this scope has and exceeds acceptance value border;
Analyze comparing result, according to full test and the complete documentation result of existing signal quality, and the specification handbook of reference relative signal quality, emphasis filters out underproof test result, and in equipment working range, filter out the test result of upper and lower 20% scope, for these slots, do the checking of machine dish hardware testing.
2. the detection method of machine frame slot as claimed in claim 1, is characterized in that: further comprising the steps of before step S1: between control webmaster and equipment under test, set up Control on Communication contact, and is responsible for command operation and duty feedback; Between equipment under test and auxiliary measurement equipment, set up work connection status, composition testing authentication environment, measuring instrument is by the coherent signal of test probe monitoring equipment under test, and tracer signal index ' s quality.
3. the detection method of machine frame slot as claimed in claim 1, it is characterized in that: described test signal also comprises data-signal, data-signal wouldn't be tested early stage, if after test is pinpointed the problems in earlier stage, later stage, again according to particular problem, increases the test of relevant data signal accordingly.
4. the detection method of machine frame slot as claimed in claim 3, is characterized in that: described data-signal comprises high-speed data signal and low speed data signal, and working method is divided into parallel and serial.
5. the detection method of machine frame slot as claimed in claim 1, is characterized in that: the time that described rise time and signal experience from low transition to high level is relevant.
6. the detection method of machine frame slot as claimed in claim 5, is characterized in that: the described rise time is the 10-90 rise time, refers to that signal jumped to for 90% time experienced from 10% of final value.
7. the detection method of machine frame slot as claimed in claim 5, is characterized in that: the described rise time is the 20-80 rise time, refers to that signal jumped to for 80% time experienced from 20% of final value.
8. the detection method of the machine frame slot according to any one of claim 1 to 7, it is characterized in that: in step S3 during the qualification of judge index, by the index request inquired about the designing requirement from equipment or the components and parts handbook from machine dish, as the acceptability criteria of test result.
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| CN107168146B (en) * | 2017-04-12 | 2019-03-26 | 烽火通信科技股份有限公司 | Promote the system and method for communication equipment machine disk output efficiency |
| CN111488273B (en) * | 2020-03-18 | 2023-06-27 | Oppo（重庆）智能科技有限公司 | Test verification method, test verification device, storage medium and electronic equipment |
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| CN101368992A (en) * | 2007-08-15 | 2009-02-18 | 鸿富锦精密工业（深圳）有限公司 | Test system and method of video signal generator |
| CN101398457A (en) * | 2007-09-25 | 2009-04-01 | 奇景光电股份有限公司 | Wafer, test system thereof, test method thereof, and test fixture thereof |
| CN101609117A (en) * | 2008-06-18 | 2009-12-23 | 珠海天威技术开发有限公司 | Tester and method of testing thereof |
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| AT412242B (en) * | 2000-03-02 | 2004-11-25 | Siemens Ag Oesterreich | METHOD AND ARRANGEMENT FOR TESTING A TEST |
| WO2004003582A1 (en) * | 2002-07-01 | 2004-01-08 | University Of North Carolina At Charlotte | Methods for delay-fault testing in field-programmable gate arrays |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101368992A (en) * | 2007-08-15 | 2009-02-18 | 鸿富锦精密工业（深圳）有限公司 | Test system and method of video signal generator |
| CN101398457A (en) * | 2007-09-25 | 2009-04-01 | 奇景光电股份有限公司 | Wafer, test system thereof, test method thereof, and test fixture thereof |
| CN101609117A (en) * | 2008-06-18 | 2009-12-23 | 珠海天威技术开发有限公司 | Tester and method of testing thereof |
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