CN103487662A - Capacitance detection circuit - Google Patents
Capacitance detection circuit Download PDFInfo
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- CN103487662A CN103487662A CN201310314929.7A CN201310314929A CN103487662A CN 103487662 A CN103487662 A CN 103487662A CN 201310314929 A CN201310314929 A CN 201310314929A CN 103487662 A CN103487662 A CN 103487662A
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Abstract
The invention relates to a detection circuit, and discloses a capacitance detection circuit. The capacitance detection circuit comprises an integrating capacitor Ci, a capacitor Cs to be detected, a current source A, an operational amplifier A0 and an information processing chip, wherein one end of the capacitor Cs to be detected, one end of the integrating capacitor Ci and one end of the current source A are respectively connected with the positive input end of the operational amplifier A0, the other end of the capacitor Cs to be detected and the other end of the current source A are grounded, the other end of the integrating capacitor Ci is connected with the output end of the operational amplifier A0, and the negative input end of the operational amplifier A0 is grounded. Therefore, after a circuit is connected, parts of electric charges on the capacitor Cs to be detected are transferred through the current source A, the other parts of the electric charges on the capacitor Cs to be detected are transferred through the voltage change delta Vout of the output end of the operational amplifier A0, the detected capacitance value range is enlarged, and the signal to noise ratio will not be lowered due to the fact that a detection voltage is not lowered in the detecting process.
Description
Technical field
The present invention relates to electronic applications, particularly capacitive detection circuit.
Background technology
At present, the capacitance touch technical development is rapid, to people life, has brought convenience, this technology at first the touch control detection zone to be divided into to some crossing lattice points anyhow, then by detecting the variation of lattice point capacitance, the positional information of the touch point drawn.
If the capacitance touch technology is classified according to specific implementation, comprise the electric capacity button, self-induction capacitance plate, Inductance and Capacitance screen.Wherein, in electric capacity button and self-induction capacitance plate, its testing capacitance size conversion scope is very large, in some little touch circuit boards, the self-induction capacitor's capacity only has several pico farads, and at some large capacitance touch screen, or, in large electric capacity button, its self-induction capacitance may reach pico farads up to a hundred.
The detection principle of traditional detection mode is: when integration starts, at first stage, as shown in Figure 1, integrating capacitor Ci carries out zero clearing and resets, and capacitor C s to be detected is charged to reference voltage Vref, and this stage can be referred to as sample phase.At second stage, by switch, the Cs upper end is connected with the positive input terminal of operational amplifier A 0, as shown in Figure 2.Suppose the operational amplifier ideal,, when second stage finishes, the operational amplifier input terminal voltage equates; Now, sampling capacitance Cs two terminal potentials are zero, and the electric charge on capacitor C s to be detected all has been transferred to integrating capacitor Ci, and this stage is called charge transfer phase or integration phase.These two stages are called altogether an electric charge migration period or are called integration period, in actual use, the electric charge that can carry out as required repeatedly shifts, and realizes integration, it should be noted that first integration period that the zero clearing of integrating capacitor only starts at integration occurs.According to principle of charge conservation, after can showing that each electric charge shifts, being changed to of amplifier output voltage:
Wherein Δ Vout is the variation size that an electric charge transfer causes the output voltage of operational amplifier.This voltage swing detects and is sent to the digital circuit processing by analog to digital converter, just can judge the capacitance of capacitor C s to be detected.
Yet, in actual applications, for improving antijamming capability, Vref gets height as far as possible, for describing aspect, the power supply of supposing capacitive detection circuit is 3.3V, and Vref is also 3.3V, and this is very general in the routine application, suppose that electric capacity to be detected is 100 pico farads, integrating capacitor is 20 pico farads, and the output voltage of the operational amplifier that each migration period causes is changed to 16.5V, and this has seriously surpassed supply voltage value 3.3V.If go to reduce by the mode that increases integrating capacitor the output voltage variation that each transfer causes, need the above integrating capacitor guarantee of 100 pico farads once to shift the tolerance range that can not exceed operational amplifier, yet, realize that the electric capacity of 100 pico farads needs very large area in integrated circuit.Even the area of 20 pf capacitance value is also considerable, change problem too greatly if remove to solve output voltage by the mode that increases integrating capacitor, during this circuit application situation that capacitor C s to be detected is very little in outside, the each transfer causes that the variation of amplifier output voltage will be very small, can reduce like this signal to noise ratio (S/N ratio) of amplifier output.
As can be seen here, adopt traditional capacitance detecting technology, the scope of capacitance to be detected will be limited in the scope of about 3 pico farads～30 pico farads.
Summary of the invention
The object of the present invention is to provide a kind of capacitive detection circuit, by the extra current source that adds in circuit, make this capacitive detection circuit can be in the situation that electric capacity to be detected is very large also can be detected it.
For solving the problems of the technologies described above, the invention provides a kind of capacitive detection circuit, comprise integrating capacitor, electric capacity to be detected, current source, operational amplifier and information processing chip;
One end of described electric capacity to be detected is connected with the positive input terminal of described operational amplifier, other end ground connection;
One end of described integrating capacitor is connected with the positive input terminal of described operational amplifier, and the other end is connected with the output terminal of described operational amplifier;
One end of described current source is connected with the positive input terminal of described operational amplifier, other end ground connection;
The negative input end ground connection of described operational amplifier;
One end of described signal processing chip is connected with the output terminal of described operational amplifier, and the other end is exported the capacitance that described capacitive detection circuit detects.
Compared with prior art, capacitive detection circuit in the present invention has increased a current source, the Partial charge sent on Cs can be drawn or be filled with to this current source, another part electric charge on Cs is transferred on Ci, so just can under the prerequisite that does not additionally increase integrating capacitor Ci area, reduce △ Vout, and then increase the capacitance scope detected.And do not reduce detection voltage in testing process, therefore can not cause the decline of signal to noise ratio (S/N ratio) yet.
Preferably, current source in the present invention can rationally arrange according to applicable cases size of current and the service time of this current source in charge transfer process, make within △ Vout remains at the tolerance range of operational amplifier A 0, further to detect exactly large-scale capacitance.
In addition, the present invention, according to charge-transfer theory, utilizes following formula to calculate the capacitance of described electric capacity to be detected:
Vref*Cs=ΔVout*Ci+I*T
Wherein, described Δ Vout is the size that after an electric charge shifts, the output end voltage of described operational amplifier changes, described Vref is the reference voltage that described electric capacity to be detected is charged in sample phase, the capacitance that described Cs is described electric capacity to be detected, the capacitance that described Ci is described integrating capacitor, the current value that described I is described current source, described T is the time that described current source is opened.
Because Δ Vout, Vref, Ci, I, T in above-mentioned formula are known number, therefore can calculate very easily the capacitance of capacitor C s to be detected.
Further, the capacitive detection circuit in the present invention has two kinds of mode of operations, and a kind of is that Cs fills with the reverse integral pattern of power transmission lotus to Ci, and a kind of is that Cs draws the forward integral mode of electric charge from Ci, and the scope of application is more extensive.
In addition, signal processing chip in the present invention in capacitive detection circuit also comprises analog to digital converter and digital circuit processor, this analog to digital converter carries out analog to digital conversion by the output end voltage of operational amplifier, obtain the digital signal of this output end voltage, and this digital signal is flowed to the digital circuit processor, this digital circuit processor, again according to formula Vref*Cs=Δ Vout*Ci+I*T, calculates the capacitance of electric capacity to be detected.
The accompanying drawing explanation
Fig. 1 is the sample phase schematic diagram according to capacitive detection circuit in prior art;
Fig. 2 is the charge transfer phase schematic diagram according to capacitive detection circuit in prior art;
Fig. 3 is the sample phase schematic diagram according to the capacitive detection circuit of first embodiment of the invention;
Fig. 4 is the capacitive detection circuit schematic diagram according to first embodiment of the invention;
Fig. 5 is according to the reverse integral pattern capacitive detection circuit schematic diagram in second embodiment of the invention.
embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, the embodiments of the present invention are explained in detail.Yet, persons of ordinary skill in the art may appreciate that in each embodiment of the present invention, in order to make the reader understand the application better, many ins and outs have been proposed.But, even without these ins and outs and the many variations based on following each embodiment and modification, also can realize each claim of the application technical scheme required for protection.
The first embodiment of the present invention relates to a kind of capacitive detection circuit.Specifically as shown in Figure 3 and Figure 4.
This capacitive detection circuit comprises integrating capacitor Ci, capacitor C s to be detected, current source A, operational amplifier A 0 and information processing chip;
The end of capacitor C s to be detected is connected with the positive input terminal of operational amplifier A 0, other end ground connection;
The end of integrating capacitor Ci is connected with the positive input terminal of operational amplifier A 0, and the other end is connected with the output terminal of operational amplifier A 0;
The end of current source A is connected with the positive input terminal of operational amplifier A 0, other end ground connection;
The negative input end ground connection of operational amplifier A 0;
One end of signal processing chip is connected with the output terminal of operational amplifier A 0, the capacitance that other end output capacitance testing circuit detects.
In present embodiment, the testing process of electric capacity is divided two stages specifically:
First stage, as shown in Figure 3, integrating capacitor Ci carries out zero clearing and resets, and capacitor C s to be detected is charged to reference voltage Vref, this is consistent with traditional method;
Second stage, as shown in Figure 4, by switch by capacitor C s to be detected, the end of integrating capacitor Ci and current source A is connected with the positive input terminal of operational amplifier A 0 respectively, other end ground connection by capacitor C s to be detected and current source A, the other end of integrating capacitor Ci is connected with the output terminal of operational amplifier A 0, and by the negative input end ground connection of operational amplifier A 0, after connecting circuit like this, electric charge on capacitor C s to be detected shifts a part by a current source A, another part electric charge is transferred on integrating capacitor Ci, this stage is called charge transfer phase or integration phase.
Suppose operational amplifier A 0 ideal, when second stage finishes, operational amplifier A 0 input end equates with output end voltage, now, capacitor C s two terminal potentials to be detected are zero, and the electric charge on capacitor C s to be detected all is transferred on integrating capacitor Ci and current source A;
In above-mentioned subordinate phase, two-part electric charge shifts the variation that causes operational amplifier A 0 output end voltage Vout, output after operational amplifier A 0 is amplified, the size delta Vout that in charge transfer process of analog to digital converter reception in the information processing chip, operational amplifier A 0 output end voltage changes, the digital circuit processor sent to after analog to digital conversion in the information processing chip is processed, this digital circuit processor, again according to charge-transfer theory, is obtained the capacitance of capacitor C s to be tested easily by expression formula Vref*Cs=Δ out*Ci+I*T.
Above-mentioned first stage and subordinate phase are called altogether an electric charge migration period or are called integration period, in actual use, the electric charge that can carry out as required repeatedly shifts, realize integration, it should be noted that first integration period that the zero clearing of integrating capacitor only starts at integration occurs.
Because the capacitive detection circuit in the present embodiment has increased a current source A, this current source A can draw or fill with the Partial charge sent on capacitor C s to be tested, another part electric charge on capacitor C s to be tested is transferred on integrating capacitor Ci, so just can under the prerequisite that does not additionally increase integrating capacitor Ci area, reduce the big or small △ Vout that in charge transfer process, operational amplifier A 0 output end voltage changes, and then increase the capacitance scope of capacitor C s to be tested, and do not reduce detection voltage in testing process, therefore can not cause the decline of signal to noise ratio (S/N ratio) yet.
For convenience of describing, the electric current of supposing current source herein is I, and the time that current source is opened is T, according to charge-transfer theory, obtains following expression:
In expression formula, Δ Vout represents the size that in charge transfer process, operational amplifier A 0 output voltage changes.Suppose that testing capacitance Cs is 100pf, integrating capacitor Ci is 20pf, and reference voltage Vref is 3.3V, and current source A current value I is taken as 150uA, and current source A opening time T is taken as 2us, can obtain:
This is a rational magnitude of voltage.On the other hand, if capacitor C s to be tested hour, we can suitably reduce current value I or the service time T of current source A, make within △ Vout remains at the tolerance range of operational amplifier A 0, further to detect exactly large-scale capacitance.
In actual capacitance measurement process, because Δ Vout, Vref, Ci, I, T in above-mentioned formula are known number, therefore can calculate very easily the capacitance of capacitor C s to be detected.
The second embodiment of the present invention relates to a kind of capacitive detection circuit, as Fig. 5.The second embodiment and the first embodiment are roughly the same, and key distinction part is: in the first embodiment, Cs fills with the power transmission lotus to Ci, is called the reverse integral pattern; And, in second embodiment of the invention, Cs draws electric charge from Ci, be called the forward integral mode.That is to say, in the present embodiment, the Partial charge on integrating capacitor Ci is filled with and is delivered to capacitor C s to be tested above, and another part electric charge is shared by current source A.Its principle of work is identical with the first embodiment, does not repeat them here.
Persons of ordinary skill in the art may appreciate that the respective embodiments described above are to realize specific embodiments of the invention, and in actual applications, can do various changes to it in the form and details, and without departing from the spirit and scope of the present invention.
Claims (5)
1. a capacitive detection circuit, is characterized in that, comprises integrating capacitor Ci, electric capacity to be detected, current source Cs, operational amplifier A 0 and signal processing chip;
The end of described capacitor C s to be detected is connected with the positive input terminal of described operational amplifier A 0, other end ground connection;
The end of described integrating capacitor Ci is connected with the positive input terminal of described operational amplifier A 0, and the other end is connected with the output terminal of described operational amplifier A 0;
The end of described current source A is connected with the positive input terminal of described operational amplifier A 0, other end ground connection;
The negative input end ground connection of described operational amplifier A 0;
One end of described signal processing chip is connected with the output terminal of described operational amplifier A 0, the capacitance of the capacitor C s to be detected that other end output detections arrives.
2. capacitive detection circuit according to claim 1, is characterized in that, the size of current of described current source A and service time can be adjusted in real time.
3. according to the capacitive detection circuit described in claim 1, it is characterized in that described information processing chip calculates the capacitance of described capacitor C s to be detected according to following formula:
Vref*Cs=ΔVout*Ci+I*T
Wherein, the output end voltage that described Δ Vout is described operational amplifier A 0 after an electric charge shifts, described Vref is the reference voltage that described electric capacity to be detected is charged in sample phase, the capacitance that described Cs is described electric capacity to be detected, the capacitance that described Ci is described integrating capacitor, the current value that described I is described current source A, described T is the time that described current source A opens.
4. according to the described capacitive detection circuit of claim 1 or 3, it is characterized in that, described capacitive detection circuit has two kinds of mode of operations, and a kind of is that Cs fills with the reverse integral pattern of power transmission lotus to Ci, and another kind is that Cs draws the forward integral mode of electric charge from Ci.
5. capacitive detection circuit according to claim 1, is characterized in that, described signal processing chip comprises analog to digital converter and digital circuit processor;
One end of described analog to digital converter is connected with the output terminal of described operational amplifier, the other end is connected with the input end of described digital circuit processor, after the voltage that described analog to digital converter is exported described operational amplifier carries out analog to digital conversion, export to described digital circuit processor;
Described digital circuit processor, for the digital signal according to after described analog to digital converter conversion, calculates the capacitance of described electric capacity to be detected.
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Cited By (8)
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| CN105024681A (en) * | 2015-06-25 | 2015-11-04 | 深圳市芯海科技有限公司 | Touch detection circuit capable of adjusting sensitivity and range |
| CN107003347A (en) * | 2015-10-23 | 2017-08-01 | 深圳市汇顶科技股份有限公司 | Capacitive detection sensor and its relevant apparatus and system |
| CN107247190A (en) * | 2017-05-24 | 2017-10-13 | 欧常春 | A kind of capacitive detection circuit of utilization electric charge zoom technology |
| CN107728829A (en) * | 2016-08-12 | 2018-02-23 | 意法半导体亚太私人有限公司 | Sample frequency and accumulator scanning in touch screen controller |
| CN108828322A (en) * | 2018-05-09 | 2018-11-16 | 淮安信息职业技术学院 | A kind of low capacity capacitor high-speed detection circuit |
| CN109342823A (en) * | 2018-09-29 | 2019-02-15 | 北京长城华冠汽车科技股份有限公司 | Measuring circuit, control method and the electric car of Y capacitance |
| WO2019062810A1 (en) * | 2017-09-30 | 2019-04-04 | 苏州迈瑞微电子有限公司 | Charge type sensor, sensor array having same, and method for acquiring integrating circuit mismatch adjustment parameter |
| CN112485640A (en) * | 2020-11-18 | 2021-03-12 | 苏州华兴源创科技股份有限公司 | Detection method and device for built-in capacitor, detection equipment and storage medium |
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| CN105024681A (en) * | 2015-06-25 | 2015-11-04 | 深圳市芯海科技有限公司 | Touch detection circuit capable of adjusting sensitivity and range |
| US10372960B2 (en) | 2015-10-23 | 2019-08-06 | Shenzhen GOODIX Technology Co., Ltd. | Capacitance detecting sensors and related devices and systems |
| CN107003347A (en) * | 2015-10-23 | 2017-08-01 | 深圳市汇顶科技股份有限公司 | Capacitive detection sensor and its relevant apparatus and system |
| CN107003347B (en) * | 2015-10-23 | 2019-12-17 | 深圳市汇顶科技股份有限公司 | Capacitive detection sensor and related device and system |
| CN107728829A (en) * | 2016-08-12 | 2018-02-23 | 意法半导体亚太私人有限公司 | Sample frequency and accumulator scanning in touch screen controller |
| CN107247190B (en) * | 2017-05-24 | 2019-09-10 | 欧常春 | A kind of capacitive detection circuit using charge zoom technology |
| CN107247190A (en) * | 2017-05-24 | 2017-10-13 | 欧常春 | A kind of capacitive detection circuit of utilization electric charge zoom technology |
| WO2019062810A1 (en) * | 2017-09-30 | 2019-04-04 | 苏州迈瑞微电子有限公司 | Charge type sensor, sensor array having same, and method for acquiring integrating circuit mismatch adjustment parameter |
| CN108828322A (en) * | 2018-05-09 | 2018-11-16 | 淮安信息职业技术学院 | A kind of low capacity capacitor high-speed detection circuit |
| CN108828322B (en) * | 2018-05-09 | 2024-02-06 | 江苏电子信息职业学院 | High-speed detection circuit of low-capacity capacitor |
| CN109342823A (en) * | 2018-09-29 | 2019-02-15 | 北京长城华冠汽车科技股份有限公司 | Measuring circuit, control method and the electric car of Y capacitance |
| CN109342823B (en) * | 2018-09-29 | 2020-12-01 | 北京长城华冠汽车科技股份有限公司 | Measuring circuit and control method of Y capacitor and electric automobile |
| CN112485640A (en) * | 2020-11-18 | 2021-03-12 | 苏州华兴源创科技股份有限公司 | Detection method and device for built-in capacitor, detection equipment and storage medium |
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