CN103475371A - Over-sampling analog-digital conversion circuit - Google Patents
Over-sampling analog-digital conversion circuit Download PDFInfo
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- CN103475371A CN103475371A CN2013103958573A CN201310395857A CN103475371A CN 103475371 A CN103475371 A CN 103475371A CN 2013103958573 A CN2013103958573 A CN 2013103958573A CN 201310395857 A CN201310395857 A CN 201310395857A CN 103475371 A CN103475371 A CN 103475371A
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Abstract
The invention discloses an over-sampling analog-digital conversion circuit which is formed by connecting in series an analog filter, a first analog-digital converter and a digital filter in sequence. The input end of the analog filter is connected in series with a sampling device, the sampling device and the first analog-digital converter are connected in parallel with a digital-analog converter, the digital-analog converter is connected in parallel with a second analog-digital converter, the output end of the digital filter is connected in series with a CIC down-sampling filter, a down-sampling circuit is formed by connecting in series a high-frequency end, the sampling device and a low-frequency end in sequence, and the output end of the second analog-digital converter is connected with the sampling device in the CIC down-sampling filter. Through the over-sampling analog-digital conversion circuit, the analog-digital converter in the same design can improve the sampling speed on the premise of maintaining the same sampling accuracy, and low-frequency end and the high-frequency end can be optimized according to the overall performance.
Description
Technical field
The present invention relates to a kind of analog to digital conversion circuit, relate in particular to a kind of over-sampling analog to digital conversion circuit.
Background technology
The existing high-order sampling modulus conversion technique of crossing is generally adopted the Leslie-Singh framework, also referred to as the MASH framework; This structure cascade an over-sampling feedback loop (analog-to-digital conversion ADC1, digital-to-analogue conversion DAC) and another one analog-to-digital conversion ADC2.To the over-sampling feedback loop, can adopt a feedback (analog-to-digital conversion ADC1, digital-to-analogue conversion DAC is a precision), or multidigit feedback (analog-to-digital conversion ADC1, digital-to-analogue conversion DAC is long precision).Adopt the digital-to-analogue conversion of can forever guarantee linearity.Adopt the digital-to-analogue conversion of long precision can reduce the quantizing noise fed back, but the linearity of the digital-to-analogue conversion of long precision is retrained by the matching precision of device on chip.The linearity of this digital-to-analogue conversion, having determined the linearity and the quantified precision of whole oversampling analog-to-digital converter often becomes performance bottleneck, and the circuit that space required is very large or compensatory approach are as dynamic device compensation etc.
Summary of the invention
Technical problem to be solved by this invention is that a kind of over-sampling analog to digital conversion circuit that can promote sample rate is provided.
In order to solve the problems of the technologies described above, the present invention is achieved by the following technical solutions: a kind of over-sampling analog to digital conversion circuit, by analog filter, the first analog to digital converter and digital filter are composed in series successively, the input of described analog filter is in series with sampler, be parallel with digital to analog converter on sampler and the first analog to digital converter, be parallel with the second analog to digital converter on this digital to analog converter, be in series with the CIC desampling fir filter on the output of described digital filter, this down-sampled circuit is by front end, sampler and low frequency end are in series successively, the output of the second analog to digital converter is connected with the sampler in the CIC desampling fir filter.
Preferably, be in series with a sampler on the input of described the second analog to digital converter, and the output of this sampler connecting analog filter.
Preferably, respectively be provided with a switch between described front end and sampler and the second analog to digital converter and sampler.
Compared with prior art, usefulness of the present invention is: after adopting this over-sampling analog to digital conversion circuit framework, the analog to digital converter of same design can promote sample rate under the prerequisite that keeps same sampling precision, and the design of low frequency end and front end can be according to overall performance optimization.
the accompanying drawing explanation:
Below in conjunction with accompanying drawing, the present invention is further described.
Fig. 1 is a kind of over-sampling analog to digital conversion circuit of the present invention structural representation.
In figure: 1, analog filter; 2, the first analog to digital converter; 3, digital filter; 4, digital to analog converter; 5, the second analog to digital converter; 6, front end; 7, low frequency end; 8, decimator; 9, CIC desampling fir filter.
embodiment:
Below in conjunction with the drawings and the specific embodiments, describe the present invention:
A kind of over-sampling analog to digital conversion circuit shown in Fig. 1, by analog filter 1, the first analog to digital converter 2 and digital filter 3, be composed in series successively, the input of described analog filter 1 is in series with sampler 8, be parallel with digital to analog converter 4 on sampler 8 and the first analog to digital converter 2, be parallel with the second analog to digital converter 5 on this digital to analog converter 4, be in series with a sampler 8 on the input of described the second analog to digital converter 5, and the output of these sampler 8 connecting analog filters 1; Be in series with CIC desampling fir filter 9 on the output of described digital filter 3, this down-sampled circuit 9 is in series successively by front end 6, sampler 8 and low frequency end 7, and the output of the second analog to digital converter 5 is connected with the sampler 8 in CIC desampling fir filter 9; Respectively be provided with a switch between described front end 6 and sampler 8 and the second analog to digital converter 5 and sampler 8.
After adopting this over-sampling analog to digital conversion circuit framework, the analog to digital converter of same design can promote sample rate under the prerequisite that keeps same sampling precision, and the design of low frequency end 7 and front end 6 can be according to overall performance optimization.
It is emphasized that: above is only preferred embodiment of the present invention, not the present invention is done to any pro forma restriction, any simple modification, equivalent variations and modification that every foundation technical spirit of the present invention is done above embodiment, all still belong in the scope of technical solution of the present invention.
Claims (3)
1. an over-sampling analog to digital conversion circuit, by analog filter (1), the first analog to digital converter (2) and digital filter (3) are composed in series successively, the input of described analog filter (1) is in series with sampler (8), be parallel with digital to analog converter (4) on sampler (8) and the first analog to digital converter (2), be parallel with the second analog to digital converter (5) on this digital to analog converter (4), it is characterized in that: be in series with CIC desampling fir filter (9) on the output of described digital filter (3), this down-sampled circuit (9) is by front end (6), sampler (8) and low frequency end (7) are in series successively, the output of the second analog to digital converter (5) is connected with the sampler (8) in CIC desampling fir filter (9).
2. sampling analog to digital conversion circuit according to claim 1 is characterized in that: be in series with a sampler (8) on the input of described the second analog to digital converter (5), and the output of this sampler (8) connecting analog filter (1).
3. sampling analog to digital conversion circuit according to claim 1 and 2, is characterized in that: between described front end (6) and sampler (8) and the second analog to digital converter (5) and sampler (8), respectively be provided with a switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013103958573A CN103475371A (en) | 2013-09-04 | 2013-09-04 | Over-sampling analog-digital conversion circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2013103958573A CN103475371A (en) | 2013-09-04 | 2013-09-04 | Over-sampling analog-digital conversion circuit |
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| CN103475371A true CN103475371A (en) | 2013-12-25 |
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| CN2013103958573A Pending CN103475371A (en) | 2013-09-04 | 2013-09-04 | Over-sampling analog-digital conversion circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104734715A (en) * | 2015-04-20 | 2015-06-24 | 山东大学 | Method for improving A/D (analog/digital) converter resolution |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04150318A (en) * | 1990-10-11 | 1992-05-22 | Nec Corp | A/d converter |
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2013
- 2013-09-04 CN CN2013103958573A patent/CN103475371A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04150318A (en) * | 1990-10-11 | 1992-05-22 | Nec Corp | A/d converter |
Non-Patent Citations (1)
| Title |
|---|
| JÁNOSMÁRKUS ETC.: "《An Efficient Δ∑ADC Architecture for Low Oversampling Ratios》", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I》, vol. 51, no. 1, 31 January 2004 (2004-01-31), pages 63 - 71 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104734715A (en) * | 2015-04-20 | 2015-06-24 | 山东大学 | Method for improving A/D (analog/digital) converter resolution |
| CN104734715B (en) * | 2015-04-20 | 2018-04-17 | 山东大学 | A kind of method for improving A/D converter resolution ratio |
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Application publication date: 20131225 |