CN103473213A - System for loading and extracting parallel information of optical vector-matrix multiplier - Google Patents
System for loading and extracting parallel information of optical vector-matrix multiplier Download PDFInfo
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- CN103473213A CN103473213A CN2013104148817A CN201310414881A CN103473213A CN 103473213 A CN103473213 A CN 103473213A CN 2013104148817 A CN2013104148817 A CN 2013104148817A CN 201310414881 A CN201310414881 A CN 201310414881A CN 103473213 A CN103473213 A CN 103473213A
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Abstract
The invention provides a system for loading and extracting parallel information of an optical vector-matrix multiplier. The system serves as an independently running organic whole with a self-contained system and slips the leash of discrete equipment such as a signal generator, an oscilloscope and an optical amplifier, and the optical vector-matrix multiplier can be conveniently, visually, flexibly and accurately tested and analyzed.
Description
technical field
The present invention relates to the optical information processing technical field, relate in particular to a kind of system that loads and extract for the optical vector-matrix multiplier parallel information.
Background technology
The optical information processing mode has is with that roomy, concurrency is strong, the advantage such as little of crosstalking, Vector-Matrix Multiplier based on the optical information processing mode has been suitable for intensive vector-matrix multiplication (Vector Matrix Multiplication, VMM) task, realize high-speed multiplication (Multiplication and Accumulation, the MAC) computing that adds up.And the MAC computing is its main operational process in digital signal processing, the optical digital signal treatment technology of research based on optical vector-matrix multiplier, can break through the bottleneck that electronics calculates, and realizes optical computing at a high speed.This technology can be widely used in radar and sonar system, image and speech recognition, password generates and crack, the mass data processing fields such as resource detection and data analysis, caused domestic and international researchist's common concern.
U.S.'s Oak Ridge National Laboratory is at document " SENSOR DATA PROCESSING FOR TRACKING UNDERWATER THREATS USING TERASCALE OPTICAL CORE DEVICES. " (Harbour Protection Through Data Fusion Technologies, 2008,267-282.) in the application of optical digital signal treatment technology in the shore-based sonar field has been discussed, designed difference algorithm time of arrival, analyzed and adopted optical vector-matrix multiplier to complete many advantageous characteristic of this class algorithm.". Digital, Partitioning, for, Increased, Dynamic, Range, in, a, Hybrid, Optoelectronic, Vector, Matrix, Processor" British BAE, System Company in the literature (4th, EMRS, DTC, Technical, Conference.Edinburgh: 2007: . A14) and literature ". Optical, Testbed, for, Hybrid, Optoelectronic, Vector, Matrix, Processor, for, Radar, Signal, Processing" (3rd, EMRS, DTC, Technical, Conference.Edinburgh: 2006:. B28) in designed vector - matrix multiplier optical structure model, given the design of the optical system in the static signal spot array pattern.The M.Gruber group of Germany Hagen university is at document " Planar-integrated optical vector-matrix multiplier. " (Applied optics, 2000,39 (29): the optical vector-matrix multiplier based on Planar integration has been discussed 5367-5373.), this seminar adopts the micro-processing methods such as many mask lithographies and reactive ion etching, on quartz glass, make Free Space Optics Vector-Matrix Multiplier and electricity VLSI technology be able to compatibility the VMM structure assembly.Domestic aspect, the National University of Defense technology has realized that in 2009 the physical link of 4 road optical vector-matrix multipliers and stationary singnal load; Chinese Academy of Sciences's Suzhou nanometer for the damascene structures of spatial light modulator and optics VMM core, explore; Chinese Academy of Sciences's semiconductor realized the physical link of 16 road optical vector-matrix multipliers in 2010, and completed silicon-based integrated optical vector-matrix multiplier design and experimental verification the end of the year 2011.
Above document is all to be based on optical vector-matrix multiplier itself, carried out the simulation and design of optical texture, and adopt discrete reference instrument or the equipment such as laser instrument, optical modulator module, signal generator, photodetection module to be tested designed VMM unit, to verify the rationality of designed optical texture.
Fig. 1 is the schematic diagram of prior art for the loading of optical vector-matrix multiplier information and extraction system.Please refer to Fig. 1, this system is based on commercialization testing apparatuss such as pattern generator, LASER Light Source, real-time oscilloscopes, annexation between each equipment and device is as follows: pattern generator (1) is connected by cable with modulator matrices (2), and modulator matrices (2) is connected by optical fiber with optical vector matrix multiplier.Optical vector matrix multiplier is connected with photodetector (4) by optical fiber, and photodetector (4) is connected with real-time oscilloscope (5) by cable.The Lights section is a plurality of parallel submodules, the empty wire frame representation of each submodule, mean the generation module of a vector element in each dotted line frame, in this module, LASER Light Source is connected with electrooptic modulator by optical fiber, pattern generator is connected with electrooptic modulator by cable, and the output terminal of each electrooptic modulator is connected with optical vector matrix multiplier by optical fiber.As shown in fig. 1, dotted arrow is that the light mouth connects, and solid arrow is that electricity mouthful connects.
Based on said apparatus, for the optical vector matrix multiplier on n road, the loading of the information of existing system and leaching process are as follows:
(1) open pattern generator, give the modulator matrices assignment;
(2) open successively module (6), module (7) ... module (6+n-1), regulated the input stimulus of vector matrix multiplier; Adjustment process for each module is as follows:
2.1 open LASER Light Source and pattern generator, make pattern generator produce a pseudo-random sequence, obtain waveform on real-time oscilloscope;
2.2 regulate the intensity of light source and the biasing of electrooptic modulator, make the voltage magnitude obtained on real-time oscilloscope at V
land V
hbetween.
(3) for module (6), module (7) ... module (6+n-1) all carries out, as the described adjustment process of step (2), making each module to obtain amplitude at V on oscillograph
land V
hbetween voltage signal, recording and obtain amplitude on oscillograph is V
land V
hbetween voltage signal between the time LASER Light Source intensity, the parameters such as biasing of electrooptic modulator, these parameters are referred to as P
i(i=6,7 ..., 6+n-1):
(4) to module (6), module (7) ... module (6+n-1) give respectively parameter P
in LASER Light Source, n road pattern generator, a n electrooptic modulator are opened simultaneously, give module module (6), module (7) ... module (6+n-1) Zhong Ge road pattern generator is given the pseudo random sequence code of same period length, and keeps, between the signal of every road, fixing phase differential is arranged;
(5) observe and record the waveform obtained on oscillograph now, analyze the consistance of this waveform and the calculated results.
In realizing process of the present invention, the applicant finds that there is following defect in the existing system that loads and extract for the optical vector-matrix multiplier parallel information:
(1) information loads and leaching process is to carry out on the test macro of building at ready-made separate devices or instrument, and bulky, dirigibility and extendability are poor;
(2) information load and leaching process in need manually repeatedly to regulate each road light source and electrooptic modulator, the waveform by the observation real-time oscilloscope judges that whether the driving source parameter suitable, adjustment process is very loaded down with trivial details and mistake easily occurs;
(3) information loading and leaching process only rest on the test of optical vector matrix multiplier being calculated to the function of core own, do not have to form the optoelectronic hybrid computing system with own system, are difficult to adapt to the algorithm research in later stage and are put to application.
Summary of the invention
(1) technical matters that will solve
In view of above-mentioned technical matters, the invention provides a kind of system that loads and extract for optical vector-matrix multiplier parallel high-speed information.
(2) technical scheme
To achieve these goals, the system that the present invention loads and extracts for the optical vector-matrix multiplier parallel information comprises:
The input vector data cache module, for the vectorial raw data of buffer memory input;
The input matrix data cache module, for the matrix raw data of buffer memory input;
Data preprocessing module, for: (a) resolution of described vectorial raw data and matrix raw data is adjusted respectively, both figure places and optical vector-matrix multiplier performance are complementary; (b) described vector data and matrix data are carried out to piecemeal, the exponent number of vector data and matrix data and the input end port number of optical vector-matrix multiplier are complementary;
Vector data load-on module array, for receiving the vector data of described front end data pretreatment module output, and be converted to current signal by each data element in vector data, is supplied to respectively corresponding laser instrument in laser array;
Laser array, comprise several laser instruments, and wherein each laser instrument is for the modulating current switching signal of the corresponding vector data load-on module output of receiving front-end, for optical vector-matrix multiplier provides the array light source vectorial operator;
The matrix data load-on module, for: (a) receive low resolution that described front end data pretreatment module exports and the matrix data of low exponent number, and convert each data element in matrix data to DVI video code model data; (b) receive DVI video code model data, complete the loading of each pixel data of spatial light modulator, for optical vector-matrix multiplier provides matrix operator;
Detector array, for receiving the array light signal from the sign operation result of Vector-Matrix Multiplier output, single detector unit in detector array, after the light signal received is converted to photo-signal, output to photo-signal in the operation result information extraction modules;
Operation result information extraction modules array, for the n road photo-signal of receiving front-end detector array, Bing Jiangmei road photo-signal is converted to digital signal, exports in the Data Post module;
The Data Post module, for: (a) receive the digital signal that operation result information extraction modules array produces, digital signal is carried out to filtering, remove the noise in digital signal, form level and smooth discrete digital amount; (b) filtered level and smooth discrete digital amount is carried out to Gauss in each clock period average, obtain characterizing in certain cycle the characteristic quantity of operation result; (c) characteristic quantity of the sign operation result in certain cycle and the gray scale rank thresholding set are compared and adjudicate, obtain characterizing the gray scale rank value of vector-matrix multiplication result;
The information extraction memory headroom, carry out the related middle ephemeral datas of computing such as filtering, Gauss are average, the differentiation of gray scale rank to data for the temporal data post-processing module;
The result vector data cache module, the gray scale rank value of the sign obtained for data cached post-processing module vector-matrix multiplication result, and it is sent through the RapidIO HSSI High-Speed Serial Interface.
(3) beneficial effect
From technique scheme, can find out, the system that the present invention loads and extracts for the optical vector-matrix multiplier parallel information has following beneficial effect:
(1) the proposed by the invention system that loads and extract for optical vector matrix multiplier parallel high-speed information, as a set of independent operating and have the organic whole of own system, broken away from the constraint that adopts the discrete equipment such as signal generator, oscillograph, image intensifer, can facilitate, intuitively, flexibly, exactly optical vector-matrix multiplier be tested and analyzed;
(2) the proposed by the invention system that loads and extract for optical vector matrix multiplier parallel high-speed information, peripheral detector information extraction module, laser module, FPGA information process unit are combined, form closed feedback system, automatically Dui Mei road laser instrument is regulated the excitation of calculating core, realizes self-calibration and correction;
(3) the proposed by the invention system that loads and extract for optical vector matrix multiplier parallel high-speed information is by function and optical computing core (the being optical vector-matrix multiplier) combinations such as synchronous and control of electrical information loading, raw data pre-service, operation result aftertreatment, system data, formed a set of optical digital signal disposal system with high speed MAC kernel, this system can meet in the mass data processing fields such as sonar, radar, cryptography, voice, image the real-time processing requirements to large-scale data.
The accompanying drawing explanation
Fig. 1 is that prior art is for the information loading of optical vector-matrix multiplier and the schematic diagram of extraction system.
Fig. 2 is the system architecture schematic diagram that the embodiment of the present invention loads and extracts for optical vector-matrix multiplier parallel high-speed information.
Fig. 3 is the control bus structural representation for the output of dynamic adjustments laser instrument in the specific embodiment of the invention.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and, with reference to accompanying drawing, the present invention is described in more detail.It should be noted that, in accompanying drawing or instructions description, similar or identical part is all used identical figure number.The implementation that does not illustrate in accompanying drawing or describe is form known to a person of ordinary skill in the art in affiliated technical field.In addition, although this paper can provide the demonstration of the parameter that comprises particular value, should be appreciated that, parameter is without definitely equaling corresponding value, but can in acceptable error margin or design constraint, be similar to corresponding value.In addition, the direction term of mentioning in following examples, such as " on ", D score, 'fornt', 'back', " left side ", " right side " etc., be only the direction with reference to accompanying drawing.Therefore, the direction term of use is not to be used for limiting the present invention for illustrating.
The invention provides a kind of system that loads and extract for optical vector-matrix multiplier parallel high-speed information, by the input vector data cache module, the input matrix data cache module, data preprocessing module, vector data load-on module array, the matrix data load-on module, Vector-Matrix Multiplier, laser array, detector array, operation result information extraction modules array, the Data Post module, the information extraction memory headroom, the structures such as result vector data cache module, solved and take the optical digital signal disposal system integration problem that Vector-Matrix Multiplier is the MAC operation core.
In one exemplary embodiment of the present invention, provide a kind of system that loads and extract for optical vector-matrix multiplier parallel high-speed information, as shown in Figure 2.This system comprises: input vector data cache module 1, input matrix data cache module 2, data preprocessing module 3, vector data load-on module array 4 (comprise 4.1,4.2 ... 4.n Deng submodule), matrix data load-on module 5, laser array 6, Vector-Matrix Multiplier 7, detector array 8, operation result information extraction modules array 9 (comprise 9.1,9.2 ... 9.n Deng submodule), Data Post module 10, information extraction memory headroom 11, result vector data cache module 12.Wherein:
(1) input vector data cache module
This input vector data cache module, for the vectorial raw data of buffer memory input, it is realized by CY7C009 type dual port RAM.
The vectorial raw data of input is sent in CY7C009 type dual port RAM by the RapidIO HSSI High-Speed Serial Interface, completes the transmission of not frame losing in real time of vectorial raw data by this CY7C009 type double-interface RAM buffer, and the data after buffer memory are sent in data preprocessing module 3.
Simultaneously, the middle ephemeral data in the vector data preprocessing process is also kept in this module, so that the carrying out of Preprocessing Algorithm.
(2) input matrix data cache module
This input matrix data cache module, for the matrix raw data of buffer memory input, it is realized by CY7C009 type dual port RAM.
The input matrix original data block is sent in CY7C009 type dual port RAM by the RapidIO HSSI High-Speed Serial Interface, complete the transmission of not frame losing in real time of matrix raw data by double-interface RAM buffer, the data after buffer memory are sent in the formed data preprocessing module 3 of XC5VLX50T type FPGA device.
Simultaneously, the middle ephemeral data in the vector data preprocessing process is also kept in this module, so that the carrying out of Preprocessing Algorithm.
(3) data preprocessing module
Data preprocessing module, for:
(a) each element in vectorial raw data and matrix raw data is cut apart, make its decrease resolution, vector data element after decrease resolution and the figure place of matrix data element and optical vector-matrix multiplier performance are complementary, for example: optical vector-matrix multiplier is 2 to the figure place requirement of input data, needs vectorial primitive data element is divided into to the primitive that figure place is 2;
(b) vector data and matrix data are carried out to piecemeal, the exponent number of vector data and matrix data and the input end port number of optical vector-matrix multiplier are complementary, for example: the input end port number of optical vector-matrix multiplier is 8 tunnels, and the exponent number of vector data and matrix data is blocked at most 8 rank.
(4) vector data load-on module array
This vector data load-on module array, for the low resolution of receiving front-end data preprocessing module output and the vector data (each vector data comprises n element) of low exponent number, and each data element in vector data is converted to current signal, be supplied to respectively corresponding laser instrument in laser array.
This vector data load-on module array comprises: the n be set up in parallel an identical vector data load-on module, each vector data load-on module provides the current signal excitation for a road laser instrument, as the way of laser instrument is n, corresponding data load-on module is respectively (4.1), (4.2) ... (4.n).
This vector data load-on module comprises: MAX9371 type level transferring chip, MAX3669 type current-output type drive chip, MAX5497 type digital regulation resistance chip, MAX5496 type digital regulation resistance chip, MAX1978 type temperature control chip.
MAX9371 type level transferring chip, for the low resolution of receiving front-end data preprocessing module output and the vector data of low exponent number, and be converted into the logic level signal that the MAX3669 current-output type drives the chip input end to identify;
The MAX3669 current-output type drives chip, for the logic level signal produced according to MAX9371, produces the switching signal of controlling corresponding laser modulation current, encourages corresponding laser instrument.
MAX5497 type digital regulation resistance chip includes two variable resistors, these two variable resistors are connected with the modulating current control end with the bias current of MAX3669 respectively, the control word instruction that MAX5497 produces for receiving front-end data preprocessing module FPGA, control its inner two variable-resistance sizes by this instruction, control output offset electric current and the modulation electric flow valuve of MAX3669 by the size of regulating these two resistance values.
A variable resistor of MAX5496 type digital regulation resistance chip internal is connected with the automated power control end of MAX3669, the control word instruction that MAX5496 produces for receiving front-end data preprocessing module FPGA, control its inner variable-resistance size by this instruction, control the output power of MAX3669 by regulating this resistance value.
Another variable resistor of MAX5496 type digital regulation resistance chip internal is connected with the temperature control end of MAX1978 type temperature control chip, the control word instruction that MAX5496 produces for receiving front-end pretreatment module FPGA, control its inner variable-resistance size by this instruction, control the temperature control point of MAX1978 by regulating this resistance value, MAX1978 feeds back by PID the refrigeration module that the output feedback current is controlled laser instrument inside, realizes the temperature of laser instrument is controlled.
MAX1978 type temperature control chip, for receiving the temperature control point signal that MAX5496 provides, feed back the output feedback current by PID, send this feedback current to laser instrument, control the refrigeration module of laser instrument inside, realize the temperature of laser instrument is controlled.
(5) matrix data load-on module
The matrix data load-on module consists of a slice CH7301C type DVI coding chip and a LC-R720 type spatial light modulator.
CH7301C type DVI coding chip, the low resolution of exporting from the front end data pretreatment module for reception and the matrix data (comprising n * n element) of low exponent number, and convert each data element in matrix data to DVI video code model data, by the DVI interface, input in LC-R720.
The LC-R720C spatial light modulator, the DVI video code model data of exporting for receiving CH7301C type DVI coding chip, complete the loading of each pixel data of spatial light modulator, and being embodied as optical vector-matrix multiplier provides matrix operator.
(6) laser array
Laser array is formed by a plurality of 6001A type Distributed Feedback Lasers and fiber array coupling.
Each laser instrument in laser array is for the modulating current switching signal of the corresponding vector data load-on module of receiving front-end MAX3669 output, for optical vector-matrix multiplier provides the array light source vectorial operator.Also want the feedback current of MAX1978 output in the corresponding vector data load-on module of receiving front-end simultaneously, complete the refrigeration control to self.
(7) Vector-Matrix Multiplier
The optical system that Vector-Matrix Multiplier is formed by post lens, circle lens etc. realizes, for receiving the array light source vectorial operator from laser array, receive the matrix operator from the matrix data load-on module simultaneously, after completing the multiplication and accumulating operation of signal in the light territory, output characterizes the array light signal of operation result.
(8) detector array
Detector array is coupled to form by a plurality of RPD3000-FA type photodetectors and fiber array.For receiving the array light signal from the sign operation result of Vector-Matrix Multiplier output, single detector unit in detector array, after the light signal received is converted to photo-signal, photo-signal is outputed in operation result information extraction modules corresponding to rear end.
(9) operation result information extraction modules array
This operation result information extraction modules array, for receiving the n road photo-signal from the front end detector array, Bing Jiangmei road photo-signal is converted to digital signal, exports in the Back end data post-processing module.
This operation result information extraction modules array comprises: by n identical operation result information extraction modules, formed side by side, each operation result information extraction modules receives a road photo-signal, the array light signal way of exporting as detector array is n, and corresponding operation result information extraction modules is respectively (9.1), (9.2) ... (9.n).
This operation result information extraction modules comprises: OPA847 type trans-impedance amplifier, THS4508 type secondary amplifier, ADS5474 pattern number converter.
OPA847 type trans-impedance amplifier, the photo-signal of exporting for the corresponding detector of receiving front-end, after amplifying across resistance, convert the gray scale rank analog voltage signal that characterizes operation result to.
THS4508 type secondary amplifier, the gray scale rank analog voltage signal of exporting for receiving front-end OPA847 type trans-impedance amplifier, it is amplified and shaping after, convert the gray scale rank analog voltage signal after the amplification that dynamic range and driving force and ADS5474 input end performance be complementary to.
The ADS5474 analog to digital converter, the gray scale rank analog voltage signal after the amplification of exporting for receiving front-end THS4508, be converted into the digital signal that characterizes operation result, and this digital signal sent into to the Data Post module by the LVDS interface.
(10) Data Post module
The Data Post module is used for:
(a) receive the digital signal produced from ADS5474 pattern number converter, digital signal is carried out to filtering, remove the noise in digital signal, form level and smooth discrete digital amount;
(b) filtered level and smooth discrete digital amount is carried out to Gauss in each clock period average, obtain characterizing in certain cycle the characteristic quantity of operation result;
(c) characteristic quantity of the sign operation result in certain cycle and the gray scale rank thresholding set are compared and adjudicate, obtain characterizing the gray scale rank value of vector-matrix multiplication result.
What Data Post module 10 and data preprocessing module 3 adopted is same a slice FPGA device, and process of data preprocessing and Data Post process realize by the Parallel Hardware language in same a slice FPGA device.
(11) information extraction memory headroom
The information extraction memory headroom consists of IS61NLP25636A type SRAM storer, and this information extraction memory headroom is connected with post-processing module with data bus by address bus.Post-processing module is carried out the related middle ephemeral datas of computing such as filtering, Gauss are average, the differentiation of gray scale rank and is temporarily stored in the information extraction memory headroom to data.
(12) result vector data cache module
The result vector data cache module consists of CY7C009 type RAM, the gray scale rank value of the sign vector obtained for data cached post-processing module-matrix multiplication result, and it is sent through the RapidIO HSSI High-Speed Serial Interface.
In addition, the loading of the present embodiment parallel information and extraction system also need power management module and Clock management module to provide electric power and clock for whole system.
The course of work of system and signal transformational relation are as follows:
At first, data preprocessing module, by input vector and the matrix data of address bus access cache in dual port RAM, when the bit wide of input vector data element is k, is carried out frequency multiplication to system clock, and the working clock frequency that makes VMM is the k of system clock frequency
2doubly, in 1 system clock cycle, comprise k
2the individual VMM work period; When vectorial exponent number is 1 * N, when the matrix exponent number is N * N, vector data load-on module number is N, for the continuous VMM work period, vector data load-on module array received, from non-zero i.e. 1 the switch modulation signal in the k position of data preprocessing module, is converted into current signal and is loaded on corresponding laser instrument.
Meanwhile, the matrix data load-on module is loaded into Vector-Matrix Multiplier by the DVI interface by matrix data.
Light modulator matrix in optical vector-matrix multiplier is set to full impregnated, open successively each road laser instrument, regulate bias current and the modulating current of laser instrument, make for the detector of a certain road, each laser instrument all can obtain identical signal excitation on this detector, complete the demarcation to each laser instrument, the calibration value of bias current and modulating current is recorded in the information extraction memory headroom.
Then, adopt the calibration value of bias current and modulating current to apply working current to laser instrument, optical vector-matrix multiplier carries out multiplying according to loaded vector sum matrix data, by the multiplication result vector by detector array the formal output with light signal.
In 1 * N detector array, the output signal of each detector has been carried an element information in the result vector, by N operation result information extraction modules, respectively the output signal of each detector is read and analyzes.
For single detector, its output signal is photocurrent, by trans-impedance amplifier, this current signal amplified and be converted to analog voltage signal, then by the secondary amplifier, this analog voltage signal is amplified, the dynamic range that promotes its driving force and regulate it makes it the input end coupling with analog to digital converter.The rear end of analog to digital converter can obtain characterizing the series of discrete digital quantity of operation result.The above series of discrete digital quantity obtained is sent into to the Data Post module, after post-processing module is carried out digital filtering to these digital quantities, obtain the gray scale rank curve after level and smooth.Data after level and smooth are carried out to Gauss average, obtain characterizing the characteristic quantity of operation result, this characteristic quantity and the gray scale rank thresholding set are compared and adjudicate, obtain characterizing the gray scale rank value of vector-matrix multiplication result.
Finally, the gray scale rank value that characterizes vector-matrix multiplication result is written into to the result vector data cache module, and by output interface, result is exported.
Figure 3 shows that in system proposed by the invention the control bus structural representation for dynamic adjustments laser bias current and modulating current.Build the spi bus signal by data preprocessing module 3, after this signal is passed through to SN74LVTH241 type bus driver chip, formation has the SPI signal bus of enough driving forces, by MAX5497 type (14, 16, 19, 21) and MAX5496 type (15, 17, 18, 20) digital regulation resistance is articulated on spi bus as slave, respectively to MAX3669 type (22, 24, 27, 29) laser power supply and MAX1978 type (23, 25, 26, 28) Temperature Controlling Chip is controlled, with to laser instrument (30, 31, 32, 33) modulating current, bias current, the parameters such as working temperature are regulated.Open successively each road laser instrument, carry out dynamic adjustments and control ，Shi Mei road laser instrument same detector being produced to the pumping signal of identical dynamic range according to the running parameter of the read output signal ，Dui Ge road laser instrument of detector.
So far, the system that by reference to the accompanying drawings the present embodiment has been loaded and extracted for optical vector-matrix multiplier parallel high-speed information have been described in detail.According to above description, those skilled in the art should have clearly understanding to the present invention.
In addition, the above-mentioned definition to each element, method is not limited in various concrete structures, shape or the method for mentioning in embodiment, and those of ordinary skill in the art can replace simply to it with knowing, for example:
(1) CY7C009 dual port RAM device can also be realized with the dual port RAM in the FPGA device;
(2) the IS61NLP25636A random access memory can replace with SST38VF6403;
(3) OPA847 type trans-impedance amplifier can replace with ADA4817.
In sum, the invention provides a kind of system that loads and extract for optical vector-matrix multiplier parallel high-speed information.This system has been broken away from the constraint of a plurality of separation equipments in the classic method, form a set of independent operating and that have autonomous system, as to there is self-calibration and regulatory function optical digital signal disposal system, can be widely used in many mass data processing fields such as cryptography, speech recognition, radar system, sonar system.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (10)
1. a system that loads and extract for the optical vector-matrix multiplier parallel information, is characterized in that, comprising:
The input vector data cache module, for the vectorial raw data of buffer memory input;
The input matrix data cache module, for the matrix raw data of buffer memory input;
Data preprocessing module, for: (a) resolution of described vectorial raw data and matrix raw data is adjusted respectively, both figure places and optical vector-matrix multiplier performance are complementary; (b) described vector data and matrix data are carried out to piecemeal, the exponent number of vector data and matrix data and the input end port number of optical vector-matrix multiplier are complementary;
Vector data load-on module array, for receiving the vector data of described front end data pretreatment module output, and be converted to current signal by each data element in vector data, is supplied to respectively corresponding laser instrument in laser array;
Laser array, comprise several laser instruments, and wherein each laser instrument is for the modulating current switching signal of the corresponding vector data load-on module output of receiving front-end, for optical vector-matrix multiplier provides the array light source vectorial operator;
The matrix data load-on module, for: (a) receive low resolution that described front end data pretreatment module exports and the matrix data of low exponent number, and convert each data element in matrix data to DVI video code model data; (b) receive DVI video code model data, complete the loading of each pixel data of spatial light modulator, for optical vector-matrix multiplier provides matrix operator;
Detector array, for receiving the array light signal from the sign operation result of Vector-Matrix Multiplier output, single detector unit in detector array, after the light signal received is converted to photo-signal, output to photo-signal in the operation result information extraction modules;
Operation result information extraction modules array, for the n road photo-signal of receiving front-end detector array, Bing Jiangmei road photo-signal is converted to digital signal, exports in the Data Post module;
The Data Post module, for: (a) receive the digital signal that operation result information extraction modules array produces, digital signal is carried out to filtering, remove the noise in digital signal, form level and smooth discrete digital amount; (b) filtered level and smooth discrete digital amount is carried out to Gauss in each clock period average, obtain characterizing in certain cycle the characteristic quantity of operation result; (c) characteristic quantity of the sign operation result in certain cycle and the gray scale rank thresholding set are compared and adjudicate, obtain characterizing the gray scale rank value of vector-matrix multiplication result;
The information extraction memory headroom, carry out the related middle ephemeral datas of computing such as filtering, Gauss are average, the differentiation of gray scale rank to data for the temporal data post-processing module;
The result vector data cache module, the gray scale rank value of the sign obtained for data cached post-processing module vector-matrix multiplication result, and it is sent through the RapidIO HSSI High-Speed Serial Interface.
2. system according to claim 1, is characterized in that, described Data Post module and data preprocessing module are realized by a slice XC5VLX50T type FPGA device and peripheral prom memory thereof, the hardware language realization of both functions in this FPGA device.
3. system according to claim 1, is characterized in that, described input vector data cache module and input matrix data cache module are realized by corresponding CY7C009 type dual port RAM respectively.
4. system according to claim 1, is characterized in that, described vector data load-on module array comprises: the n be set up in parallel a vector data load-on module; Each vector data load-on module, for a road laser instrument provides the current signal excitation, comprising:
MAX9371 type level transferring chip, for the low resolution of receiving front-end data preprocessing module output and the vector data of low exponent number, and be converted into the logic level signal that the MAX3669 current-output type drives the chip input end to identify;
The MAX3669 current-output type drives chip, for the logic level signal produced according to MAX9371 type level transferring chip, produces the switching signal of controlling corresponding laser modulation current, encourages corresponding laser instrument.
MAX5497 type digital regulation resistance chip, include two variable resistors, these two adjustable resistances are connected with the modulating current control end with the bias current of MAX3669 respectively, this MAX5497 type digital regulation resistance chip is for receiving the control word instruction that data preprocessing module FPGA produces, control its inner two variable-resistance sizes by this instruction, by the size of regulating these two resistance values, control output offset electric current and the modulation electric flow valuve that the MAX3669 current-output type drives chip;
MAX5496 type digital regulation resistance chip, a variable resistor of its inside drives the automated power control end of chip to be connected with the MAX3669 current-output type, the control word instruction that this MAX5496 type digital regulation resistance chip produces for receiving front-end data preprocessing module FPGA, control its inner variable-resistance size by this instruction, by regulating this resistance value, control the output power that the MAX3669 current-output type drives chip.
5. system according to claim 1, is characterized in that, in described vector data load-on module array, each vector data load-on module also comprises: MAX1978 type temperature control chip, wherein:
Described MAX5496 type digital regulation resistance chip, another inner variable resistor is connected with the temperature control end of MAX1978 type temperature control chip, the control word instruction that this MAX5496 type digital regulation resistance chip produces for the receiving front-end pretreatment module, control its inner variable-resistance size by this instruction, control the temperature control point of MAX1978 type temperature control chip by regulating this resistance value;
Described MAX1978 type temperature control chip, for receiving the temperature control point signal that MAX5496 type digital regulation resistance chip provides, feed back the output feedback current by PID, send this feedback current to laser instrument, control the refrigeration module of laser instrument inside, realize the temperature of laser instrument is controlled.
6. system according to claim 1, is characterized in that, described matrix data load-on module consists of CH7301C type DVI coding chip and LC-R720 type spatial light modulator, wherein:
Described CH7301C type DVI coding chip, the low resolution of exporting from the front end data pretreatment module for reception and the matrix data of low exponent number, and convert each data element in matrix data to DVI video code model data, by the DVI interface, input in LC-R720 type spatial light modulator;
Described LC-R720 type spatial light modulator, the DVI video code model data of exporting for receiving CH7301C type DVI coding chip, complete the loading of each pixel data of spatial light modulator, and being embodied as optical vector-matrix multiplier provides matrix operator.
7. system according to claim 1, is characterized in that, described laser array is formed by a plurality of 6001A type Distributed Feedback Lasers and fiber array coupling; Described detector array is coupled to form by a plurality of RPD3000-FA type photodetectors and fiber array.
8. system according to claim 1, is characterized in that, described operation result information extraction modules array comprises: the n be set up in parallel an identical operation result information extraction modules; Each operation result information extraction modules receives a road photo-signal, comprising:
OPA847 type trans-impedance amplifier, the photo-signal of exporting for the corresponding detector of receiving front-end, after amplifying across resistance, convert the gray scale rank analog voltage signal that characterizes operation result to;
THS4508 type secondary amplifier, the gray scale rank analog voltage signal of exporting for receiving front-end OPA847 type trans-impedance amplifier, it is amplified and shaping after, convert the gray scale rank analog voltage signal after the amplification that dynamic range and driving force and ADS5474 input end performance be complementary to;
The ADS5474 analog to digital converter, gray scale rank analog voltage signal after the amplification of exporting for receiving front-end THS4508 type secondary amplifier, be converted into the digital signal that characterizes operation result, and this digital signal is sent into to the Data Post module by the LVDS interface.
9. system according to claim 1, is characterized in that, described information extraction memory headroom is realized by IS61NLP25636A type SRAM storer; Described result vector data cache module consists of CY7C009 type RAM.
10. according to the described system of any one in claim 1 to 9, it is characterized in that, its course of work and signal transformational relation are as follows:
At first, data preprocessing module is by input vector and the matrix data of address bus access cache in input vector data cache module and input matrix data cache module, when the bit wide of input vector data element is k, system clock is carried out to frequency multiplication, and the working clock frequency that makes VMM is the k of system clock frequency
2doubly; When vectorial exponent number is 1 * N, when the matrix exponent number is N * N, vector data load-on module number is N, for the continuous VMM work period, vector data load-on module array received, from non-zero i.e. 1 the switch modulation signal in the k position of data preprocessing module, is converted into current signal and is loaded on corresponding laser instrument; Meanwhile, the matrix data load-on module is loaded into Vector-Matrix Multiplier by the DVI interface by matrix data;
Secondly, light modulator matrix in optical vector matrix multiplier is set to full impregnated, open successively each road laser instrument of laser array, regulate bias current and the modulating current of laser instrument, make for the detector of a certain road, each laser instrument all can obtain identical signal excitation on this detector, completes the demarcation to each laser instrument, and the calibration value of bias current and modulating current is recorded in the information extraction memory headroom;
Then, adopt the calibration value of bias current and modulating current to apply working current to laser instrument, optical vector-matrix multiplier carries out multiplying according to loaded vector sum matrix data, by the multiplication result vector by detector array the formal output with light signal;
In detector array, the output signal of each detector has been carried an element information in the result vector, by N operation result information extraction modules, respectively the output signal of each detector is read and analyzes; For single detector, its output signal is photocurrent, by trans-impedance amplifier, this current signal amplified and be converted to analog voltage signal, then by the secondary amplifier, this analog voltage signal is amplified, the dynamic range that promotes its driving force and regulate it makes it the input end coupling with analog to digital converter; The rear end of analog to digital converter obtains characterizing the series of discrete digital quantity of operation result; The above series of discrete digital quantity obtained is sent into to the Data Post module, after post-processing module is carried out digital filtering to these digital quantities, obtain the gray scale rank curve after level and smooth; Data after level and smooth are carried out to Gauss average, obtain characterizing the characteristic quantity of operation result, this characteristic quantity and the gray scale rank thresholding set are compared and adjudicate, obtain characterizing the gray scale rank value of vector-matrix multiplication result;
Finally, the gray scale rank value that characterizes vector-matrix multiplication result is written into to the result vector data cache module, and by output interface, result is exported.
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Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105208298A (en) * | 2015-10-28 | 2015-12-30 | 大连科迪视频技术有限公司 | Matrix switching system and matrix switching method for switching among multi-format video signals |
| CN105578083A (en) * | 2015-12-15 | 2016-05-11 | 西安电子科技大学 | Low-noise CCD signal imaging electronics system |
| CN106605204A (en) * | 2014-09-03 | 2017-04-26 | 美光科技公司 | Apparatuses and methods for determining population count |
| CN110160563A (en) * | 2018-02-12 | 2019-08-23 | 杭州微策生物技术有限公司 | A kind of method of biosensor resistance adjustment encoded information |
| CN110263297A (en) * | 2019-05-25 | 2019-09-20 | 南京惟心光电系统有限公司 | A kind of control method of matrix-vector multiplier working condition |
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| US11281972B2 (en) | 2018-06-05 | 2022-03-22 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
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| US11507818B2 (en) | 2018-06-05 | 2022-11-22 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11671182B2 (en) | 2019-07-29 | 2023-06-06 | Lightmatter, Inc. | Systems and methods for analog computing using a linear photonic processor |
| US11709520B2 (en) | 2019-02-25 | 2023-07-25 | Lightmatter, Inc. | Path-number-balanced universal photonic network |
| US11719963B2 (en) | 2020-04-29 | 2023-08-08 | Lightelligence, Inc. | Optical modulation for optoelectronic processing |
| US11734556B2 (en) | 2019-01-14 | 2023-08-22 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040234657A1 (en) * | 2003-01-03 | 2004-11-25 | Keith Rowley | Method for treating plants and plant parts |
| CN101630178A (en) * | 2008-07-16 | 2010-01-20 | 中国科学院半导体研究所 | Silicon-based integrated optical vector-matrix multiplier |
| CN102023672A (en) * | 2009-09-23 | 2011-04-20 | 中国科学院半导体研究所 | Integrated optical vector-matrix multiplier based on micro-ring resonators |
-
2013
- 2013-09-12 CN CN2013104148817A patent/CN103473213A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040234657A1 (en) * | 2003-01-03 | 2004-11-25 | Keith Rowley | Method for treating plants and plant parts |
| CN101630178A (en) * | 2008-07-16 | 2010-01-20 | 中国科学院半导体研究所 | Silicon-based integrated optical vector-matrix multiplier |
| CN102023672A (en) * | 2009-09-23 | 2011-04-20 | 中国科学院半导体研究所 | Integrated optical vector-matrix multiplier based on micro-ring resonators |
Cited By (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10861563B2 (en) | 2014-09-03 | 2020-12-08 | Micron Technology, Inc. | Apparatuses and methods for determining population count |
| CN106605204A (en) * | 2014-09-03 | 2017-04-26 | 美光科技公司 | Apparatuses and methods for determining population count |
| US10559360B2 (en) | 2014-09-03 | 2020-02-11 | Micron Technology, Inc. | Apparatuses and methods for determining population count |
| CN105208298B (en) * | 2015-10-28 | 2018-06-19 | 大连科迪视频技术有限公司 | A kind of matrix switch system and Inverse problem method for multi-format video signal switching |
| CN105208298A (en) * | 2015-10-28 | 2015-12-30 | 大连科迪视频技术有限公司 | Matrix switching system and matrix switching method for switching among multi-format video signals |
| CN105578083A (en) * | 2015-12-15 | 2016-05-11 | 西安电子科技大学 | Low-noise CCD signal imaging electronics system |
| CN105578083B (en) * | 2015-12-15 | 2018-08-17 | 西安电子科技大学 | Low noise CCD image formation electronic system |
| CN110160563A (en) * | 2018-02-12 | 2019-08-23 | 杭州微策生物技术有限公司 | A kind of method of biosensor resistance adjustment encoded information |
| CN110160563B (en) * | 2018-02-12 | 2021-03-09 | 杭州微策生物技术股份有限公司 | Method for adjusting coded information by biosensor resistance |
| CN112384748A (en) * | 2018-05-15 | 2021-02-19 | 轻物质公司 | Photon processing system and method |
| CN112384748B (en) * | 2018-05-15 | 2022-06-17 | 轻物质公司 | Photon processing system and method |
| US11626931B2 (en) | 2018-05-15 | 2023-04-11 | Lightmatter, Inc. | Photonic processing systems and methods |
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| US12001946B2 (en) | 2018-06-05 | 2024-06-04 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11281972B2 (en) | 2018-06-05 | 2022-03-22 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
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| US11507818B2 (en) | 2018-06-05 | 2022-11-22 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11853871B2 (en) | 2018-06-05 | 2023-12-26 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11687767B2 (en) | 2018-06-05 | 2023-06-27 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11783172B2 (en) | 2018-06-05 | 2023-10-10 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11734556B2 (en) | 2019-01-14 | 2023-08-22 | Lightelligence PTE. Ltd. | Optoelectronic computing systems |
| US11709520B2 (en) | 2019-02-25 | 2023-07-25 | Lightmatter, Inc. | Path-number-balanced universal photonic network |
| CN110263296A (en) * | 2019-05-18 | 2019-09-20 | 南京惟心光电系统有限公司 | A kind of matrix-vector multiplier and its operation method based on photoelectricity computing array |
| CN110263297A (en) * | 2019-05-25 | 2019-09-20 | 南京惟心光电系统有限公司 | A kind of control method of matrix-vector multiplier working condition |
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| US11936434B2 (en) | 2019-07-29 | 2024-03-19 | Lightmatter, Inc. | Systems and methods for analog computing using a linear photonic processor |
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