CN103457501A - SVG modulating method based on PAM+PWM cascading multi-level inverter - Google Patents
SVG modulating method based on PAM+PWM cascading multi-level inverter Download PDFInfo
- Publication number
- CN103457501A CN103457501A CN2013103744339A CN201310374433A CN103457501A CN 103457501 A CN103457501 A CN 103457501A CN 2013103744339 A CN2013103744339 A CN 2013103744339A CN 201310374433 A CN201310374433 A CN 201310374433A CN 103457501 A CN103457501 A CN 103457501A
- Authority
- CN
- China
- Prior art keywords
- pam
- pwm
- bridge
- unit
- svg
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Inverter Devices (AREA)
Abstract
The invention provides an SVG modulating method based on a PAM+PWM cascading multi-level inverter. The SVG modulating method based on the PAM+PWM cascading multi-level inverter comprises the steps that (1) PAM regulation is carried out on a PAM unit, and a step wave output by the PAM unit is made to approach a sine wave through the fundamental frequency optimizing PAM control algorithm; (2) PWM regulation is carried out a PWM unit, and feedback control is carried out on the instantaneous value of an output reactive current by means of the tracking type PWM control technique. According to the SVG modulating method based on the PAM+PWM cascading multi-level inverter, due to the fact that a PAM works under the condition of fundamental switching frequency, the switching loss is little; due to the fact that the harmonic components in the step wave output by the PAM unit are compensated by the PWM unit, the voltage and current distortion rate is effectively decreased, and quality of currents output by a device is improved; due to the fact that the currents are controlled directly, both the control accuracy and response speed are greatly improved.
Description
Technical field
The present invention relates to technical field of electricity, particularly a kind of SVG modulator approach based on the PAM+PWM cascaded multilevel inverter.
Background technology
In recent years, the electric power industry development of China is rapid, and large capacity impact, interference are loaded increasing, and power system stability, safe operation are caused to potential threat.And more responsive to the quality of power supply based on computer-controlled industrial equipment, cause load side more and more higher to the requirement of the quality of power supply.STATCOM (SVG), by compensating idle, can improve the system power factor, reduces power loss, improve power supply quality.Wherein, cascade SVG obtains applying more and more widely in the high-voltage large-capacity occasion because of advantages such as power capacity is large, switching frequency is low, output harmonic wave is little, fast response times.
Cascade SVG is divided into pulse amplitude modulation (PAM) and pulse width modulation (PWM) on modulator approach.PAM modulation be by choose the switch angle reducing low-order harmonic, make the modulator approach of total percent harmonic distortion minimum.Its switching device works under fundamental frequency switching frequency 50Hz, its switching loss is less, but adjust the amplitude of output reactive voltage by real-time by-pass cock angle, exist the problem of Nonlinear System of Equations Real-time solution difficulty, when Cascade H bridge number is less in addition, harmonic wave of output voltage content is larger.The PWM modulator approach is by comparing modulating wave and carrier wave, and control switch device break-make, realize Voltage-output.But in the PWM modulator approach, its switching device works under the switching frequency of hundreds of and even upper KHz, and its switching loss is larger.
Summary of the invention
In order to address the above problem, the invention provides the modulator approach of a kind of SVG based on the PAM+PWM cascaded multilevel inverter, it is characterized in that, the topological structure of described SVG comprises the first Cascade H bridge, the second Cascade H bridge, third level connection H bridge, fourth stage connection H bridge and level V connection H bridge, wherein, the first Cascade H bridge, the second Cascade H bridge, third level connection H bridge, fourth stage connection H bridge form the PAM unit, level V connection H bridge and described PAM cell formation PWM unit, wherein, described modulator approach comprises the following steps:
Step S1: carry out the PAM adjusting for the PAM unit, by fundamental frequency, optimize the PAM control algolithm, make the staircase waveform of described PAM unit output approach sine wave;
Step S2: carry out the PWM adjusting for described PWM unit, by following-up type PWM control technology, output reactive current instantaneous value is carried out to FEEDBACK CONTROL.
Preferably, the fundamental frequency optimized algorithm in described step S1 further comprises:
Step S12: adopt the interative computation method to solve described optimal objective function, draw the switch angle of each Cascade H bridge;
Step S13: the turn-on and turn-off by the switch angle of described each Cascade H bridge drawn for each H bridge switch device.
Preferably, described step S12 specifically comprises:
Adopt area equivalent principle (rectangular area that the area equivalent principle is the staircase waveform one-level equals the area of enclosed sine wave) to obtain initial switch angle, the initial value substitution is carried out to interative computation and solve the switch angle that optimal function can calculate described each Cascade H bridge.
Preferably, described step S1 further comprises: to described PAM unit DC side, adopt the pulse rotation to control, described PAM unit DC voltage is equated on average meaning, guarantee each H bridge DC side balance of voltage.
Preferably, described step S2 specifically comprises:
Step S21: described PWM unit DC side desired voltage values and actual voltage value are subtracted each other, and regulate and form outer voltage through PI;
Step S22: subtract each other with reference to electric current and device output current, and form current inner loop after PI regulates;
Step S23: the part to the difference of system voltage and described PAM unit output voltage as PWM cells modulate ripple, to compensate the harmonic wave of described PAM unit output;
Step S24: the modulating wave of above-mentioned steps gained is carried out to standardization, divided by described PWM unit DC voltage, the impact with the fluctuation that suppresses DC voltage on control response;
Wherein, reference current is to obtain by the reference reactive current with reference to the active current addition, with reference to active current, can be obtained by outer voltage output.
Owing to adopting above-mentioned technical scheme, make the present invention have the following advantages:
1.PAM it is less to work under the fundamental frequency switching frequency its switching loss;
2.PWM unit compensates the harmonic component in PAM unit output staircase waveform, has effectively reduced the electric current and voltage aberration rate, improves the quality of device output current;
3. employing current direct control method, its control precision and response speed improve a lot.
The accompanying drawing explanation
The SVG modulator approach flow chart based on the PAM+PWM cascaded multilevel inverter that Fig. 1 is a specific embodiment of the present invention;
The topology diagram of cascade SVG in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 2 is a specific embodiment of the present invention;
PAM unit output staircase waveform composite diagram in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 3 is a specific embodiment of the present invention;
PWM unit controls schematic diagram in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 4 is a specific embodiment of the present invention;
Cascade SVG output voltage superposed waveform figure in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 5 a is a specific embodiment of the present invention;
Each single-phase inversion H bridge pulse cycle control flow chart in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 5 b is a specific embodiment of the present invention;
The control principle drawing of the PWM unit in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 6 is a specific embodiment of the present invention;
Carry out the PWM adjusting for the PWM unit in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 7 is a specific embodiment of the present invention, by following-up type PWM control technology, output reactive current instantaneous value is carried out the flow chart of FEEDBACK CONTROL.
Embodiment
Below in conjunction with Figure of description, the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter of the present invention is described in further detail.
The SVG modulator approach flow chart based on the PAM+PWM cascaded multilevel inverter that Fig. 1 is a specific embodiment of the present invention; The topology diagram of cascade SVG in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 2 is a specific embodiment of the present invention; PAM unit output staircase waveform composite diagram in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 3 is a specific embodiment of the present invention; PWM unit controls schematic diagram in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 4 is a specific embodiment of the present invention; Cascade SVG output voltage superposed waveform figure in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 5 a is a specific embodiment of the present invention; Each single-phase inversion H bridge pulse cycle control flow chart in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 5 b is a specific embodiment of the present invention; The control principle drawing of the PWM unit in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 6 is a specific embodiment of the present invention; Carry out the PWM adjusting for the PWM unit in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that Fig. 7 is a specific embodiment of the present invention, as shown in Figure 1, the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter of an embodiment of the present invention comprises the following steps: the flow chart that output reactive current instantaneous value is carried out to FEEDBACK CONTROL by following-up type PWM control technology
Step S1: carry out the PAM adjusting for the PAM unit, by fundamental frequency, optimize the PAM control algolithm, make the staircase waveform of described PAM unit output approach sine wave;
As shown in Figure 2, each module in the topological structure of cascade SVG is comprised of a H bridge, is respectively the first Cascade H bridge, the second Cascade H bridge, third level connection H bridge, fourth stage connection H bridge and level V connection H bridge, and each H bridge wherein has an independent capacitance.The first Cascade H bridge, the second Cascade H bridge, third level connection H bridge, the cascade of fourth stage connection H bridge form the PAM unit, each have+E of H bridge, 0 ,-three level of E (E is the magnitude of voltage of each electric capacity), i.e. four H bridges cascade can obtain 9 level.Level V connection H bridge and PAM cell formation PWM unit.
The PAM cell operation, at the fundamental frequency switching frequency, has reduced switching loss.Fundamental frequency optimization PAM control algolithm is that the switch angle by choosing each H bridge optimally reduces the harmonic content in output voltage, thereby guarantees to obtain harmonic performance preferably under the fundamental frequency switching frequency.
As shown in Figure 3, it is 4 Cascade H bridge output voltage composite diagrams in the PAM unit.According to the control requirement of large capacity SVG, the control target that fundamental frequency is optimized PAM is:
(1) making the fundamental voltage amplitude of total output voltage is the control desired value,
(2) make the low-order harmonic performance of total output voltage reach optimum.
As shown in Figure 4, therefore, the fundamental frequency optimized algorithm in step S1 further comprises:
Step S12: adopt the interative computation method to solve described optimal objective function, draw the switch angle of each Cascade H bridge;
Be specially, adopt area equivalent principle (rectangular area that the area equivalent principle is the staircase waveform one-level equals the area of enclosed sine wave) to obtain initial switch angle, the initial value substitution is carried out to interative computation and solve the switch angle that optimal function can calculate each Cascade H bridge.
Step S13: the turn-on and turn-off by the switch angle of described each Cascade H bridge drawn for each H bridge switch device.
Above-mentioned control procedure, guaranteed the total harmonic distortion minimum of PAM unit output staircase waveform.
Simultaneously, step S1 also further comprises: to described PAM unit DC side, adopt the pulse rotation to control, described PAM unit DC voltage is equated on average meaning, guarantee each H bridge DC side balance of voltage.
The pulse cycle control strategy made within n cycle, the mean value of each H bridge DC side voltage equates, thereby assurance device each DC voltage in steady-state adjustment process and transient state adjustment process is consistent substantially, and then effectively makes cascade SVG dc-voltage balance.
As shown in Fig. 5 a and Fig. 5 b, concrete pulse cycle control program is: due to the angle of flow difference of each H bridge in one-period, in order to make DC side balance on average meaning, the angle of flow of each H bridge in each cycle rotation once, take the specific embodiment of the present invention as example, and four fundamental frequency cycles complete once circulation.
The control principle drawing of the PWM unit in the SVG modulator approach based on the PAM+PWM cascaded multilevel inverter that then, Fig. 6 is a specific embodiment of the present invention.Shown in Figure 6, carry out step S2: carry out the PWM adjusting for the PWM unit, by following-up type PWM control technology, output reactive current instantaneous value is carried out to FEEDBACK CONTROL.
As shown in Figure 7, the control of PWM unit specifically comprises:
Step S21: PWM unit DC side desired voltage values and actual voltage value are subtracted each other, and regulate and form outer voltage through PI;
Step S22: subtract each other with reference to electric current and device output current, and form current inner loop after PI regulates;
Step S23: the part using the difference of system voltage and PAM unit output voltage as PWM cells modulate ripple, to compensate the harmonic wave of described PAM unit output;
Step S24: the modulating wave of above-mentioned steps gained is carried out to standardization, divided by described PWM unit DC voltage, the impact with the fluctuation that suppresses DC voltage on control response;
Wherein, reference current is to obtain by the reference reactive current with reference to the active current addition, with reference to active current, can be obtained by outer voltage output.
In sum, in the Fault Diagnosis for Grounding Grids method based on the adaptive particle swarm optimization algorithm of the present invention PAM to work under the fundamental frequency switching frequency its switching loss less; The PWM unit compensates the harmonic component in PAM unit output staircase waveform, has effectively reduced the electric current and voltage aberration rate, improves the quality of device output current; Adopt current direct control method, its control precision and response speed improve a lot.
Above-mentioned disclosed be only specific embodiments of the invention, this embodiment is only that clearer explanation the present invention is used, and limitation of the invention not, the changes that any person skilled in the art can think of, all should drop in protection range.
Claims (5)
1. the modulator approach of the SVG based on the PAM+PWM cascaded multilevel inverter, it is characterized in that, the topological structure of described SVG comprises the first Cascade H bridge, the second Cascade H bridge, third level connection H bridge, fourth stage connection H bridge and level V connection H bridge, wherein, the first Cascade H bridge, the second Cascade H bridge, third level connection H bridge, fourth stage connection H bridge form the PAM unit, level V connection H bridge and described PAM cell formation PWM unit, wherein, described modulator approach comprises the following steps:
Step S1: carry out the PAM adjusting for the PAM unit, by fundamental frequency, optimize the PAM control algolithm, make the staircase waveform of described PAM unit output approach sine wave;
Step S2: carry out the PWM adjusting for described PWM unit, by following-up type PWM control technology, output reactive current instantaneous value is carried out to FEEDBACK CONTROL.
2. the modulator approach of the SVG based on the PAM+PWM cascaded multilevel inverter as claimed in claim 1, is characterized in that, the fundamental frequency optimized algorithm in described step S1 further comprises:
Step S12: adopt the interative computation method to solve described optimal objective function, draw the switch angle of each Cascade H bridge;
Step S13: the turn-on and turn-off by the switch angle of described each Cascade H bridge drawn for each H bridge switch device.
3. the modulator approach of the SVG based on the PAM+PWM cascaded multilevel inverter as claimed in claim 2, is characterized in that, described step S12 specifically comprises:
Adopt area equivalent principle (rectangular area that the area equivalent principle is the staircase waveform one-level equals the area of enclosed sine wave) to obtain initial switch angle, the initial value substitution is carried out to interative computation and solve the switch angle that optimal function can calculate described each Cascade H bridge.
4. the modulator approach of the SVG based on the PAM+PWM cascaded multilevel inverter as claimed in claim 1 or 2, it is characterized in that, described step S1 further comprises: to described PAM unit DC side, adopt the pulse rotation to control, described PAM unit DC voltage is equated on average meaning, guarantee each H bridge DC side balance of voltage.
5. the modulator approach of the SVG based on the PAM+PWM cascaded multilevel inverter as claimed in claim 1, is characterized in that, described step S2 specifically comprises:
Step S21: described PWM unit DC side desired voltage values and actual voltage value are subtracted each other, and regulate and form outer voltage through PI;
Step S22: subtract each other with reference to electric current and device output current, and form current inner loop after PI regulates;
Step S23: the part to the difference of system voltage and described PAM unit output voltage as PWM cells modulate ripple, to compensate the harmonic wave of described PAM unit output;
Step S24: the modulating wave of above-mentioned steps gained is carried out to standardization, divided by described PWM unit DC voltage, the impact with the fluctuation that suppresses DC voltage on control response;
Wherein, reference current is to obtain by the reference reactive current with reference to the active current addition, with reference to active current, can be obtained by outer voltage output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310374433.9A CN103457501B (en) | 2013-08-23 | 2013-08-23 | SVG modulator approach based on PAM+PWM cascaded multilevel inverter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310374433.9A CN103457501B (en) | 2013-08-23 | 2013-08-23 | SVG modulator approach based on PAM+PWM cascaded multilevel inverter |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103457501A true CN103457501A (en) | 2013-12-18 |
CN103457501B CN103457501B (en) | 2016-08-17 |
Family
ID=49739557
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310374433.9A Expired - Fee Related CN103457501B (en) | 2013-08-23 | 2013-08-23 | SVG modulator approach based on PAM+PWM cascaded multilevel inverter |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103457501B (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104682751A (en) * | 2015-03-02 | 2015-06-03 | 上海交通大学 | Modular cascaded multilevel converter on basis of hybrid modulation of PAM and PWM |
CN104682404A (en) * | 2015-03-02 | 2015-06-03 | 上海交通大学 | Cascade SVG based on PAM and PWM hybrid modulation |
US9318974B2 (en) | 2014-03-26 | 2016-04-19 | Solaredge Technologies Ltd. | Multi-level inverter with flying capacitor topology |
US9941813B2 (en) | 2013-03-14 | 2018-04-10 | Solaredge Technologies Ltd. | High frequency multi-level inverter |
CN110365241A (en) * | 2019-08-09 | 2019-10-22 | 重庆大学 | A kind of high-precision quasi-sine-wave signal generating method |
US20210058007A1 (en) * | 2018-01-12 | 2021-02-25 | Mitsubishi Electric Corporation | Power conversion device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1320297A (en) * | 1998-08-31 | 2001-10-31 | 株式会社日立制作所 | Controller for PWM/PAM motor and method for controlling air conditioner and motor having controller |
CN102437801A (en) * | 2011-12-21 | 2012-05-02 | 海尔集团公司 | PWM (Pulse-Width Modulation), S-PAM (Spectrum-Pulse Amplitude Modulation) and PHASE linkage control motor driving method, device and system |
-
2013
- 2013-08-23 CN CN201310374433.9A patent/CN103457501B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1320297A (en) * | 1998-08-31 | 2001-10-31 | 株式会社日立制作所 | Controller for PWM/PAM motor and method for controlling air conditioner and motor having controller |
CN102437801A (en) * | 2011-12-21 | 2012-05-02 | 海尔集团公司 | PWM (Pulse-Width Modulation), S-PAM (Spectrum-Pulse Amplitude Modulation) and PHASE linkage control motor driving method, device and system |
Non-Patent Citations (4)
Title |
---|
代彬,等: "基于双闭环控制的SVG系统建模与仿真", 《山东理工大学学报(自然科学版)》 * |
候梁,等: "采用新型电压电流双闭环控制的静止无功发生器", 《冶金自动化》 * |
王锋,等: "混合型级联多电平逆变器的PAM调制和PWM调制", 《通信电源技术》 * |
陈明明,等: "链式SVG的基频优化PAM方法", 《电力系统保护与控制》 * |
Cited By (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11545912B2 (en) | 2013-03-14 | 2023-01-03 | Solaredge Technologies Ltd. | High frequency multi-level inverter |
US12119758B2 (en) | 2013-03-14 | 2024-10-15 | Solaredge Technologies Ltd. | High frequency multi-level inverter |
US11742777B2 (en) | 2013-03-14 | 2023-08-29 | Solaredge Technologies Ltd. | High frequency multi-level inverter |
US9941813B2 (en) | 2013-03-14 | 2018-04-10 | Solaredge Technologies Ltd. | High frequency multi-level inverter |
US10886832B2 (en) | 2014-03-26 | 2021-01-05 | Solaredge Technologies Ltd. | Multi-level inverter |
US10886831B2 (en) | 2014-03-26 | 2021-01-05 | Solaredge Technologies Ltd. | Multi-level inverter |
US11855552B2 (en) | 2014-03-26 | 2023-12-26 | Solaredge Technologies Ltd. | Multi-level inverter |
US10680505B2 (en) | 2014-03-26 | 2020-06-09 | Solaredge Technologies Ltd. | Multi-level inverter |
US10680506B2 (en) | 2014-03-26 | 2020-06-09 | Solaredge Technologies Ltd. | Multi-level inverter |
US10700588B2 (en) | 2014-03-26 | 2020-06-30 | Solaredge Technologies Ltd. | Multi-level inverter |
US9318974B2 (en) | 2014-03-26 | 2016-04-19 | Solaredge Technologies Ltd. | Multi-level inverter with flying capacitor topology |
US10404154B2 (en) | 2014-03-26 | 2019-09-03 | Solaredge Technologies Ltd | Multi-level inverter with flying capacitor topology |
US11632058B2 (en) | 2014-03-26 | 2023-04-18 | Solaredge Technologies Ltd. | Multi-level inverter |
US11296590B2 (en) | 2014-03-26 | 2022-04-05 | Solaredge Technologies Ltd. | Multi-level inverter |
US10153685B2 (en) | 2014-03-26 | 2018-12-11 | Solaredge Technologies Ltd. | Power ripple compensation |
CN104682751A (en) * | 2015-03-02 | 2015-06-03 | 上海交通大学 | Modular cascaded multilevel converter on basis of hybrid modulation of PAM and PWM |
CN104682404A (en) * | 2015-03-02 | 2015-06-03 | 上海交通大学 | Cascade SVG based on PAM and PWM hybrid modulation |
US11601064B2 (en) * | 2018-01-12 | 2023-03-07 | Mitsubishi Electric Corporation | Power conversion device having a frequency of a first control signal higher than a frequency of a second control signal |
US20210058007A1 (en) * | 2018-01-12 | 2021-02-25 | Mitsubishi Electric Corporation | Power conversion device |
CN110365241A (en) * | 2019-08-09 | 2019-10-22 | 重庆大学 | A kind of high-precision quasi-sine-wave signal generating method |
Also Published As
Publication number | Publication date |
---|---|
CN103457501B (en) | 2016-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104104110B (en) | A kind of single-phase photovoltaic grid-connected inverter control method with quality of power supply regulatory function | |
CN103457501A (en) | SVG modulating method based on PAM+PWM cascading multi-level inverter | |
CN103560690A (en) | Harmonic wave damping control method for one-phase LCL type grid-connected inverter | |
US9948211B2 (en) | System and method for controlling the operating area of an inverter coupled to an alternative energy source | |
CN104201680A (en) | Integral power quality regulator and control method | |
CN102901893B (en) | Control method for drag test of power units of high voltage static reactive power compensation device | |
CN105634305B (en) | A kind of closed loop control method of quantitative control IGBT average frequency of switching suitable for high level modularization multi-level converter | |
Wang et al. | Cascaded voltage control for electric springs with DC-link film capacitors | |
CN113098421A (en) | Method for suppressing low-frequency ripple of direct-current side voltage of parallel active power filter | |
CN113098013A (en) | Electrolytic capacitor-free parallel active power filter system and control method | |
Ouchen et al. | Performance analysis of direct power control with space vector modulation for shunt active power filter | |
CN103259281B (en) | There is energy conversion system and the method for negative-sequence current compensation mechanism | |
Tongzhen et al. | Topology and control strategy of upqc based on high frequency isolation dc/dc converter | |
Manohara et al. | Power quality improvement of solar PV system with shunt active power filter using FS-MPC method | |
He et al. | Multi‐functional hybrid active power converter and its industrial application for electrolytic copper‐foil | |
Wu et al. | Compound control strategy of active power filter based on modular multilevel converter | |
Ahmad et al. | Real and reactive power compensation of a power system by using DSTATCOM | |
Pouresmaeil et al. | Integration of renewable energy for the harmonic current and reactive power compensation | |
Xinghua et al. | Analysis of stable area of two-cell cascaded H-Bridge rectifier | |
Chen et al. | Dynamic interaction analysis of two-parallel active power filter | |
Zhang et al. | Improved quasi-PCI control strategy of inverter with unbalanced load | |
CN105656047B (en) | Micro-capacitance sensor voltage perturbation control system and method | |
CN113422367B (en) | Negative sequence voltage injection four-layer capacitor voltage balancing method of high-voltage electric energy purification equipment | |
CN102611121A (en) | Multi-objective SVG (static var generator) generalized proportional integral error control method of microgrid | |
CN101505064B (en) | Control method for series connection type active electric power filter |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160817 Termination date: 20190823 |