CN103455436B - A kind of RAM detection method and system - Google Patents
A kind of RAM detection method and system Download PDFInfo
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Abstract
The embodiment of the present invention provides a kind of RAM detection method and system, wherein method includes: in advance ram space is carried out segment processing, ram space is divided into area segments and other area segments of a storage significant data, when os starting, the area segments of described storage significant data is carried out RAM detection;When the periodic duty of current operation system is low priority periodic duty set in advance, other area segments described are carried out RAM detection.The RAM detection method that the embodiment of the present invention provides can not affect the speed of service of controller and in the case of the execution time, comprehensively detects RAM, releases the potential safety hazard existing for RAM.
Description
Technical field
The present invention relates to technical field of hardware test, more particularly, it relates to a kind of RAM detection method and
System.
Background technology
RAM(random access memory, random access memory) refer to that the content of memory element can be on-demand
Arbitrarily take out or be stored in, and the speed memorizer unrelated with the position of memory element of access, it is control
Core component within device.
The most numerous equipment has the highest requirement to the speed of service and the execution time of controller, and right
RAM carries out detecting and but to take a long time, for ensureing the speed of service and the time of execution of controller,
Generally RAM will not be detected at present;But there is hidden danger in this safety allowing for controller, one
Denier RAM is damaged, then the action that controller performs will be abnormal, uses so that equipment exists
On potential safety hazard.
Therefore, a kind of RAM detection method how is provided, so that RAM comprehensively to be detected, not
Affect the speed of service and the time of execution of controller, thus release the potential safety hazard existing for RAM and become this
Field personnel's urgent problem.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of RAM detection method and system, to solve existing skill
The problem that RAM cannot comprehensively be detected by art.
For achieving the above object, the following technical scheme of embodiment of the present invention offer:
A kind of RAM detection method, carries out segment processing to ram space in advance, is drawn by ram space
Being divided into area segments and other area segments of a storage significant data, described method includes:
When os starting, the area segments of described storage significant data is carried out RAM detection;
When the periodic duty of current operation system is low priority periodic duty set in advance, to described
Other area segments carry out RAM detection.
Wherein, described ram space carried out segment processing include:
Ram space is divided into some sections, the data segment space of every section of ram space and stack space address
Continuously;
The described area segments that ram space is divided into a storage significant data and other area segments include:
Data segment space and one section of ram space of stack space address continuous print are divided into described storage important
Other segment data section spaces and stack space address continuous print ram space are divided into institute by the area segments of data
State other area segments.
Wherein, described other area segments described are carried out RAM detection include:
First the clear band not storing data in other area segments described is detected, then to other districts described
The non-blank-white section storing data in the section of territory detects.
Wherein, the described clear band to not storing data in other area segments described carries out detection and includes:
Initial address to described clear band writes the first data, reads the data in described initial address;
If read-out data are different from described first data, it is determined that the address space of described clear band is different
Often;
If read-out data are identical with described first data, then in described initial address, write the second number
According to, again read the data in described initial address;
If the data again read are different from described second data, it is determined that the address space of described clear band
Abnormal;
If the data again read are identical with described second data, it is determined that the address space of described clear band
Normally.
Wherein, the described non-blank-white section to storing data in other area segments described carries out detection and includes:
Data in described non-blank-white section are preserved to the normal clear band of the address space detected;
Initial address to described non-blank-white section writes the first data, reads the data in described initial address;
If read-out data are different from described first data, it is determined that the address space of described non-blank-white section
Abnormal;
If read-out data are identical with described first data, then in described initial address, write the second number
According to, again read the data in described initial address;
If the data again read are different from described second data, it is determined that the address of described non-blank-white section is empty
Between abnormal;
If the data again read are identical with described second data, it is determined that the address of described non-blank-white section is empty
Between normal;
After the address space determining described non-blank-white section is normal, will to the address space detected just preserve
The normal data in clear band copy back in described non-blank-white section.
Wherein, described method also includes:
After the address space having detected RAM clear band is normal, calls and be stored in advance in ROM
The non-blank-white section storing data in ram region section is detected by RAM detection program.
The embodiment of the present invention also provides for a kind of RAM detecting system, including:
Segmentation module, in advance ram space being carried out segment processing, is divided into one by ram space
The area segments of individual storage significant data and other area segments;
First detection module, for the area segments when os starting, to described storage significant data
Carry out RAM detection;
Second detection module, is low priority set in advance for the periodic duty in current operation system
During periodic duty, other area segments described are carried out RAM detection.
Wherein, described second detection module includes:
Clear band detector unit, for examining the clear band not storing data in other area segments described
Survey;
Non-blank-white section detector unit, is used in described clear band detector unit is to other area segments described not
After the clear band detection of storage data, then to other area segments described store the non-blank-white section of data
Detect.
Wherein, described clear band detector unit includes:
First write subelement, for writing the first data to the initial address of described clear band;
First reads subelement, for reading the data in described initial address;
First determines subelement, for when read-out data are different from described first data, determines institute
The address space stating clear band is abnormal;
Second write subelement, for when read-out data are identical with described first data, to described
Initial address writes the second data;
Second reads subelement, writes for writing subelement described second in described initial address
After two data, again read the data in described initial address;
Second determines subelement, for reading the data that again read of subelement and described the described second
During two data differences, determine that the address space of described clear band is abnormal;
3rd determines subelement, for reading the data that again read of subelement and described the described second
When two data are identical, determine that the address space of described clear band is normal.
Wherein, described non-blank-white section detector unit includes:
Data preserve subelement, empty for preserving the data in described non-blank-white section to the address detected
Between in normal clear band;
3rd write subelement, for writing the first data to the initial address of described non-blank-white section;
Third reading goes out subelement, for reading the data in described initial address;
4th determines subelement, for going out the data and described first read-out by subelement in described third reading
During data difference, determine that the address space of described non-blank-white section is abnormal;
4th write subelement, for going out the data and described first read-out by subelement in described third reading
When data are identical, in described initial address, write the second data;
4th reads subelement, writes for writing subelement the described 4th in described initial address
After two data, again read the data in described initial address;
5th determines subelement, for reading the data that again read of subelement and described the the described 4th
During two data differences, determine that the address space of described non-blank-white section is abnormal;
6th determines subelement, for reading the data that again read of subelement and described the the described 4th
When two data are identical, determine that the address space of described non-blank-white section is normal;
Data restore subelement, for after the address space determining described non-blank-white section is normal, will preserve
Data to the normal clear band of the address space detected copy back in described non-blank-white section.
Based on technique scheme, the RAM detection method that the embodiment of the present invention provides, inside controller
Ram space carry out segment processing, be divided into the storage area segments of significant data and other regions
Section, when an operating system starts, first carries out RAM detection to the area segments of described storage significant data,
After os starting, low priority periodic duty set in advance comes interim, then other districts to RAM
Territory section carries out RAM detection;The embodiment of the present invention uses operating system to combine with RAM detection function
Mode, detected area segments and other area segments of storage significant data on different opportunitys, thus
Avoid RAM detection to take a long time, and the speed of service and execution time to controller impacts
Problem, come interim at low priority periodic duty set in advance, other area segments to RAM simultaneously
Carry out RAM detection, such that it is able to examined by RAM in the case of avoiding affecting other function of controller
Survey enforcement complete, improve the performance indications of controller.The RAM detection method that the embodiment of the present invention provides
The speed of service of controller can not affected and in the case of the execution time, RAM is comprehensively being examined
Survey, release the potential safety hazard existing for RAM.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to reality
Execute the required accompanying drawing used in example or description of the prior art to be briefly described, it should be apparent that below,
Accompanying drawing in description is some embodiments of the present invention, for those of ordinary skill in the art, not
On the premise of paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
The flow chart of the RAM detection method that Fig. 1 provides for the embodiment of the present invention;
Fig. 2 is the schematic diagram that controller internal RAM space is divided by the embodiment of the present invention;
The clear band not storing data in other area segments is examined by Fig. 3 for what the embodiment of the present invention provided
The method flow diagram surveyed;
The non-blank-white section storing data in other area segments is examined by Fig. 4 for what the embodiment of the present invention provided
The method flow diagram surveyed;
The structured flowchart of the RAM detecting system that Fig. 5 provides for the embodiment of the present invention;
The structured flowchart of the second detection module that Fig. 6 provides for the embodiment of the present invention;
The structured flowchart of the clear band detector unit that Fig. 7 provides for the embodiment of the present invention;
The structured flowchart of the non-blank-white section detector unit that Fig. 8 provides for the embodiment of the present invention.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with this
Accompanying drawing in bright embodiment, is clearly and completely described the technical scheme in the embodiment of the present invention,
Obviously, described embodiment is a part of embodiment of the present invention rather than whole embodiments.Based on
Embodiment in the present invention, those of ordinary skill in the art are obtained under not making creative work premise
The every other embodiment obtained, broadly falls into the scope of protection of the invention.
The flow chart of the RAM detection method that Fig. 1 provides for the embodiment of the present invention, with reference to Fig. 1, the method
May include that
Step S100, in advance ram space is carried out segment processing, ram space is divided into one and deposits
The area segments of storage significant data and other area segments;
The principle that ram space is divided by the embodiment of the present invention is the seriality guaranteeing space, i.e. data segment is empty
Between and stack space address want continuously, white space address is wanted continuously, thus avoid the waste in space.Optional
, on implementing, ram space can be divided into some sections, the data of every section of ram space
Section space and stack space address are continuous.
Fig. 2 is the example dividing controller internal RAM space, non-blank-white area segments a and non-NULL
White region section c is data field, and other regions are white space section, such as clear band b.
Wherein, significant data can be to ensure that the data that the operating system of controller can normally perform down,
In the area segments of the ram space being divided out, an area segments storage significant data can be chosen;
Other area segments can be the ram space being divided out area segments in except storage significant data district
Area segments outside the section of territory, other area segments include the non-blank-white area segments of storage data and do not store data
White space section.
Generally operating system guarantees that the data that operating system normally performs down will not be a lot, the most important number
According to data volume will not be too many, therefore relative to other area segments, storage significant data area segments permissible
Divide is relatively small.
Step S110, when os starting, the area segments of described storage significant data is carried out RAM
Detection;
Generally system guarantees that the data that system normally performs down will not be a lot, so open in operating system
First can detect this region time dynamic, owing to space is the least, the detection time can be the shortest.And store
The area segments of significant data has related to the properly functioning of operating system, the first region to storage significant data
Duan Jinhang detection may insure that the properly functioning of operating system.
Step S120, it is low priority periodic duty set in advance at the periodic duty of current operation system
Time, other area segments described are carried out RAM detection.
For using the controller of operating system, its operating system has a lot of periodic duties, some weeks
Phase task priority is higher, and some periodic duty priority is relatively low;What the priority of periodic duty divided depends on
According to distinguishing according to the practical situation of application, such as brake system, brake signal is critically important, this
The collection of individual signal is accomplished by being placed in the task of high priority, it is ensured that will not be interrupted by other tasks;?
In the embodiment of the present invention, the task of high priority is to interrupt the task of low priority, but low preferentially
The task of level is to interrupt the task of high priority.
Optionally, embodiment of the present invention low priority set in advance periodic duty, can be operating system
The minimum periodic duty of a lot of periodic duty medium priorities.Appoint in this low priority cycle set in advance
Business comes interim, other area segments in addition to the area segments of storage significant data can be carried out RAM detection, knot
Close the RAM detection to the area segments storing significant data in step S110, can realize RAM's
All regions are comprehensively detected.
It should be noted that step S100 is the step that the embodiment of the present invention first carries out in advance, performed once
After step S100, step S110 repeatedly and step S120 can be performed;I.e. the embodiment of the present invention is in advance
First ram space is carried out segment processing, ram space is divided into the region of a storage significant data
After section and other area segments;Can district when operating system starts every time, to described storage significant data
Territory section carries out RAM detection;Come interim at each low priority periodic duty set in advance, to described its
He carries out RAM detection at area segments.
The RAM detection method that the embodiment of the present invention provides, is carried out the ram space within controller point
Section processes, and is divided into area segments and other area segments of a storage significant data, works as os starting
Time, first the area segments of described storage significant data is carried out RAM detection, after os starting, in advance
The low priority periodic duty first set comes interim, then other area segments of RAM are carried out RAM detection;
The embodiment of the present invention uses the mode that operating system combines with RAM detection function, on different opportunitys pair
Area segments and other area segments of storage significant data detect, thus avoid RAM detection and spend relatively
For a long time, and the problem that the speed of service of controller and execution time are impacted, set in advance simultaneously
Fixed low priority periodic duty comes interim, and other area segments of RAM are carried out RAM detection, thus
Can in the case of avoiding affecting other function of controller, RAM detection be implemented complete, improve control
The performance indications of device processed.The RAM detection method that the embodiment of the present invention provides can not affect controller
The speed of service and in the case of the execution time, comprehensively detects RAM, releases existing for RAM
Potential safety hazard.
Optionally, the embodiment of the present invention is being carried out except other area segments of the area segments storing significant data
During RAM detection, can first the clear band not storing data in other area segments described be detected, more right
The non-blank-white section storing data in other area segments described detects.Fig. 3 shows other area segments
In do not store the method flow that the clear band of data carries out detecting, with reference to Fig. 3, the method may include that
Step S200, initial address to described clear band write the first data;
Optionally, the first data can be 1;
Step S210, the data read in described initial address;
Data read-out by step S220, judgement are the most identical with described first data, if it is not, perform step
Rapid S230, if so, performs step S240;
Step S230, determine that the address space of described clear band is abnormal;
Step S240, in described initial address, write the second data;
Optionally, the second data can be 0;
Step S250, again read the data in described initial address;
The data that step S260, judgement read again are the most identical with described second data, if it is not, perform
Step S230, if so, performs step S270;
Step S270, determine that the address space of described clear band is normal.
In embodiments of the present invention, if the first data of write and the data of reading, or write
The second data and the data of reading, the most provable this address free air anomaly, need record fault;
Only the first data and the data of reading in write are equal, and the second data of write and the data of reading
Time equal, the most provable this address space is normal.
Fig. 4 shows the method flow detecting the non-blank-white section storing data in other area segments,
With reference to Fig. 4, the method may include that
Step S300, by described non-blank-white section data preserve the most empty to the address space detected
In white section;
Owing to needing that the data of address space are rewritten, so needing first by the data in non-blank-white section
Preserve, the data in non-blank-white section copied in the normal clear band of the completeest address space,
Optionally, the normal clear band of the completeest address space can be determined by method shown in Fig. 3.
Optionally, owing to being likely to occur mistake in copy procedure, so needing to utilize CRC algorithm to incite somebody to action
Data after copy with copy before data compare, if through verification after result identical, then can perform
Follow-up flow process;The most again the data in non-blank-white section are copied to the completeest address space normal
In clear band, until check results is identical just performs follow-up flow process.
Step S310, initial address to described non-blank-white section write the first data;
Step S320, the data read in described initial address;
Data read-out by step S330, judgement are the most identical with described first data, if it is not, perform step
Rapid S340, if so, performs step S350;
Step S340, determine that the address space of described non-blank-white section is abnormal;
Step S350, in described initial address, write the second data;
Step S360, again read the data in described initial address;
Data read-out by step S370, judgement are the most identical with described second data, if it is not, perform step
Rapid S340, if so, execution step S380;
Step S380, determine that the address space of described non-blank-white section is normal;
Step S390, after the address space determining described non-blank-white section is normal, will preserve to having detected
Data in the normal clear band of address space copy back in described non-blank-white section.
Optionally, after detection, the data that will copy back in described non-blank-white section again are needed, with institute
State the original data preserved in non-blank-white section and carry out CRC check, performed by rear RAM detection in verification
Complete.
Optionally, after the address space having detected RAM clear band is normal, can call and be stored in advance in
ROM(Read Only Memory, read-only memory) in RAM detection program in ram region section
The non-blank-white section of storage data detects.For the processing speed of faster procedure, RAM is examined by the present invention
Ranging sequence copies to from ROM in RAM and runs, and the opportunity of copy is the most laggard for having detected clear band
Row copy.As may insure that certain section of ram space is normal in the development phase, then can also be in system start-up
Rear directly RAM is detected program copies ram space to from ROM Space, thus can more save
The time that RAM detection performs.
It should be noted that the first number in method shown in the first data in method shown in Fig. 3 and Fig. 4
According to being identical data, it is also possible to be different data;The second data in method shown in Fig. 3 and
The second data in method shown in Fig. 4 can be identical data, it is also possible to is different data.As long as
Ensure that the first data in each method of method shown in method shown in Fig. 3 and Fig. 4 and the second data are
Data.
Providing below one more preferably RAM detection method, the method may include that
Step S400, in advance ram space being divided into some sections, the data segment of every section of ram space is empty
Between and stack space address continuous, data segment space and one section of ram space of stack space address continuous print are divided
For the area segments of described storage significant data, by other segment data section spaces and stack space address continuous print
Ram space is divided into other area segments described;
Step S410, when os starting, the area segments of described storage significant data is carried out RAM
Detection;
Step S420, it is low priority periodic duty set in advance at the periodic duty of current operation system
Time, the initial address write 1 to the clear band not storing data in other area segments described;
Step S430, the data read in described initial address;
Data read-out by step S440, judgement are the most identical with 1, if it is not, perform step S450, if
It is to perform step S460;
Step S450, determine that the address space of described clear band is abnormal;
Step S460, write 0 in described initial address;
Step S470, again read the data in described initial address;
The data that step S480, judgement read again are the most identical with 0, if it is not, perform step S450,
If so, step S490 is performed;
Step S490, determine that the address space of described clear band is normal;
Step S500, detecting RAM clear band, and after the address space of clear band is normal, calling
The RAM being stored in advance in ROM detects program, preserves the data in described non-blank-white section to examining
In the normal clear band of address space surveyed;
Step S510, utilize CRC(Cyclic Redundancy Check, CRC) calculate
Method will copy after data with copy before data compare, the data after copy with copy before number
According to check results identical time, to described non-blank-white section initial address write 1;
Step S520, the data read in described initial address;
Data read-out by step S530, judgement are the most identical with 1, if it is not, perform step S540, if
It is to perform step S550;
Step S540, determine that the address space of described non-blank-white section is abnormal;
Step S550, write 0 in described initial address;
Step S560, again read the data in described initial address;
Data read-out by step S570, judgement are the most identical with 0, if if it is not, performing step S540
It is to perform step S580;
Step S580, determine that the address space of described non-blank-white section is normal;
Step S590, after the address space determining described non-blank-white section is normal, will preserve to having detected
Data in the normal clear band of address space copy back in described non-blank-white section;
Step S600, utilize CRC algorithm judge copy back the data in described non-blank-white section, non-with described
In clear band, the original data preserved are the most identical, if it is not, perform step S590, if so, perform step
S610;
Step S610, end flow process.
The embodiment of the present invention provide RAM detection method can not affect controller the speed of service and
In the case of the execution time, RAM is comprehensively detected, release the potential safety hazard existing for RAM.
The RAM detecting system provided the embodiment of the present invention below is introduced, RAM described below
Detecting system is corresponding with above-described RAM detection method, and both can be cross-referenced.
The structured flowchart of the RAM detecting system that Fig. 5 provides for the embodiment of the present invention, with reference to Fig. 5, this is
System may include that
Segmentation module 100, in advance ram space being carried out segment processing, divides ram space
It is area segments and other area segments of a storage significant data;
Optionally, ram space can be divided into some sections, the data segment space of every section of ram space and
Stack space address is continuous, and data segment space and one section of ram space of stack space address continuous print are divided into institute
State the area segments of storage significant data, by empty to other segment data section spaces and stack space address continuous print RAM
Between be divided into other area segments described.
First detection module 200, for the region when os starting, to described storage significant data
Duan Jinhang RAM detects;
Second detection module 300, for the periodic duty of current operation system be set in advance low preferentially
During level periodic duty, other area segments described are carried out RAM detection.
The RAM detecting system that the embodiment of the present invention provides, is carried out the ram space within controller point
Section processes, and is divided into area segments and other area segments of a storage significant data, works as os starting
Time, first detection module first carries out RAM detection to the area segments of described storage significant data, in operation system
After system starts, low priority periodic duty set in advance comes interim, and the second detection module is again to RAM's
Other area segments carry out RAM detection;The embodiment of the present invention uses operating system to detect function phase with RAM
In conjunction with mode, on different opportunitys, the storage area segments of significant data and other area segments are detected,
Thus avoid RAM detection and take a long time, and the speed of service and execution time to controller causes
The problem of impact, comes interim, other districts to RAM simultaneously at low priority periodic duty set in advance
Territory section carries out RAM detection, such that it is able to will in the case of avoiding affecting other function of controller
RAM detection is implemented complete, improves the performance indications of controller.The RAM that the embodiment of the present invention provides
Detecting system can not affect the speed of service of controller and in the case of the execution time, carries out RAM
Comprehensively detection, releases the potential safety hazard existing for RAM.
Fig. 6 shows the structure of the second detection module 300, and with reference to Fig. 6, the second detection module 300 is permissible
Including:
Clear band detector unit 310, for carrying out the clear band not storing data in other area segments described
Detection;
Non-blank-white section detector unit 320, is used in clear band detector unit 310 in other area segments described
After not storing the clear band detection of data, then to other area segments described store the non-blank-white of data
Duan Jinhang detects.
Fig. 7 shows the structure of clear band detector unit 310, with reference to Fig. 7, clear band detector unit 310
May include that
First write subelement 311, for writing the first data to the initial address of described clear band;
First reads subelement 312, for reading the data in described initial address;
First determines subelement 313, for when read-out data are different from described first data, determines
The address space of described clear band is abnormal;
Second write subelement 314, for when read-out data are identical with described first data, to institute
State and initial address writes the second data;
Second reads subelement 315, for writing in described initial address at the second write subelement 314
After second data, again read the data in described initial address;
Second determines subelement 316, for reading the data that again read of subelement 315 with described second
During the second data difference, determine that the address space of described clear band is abnormal;
3rd determines subelement 317, for reading the data that again read of subelement 315 with described second
When second data are identical, determine that the address space of described clear band is normal.
Fig. 8 shows the structure of non-blank-white section detector unit 320, with reference to Fig. 8, non-blank-white section detector unit
320 may include that
Data preserve subelement 321, for preserving the data in described non-blank-white section to the address detected
In the normal clear band in space;
3rd write subelement 322, for writing the first data to the initial address of described non-blank-white section;
Third reading goes out subelement 323, for reading the data in described initial address;
4th determines subelement 324, for going out data read-out by subelement 323 and described the in third reading
During one data difference, determine that the address space of described non-blank-white section is abnormal;
4th write subelement 325, for going out data read-out by subelement 323 and described the in third reading
When one data are identical, in described initial address, write the second data;
4th reads subelement 326, for writing in described initial address at the 4th write subelement 325
After second data, again read the data in described initial address;
5th determines subelement 327, for reading the data that again read of subelement 326 with described the 4th
During the second data difference, determine that the address space of described non-blank-white section is abnormal;
6th determines subelement 328, for reading the data that again read of subelement 326 with described the 4th
When second data are identical, determine that the address space of described non-blank-white section is normal;
Data restore subelement 329, for after the address space determining described non-blank-white section is normal, will protect
The data deposited to the normal clear band of the address space detected copy back in described non-blank-white section.
The embodiment of the present invention provide RAM detecting system can not affect controller the speed of service and
In the case of the execution time, RAM is comprehensively detected, release the potential safety hazard existing for RAM.
In this specification, each embodiment uses the mode gone forward one by one to describe, and each embodiment stresses
Being the difference with other embodiments, between each embodiment, identical similar portion sees mutually.
For device disclosed in embodiment, owing to it corresponds to the method disclosed in Example, so describing
Fairly simple, relevant part sees method part and illustrates.
Professional further appreciates that, respectively shows in conjunction with what the embodiments described herein described
The unit of example and algorithm steps, it is possible to electronic hardware, computer software or the two be implemented in combination in,
In order to clearly demonstrate the interchangeability of hardware and software, the most general according to function
Describe composition and the step of each example.These functions perform with hardware or software mode actually,
Depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can be to each specific
Should be used for use different methods to realize described function, but this realization is it is not considered that beyond this
The scope of invention.
The method described in conjunction with the embodiments described herein or the step of algorithm can directly use hardware,
The software module that processor performs, or the combination of the two implements.Software module can be placed in and deposit at random
Reservoir (RAM), internal memory, read only memory (ROM), electrically programmable ROM, electric erasable can be compiled
Appointing well known in journey ROM, depositor, hard disk, moveable magnetic disc, CD-ROM or technical field
In the storage medium of other form of anticipating.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses
The present invention.Multiple amendment to these embodiments will be aobvious and easy for those skilled in the art
See, generic principles defined herein can without departing from the spirit or scope of the present invention,
Realize in other embodiments.Therefore, the present invention is not intended to be limited to the embodiments shown herein,
And it is to fit to the widest scope consistent with principles disclosed herein and features of novelty.
Claims (8)
1. a random access memory ram detection method, it is characterised in that in advance ram space is entered
Row segment processing, is divided into area segments and other area segments of a storage significant data by ram space,
Described significant data includes ensureing the data that the operating system of controller can normally perform down, described side
Method includes:
When os starting, the area segments of described storage significant data is carried out RAM detection;
When the periodic duty of current operation system is low priority periodic duty set in advance, to described
Other area segments carry out RAM detection;
Wherein, described other area segments described are carried out RAM detection include:
First the clear band not storing data in other area segments described is detected, then to other districts described
The non-blank-white section storing data in the section of territory detects.
Method the most according to claim 1, it is characterised in that described ram space is carried out point
Section processes and includes:
Ram space is divided into some sections, the data segment space of every section of ram space and stack space address
Continuously;
The described area segments that ram space is divided into a storage significant data and other area segments include:
Data segment space and one section of ram space of stack space address continuous print are divided into described storage important
Other segment data section spaces and stack space address continuous print ram space are divided into institute by the area segments of data
State other area segments.
Method the most according to claim 1, it is characterised in that described in other area segments described
Do not store the clear band of data to carry out detection and include:
Initial address to described clear band writes the first data, reads the data in described initial address;
If read-out data are different from described first data, it is determined that the address space of described clear band is different
Often;
If read-out data are identical with described first data, then in described initial address, write the second number
According to, again read the data in described initial address;
If the data again read are different from described second data, it is determined that the address space of described clear band
Abnormal;
If the data again read are identical with described second data, it is determined that the address space of described clear band
Normally.
Method the most according to claim 1, it is characterised in that described in other area segments described
The non-blank-white section of storage data carries out detection and includes:
Data in described non-blank-white section are preserved to the normal clear band of the address space detected;
Initial address to described non-blank-white section writes the first data, reads the data in described initial address;
If read-out data are different from described first data, it is determined that the address space of described non-blank-white section
Abnormal;
If read-out data are identical with described first data, then in described initial address, write the second number
According to, again read the data in described initial address;
If the data again read are different from described second data, it is determined that the address of described non-blank-white section is empty
Between abnormal;
If the data again read are identical with described second data, it is determined that the address of described non-blank-white section is empty
Between normal;
After the address space determining described non-blank-white section is normal, will to the address space detected just preserve
The normal data in clear band copy back in described non-blank-white section.
Method the most according to claim 3, it is characterised in that described method also includes:
After the address space having detected RAM clear band is normal, calls and be stored in advance in ROM
The non-blank-white section storing data in ram region section is detected by RAM detection program.
6. a random access memory ram detecting system, it is characterised in that including:
Segmentation module, in advance ram space being carried out segment processing, is divided into one by ram space
The area segments of individual storage significant data and other area segments;Described significant data includes the behaviour ensureing controller
Make the data that system can normally perform down;
First detection module, for the area segments when os starting, to described storage significant data
Carry out RAM detection;
Second detection module, is low priority set in advance for the periodic duty in current operation system
During periodic duty, other area segments described are carried out RAM detection;
Wherein, described second detection module includes:
Clear band detector unit, for examining the clear band not storing data in other area segments described
Survey;
Non-blank-white section detector unit, is used in described clear band detector unit is to other area segments described not
After the clear band detection of storage data, then to other area segments described store the non-blank-white section of data
Detect.
System the most according to claim 6, it is characterised in that described clear band detector unit includes:
First write subelement, for writing the first data to the initial address of described clear band;
First reads subelement, for reading the data in described initial address;
First determines subelement, for when read-out data are different from described first data, determines institute
The address space stating clear band is abnormal;
Second write subelement, for when read-out data are identical with described first data, to described
Initial address writes the second data;
Second reads subelement, writes for writing subelement described second in described initial address
After two data, again read the data in described initial address;
Second determines subelement, for reading the data that again read of subelement and described the described second
During two data differences, determine that the address space of described clear band is abnormal;
3rd determines subelement, for reading the data that again read of subelement and described the described second
When two data are identical, determine that the address space of described clear band is normal.
System the most according to claim 6, it is characterised in that described non-blank-white section detector unit bag
Include:
Data preserve subelement, empty for preserving the data in described non-blank-white section to the address detected
Between in normal clear band;
3rd write subelement, for writing the first data to the initial address of described non-blank-white section;
Third reading goes out subelement, for reading the data in described initial address;
4th determines subelement, for going out the data and described first read-out by subelement in described third reading
During data difference, determine that the address space of described non-blank-white section is abnormal;
4th write subelement, for going out the data and described first read-out by subelement in described third reading
When data are identical, in described initial address, write the second data;
4th reads subelement, writes for writing subelement the described 4th in described initial address
After two data, again read the data in described initial address;
5th determines subelement, for reading the data that again read of subelement and described the the described 4th
During two data differences, determine that the address space of described non-blank-white section is abnormal;
6th determines subelement, for reading the data that again read of subelement and described the the described 4th
When two data are identical, determine that the address space of described non-blank-white section is normal;
Data restore subelement, for after the address space determining described non-blank-white section is normal, will preserve
Data to the normal clear band of the address space detected copy back in described non-blank-white section.
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EP3163441B1 (en) * | 2014-11-10 | 2018-09-19 | Huawei Technologies Co. Ltd. | Computer device and memory starting method for computer device |
WO2016086411A1 (en) | 2014-12-05 | 2016-06-09 | 华为技术有限公司 | Controller, flash memory device, method for identifying data block stability and method for storing data on flash memory device |
CN105630644B (en) * | 2015-12-18 | 2019-05-21 | 无锡飞翎电子有限公司 | The internal-memory detection method and system of micro-control unit in washing machine |
CN105788646B (en) * | 2016-03-29 | 2019-05-03 | 杭州和利时自动化有限公司 | A kind of RAM detection method and system |
CN113468008B (en) * | 2021-07-13 | 2024-06-18 | 深圳市越疆科技有限公司 | Detection method, device, equipment and storage medium of safety controller |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1460269A (en) * | 2000-11-09 | 2003-12-03 | 北电网络有限公司 | At-speed built-in self testing of multi-port compact SRAMS |
CN101310343A (en) * | 2005-11-14 | 2008-11-19 | 三菱电机株式会社 | Memory diagnosis device |
CN101441588A (en) * | 2007-11-22 | 2009-05-27 | 英业达股份有限公司 | Memory body test method |
CN103136105A (en) * | 2011-11-28 | 2013-06-05 | 广东新岸线计算机系统芯片有限公司 | Memory management method, embedded type system and video data processing system |
CN103282892A (en) * | 2011-02-18 | 2013-09-04 | 三菱电机株式会社 | Memory diagnostic device, memory diagnostic method, and program |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8509014B2 (en) * | 2011-07-20 | 2013-08-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs |
-
2013
- 2013-09-23 CN CN201310436088.7A patent/CN103455436B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1460269A (en) * | 2000-11-09 | 2003-12-03 | 北电网络有限公司 | At-speed built-in self testing of multi-port compact SRAMS |
CN101310343A (en) * | 2005-11-14 | 2008-11-19 | 三菱电机株式会社 | Memory diagnosis device |
CN101441588A (en) * | 2007-11-22 | 2009-05-27 | 英业达股份有限公司 | Memory body test method |
CN103282892A (en) * | 2011-02-18 | 2013-09-04 | 三菱电机株式会社 | Memory diagnostic device, memory diagnostic method, and program |
CN103136105A (en) * | 2011-11-28 | 2013-06-05 | 广东新岸线计算机系统芯片有限公司 | Memory management method, embedded type system and video data processing system |
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