CN103442230B - The Lagrange multiplier obtaining value method of SAO mode adjudgings suitable for the encoder of HEVC standard - Google Patents
The Lagrange multiplier obtaining value method of SAO mode adjudgings suitable for the encoder of HEVC standard Download PDFInfo
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Abstract
The invention belongs to high-definition digital video compression coding and decoding technical field, the Lagrange multiplier obtaining value method of SAO mode adjudgings specially a kind of encoder suitable for HEVC standard.The present invention passes through formula when carrying out the luminance component Y mode judgement of imageRule out optimization model；When carrying out two chromatic component Cb and Cr mode adjudgings of Y, pass through formulaRule out optimization model；Lagrange multiplier λ under Y-componentYWith the Lagrange multiplier λ under Cb, Cr componentCb&Cr, respectively by tabling look-up to obtain.The multiplier computation when present invention can be adjudicated with the simplified mode, reduces the expense of hardware, while also can significantly improve the working frequency of hardware, so as to fulfill the real-time coding of HD video.
Description
Technical field
The invention belongs to high-definition digital video compression coding and decoding technical field, for HEVC video encoding and decoding standards, specifically
It is related to one kind to be suitable under HEVC video encoding standards, the Lagrange of the mode adjudging of SAO modules in hardware video encoders
Multiplier obtaining value method.
Background technology
HEVC (High Efficiency Video Coding) is by International Telecommunication Union（ITU）And motion pictures expert
Group（MPEG）The video encoding and decoding standard of future generation that the tissue JCTVC that joint is set up is proposed.Target is in identical visual effect
On the premise of, compared to previous generation standards H.264/AVC, compression ratio doubles.
Video encoder based on HEVC, its structure chart following module as shown in Figure 1, be mainly made of：It is pre- in frame
The module groups such as survey, inter prediction, conversion, quantization, inverse quantization, inverse transformation, reconstruction, deblocking filter, the compensation of adaptive sampling point
Into.The basic process of video compression coding can be summarized as follows：1. using infra-frame prediction or inter prediction mode to current original
Video flowing pixel is predicted；2. original pixel value is subtracted each other to obtain residual values with predicting the pixel value come；3. by residual error
Converted and quantification treatment, the residual error coefficient exported is again into crossing CABAC（Context-based Adaptive
Binary Arithmetic Coding）Entropy coding forms last compression output code flow；4. residual error coefficient by inverse quantization and
Inverse transformation processing, then the prediction pixel with obtaining before are added to obtain and rebuild pixel, store the reference frame pixel as prediction.
Processing unit block in HEVC introduces the structure of quaternary tree, and the size of image processing block is up to 64 × 64, it
It can also continue to recursively be divided into 32 × 32,16 × 16,8 × 8,4 × 4 fritter combination, and be respectively processed.Coding side
All dividing conditions of block are once traveled through, be optimal using the processing for determining which kind of dividing condition.
SAO（Sample Adaptive Offset）Module is the adaptive sampling point compensating module in Fig. 1, module master
Will be by original pixel value and the value of the comparison acquisition offset of pixel value by deblocking filter after, then by offset
Value is added to after deblocking filter on pixel value, reduces the distortion of image, make reconstruction image have better quality and
PSNR values（Y-PSNR）.
When the module does mode adjudging, it is necessary to calculate the lambda value under the pattern, in official's reference software of HEVC
In HM9.0, the value of the lambda is floating number, and the multiplication calculation procedure of floating number be in hardware design one it is time-consuming,
Chip area is consumed, while the process of working frequency of chip can be limited.
The content of the invention
It is an object of the invention to provide one kind can overcome the deficiencies in the prior art, quickly be suitable for HEVC standard volume
The lambda obtaining value method of SAO mode adjudgings in code device.
Inside usual original video stream, each image includes a luminance component（Y）, each luminance component correspondence two
A chromatic component（Cb、Cr）.In SAO modules, its Y-component block based on 64x64 size and two 32x32Cr, Cb points
Gauge block.SAO modules have two kinds of basic module EO（Edge Offset）Edge compensation and BO（Band Offset）Band compensates, EO
By comparing the value of each pixel pixel adjacent thereto in current pixel block, some statistical informations are obtained to obtain offset
Value；BO is by each pixel value of itself, obtains some statistical informations to obtain the value of offset；Wherein, EO patterns
The lower diverse location according to the adjacent pixel compared, can be divided into four kinds of patterns：EO_0, EO_1, EO_2, EO_3, as shown in Fig. 2,
If c is current pixel point, a and b are required neighbor pixel relatively, then the pixel position of pattern EO_0 is from left to right
For a, c, b, the pixel position of pattern EO_1 to be a, c, b from top to bottom, the pixel position of pattern EO_2 is upper left, in
Between, lower-right diagonal position line be respectively a, c, b, the pixel position of pattern EO_3 is upper right, centre, diagonal down-left line be respectively a, c,
b。
Thus, by some statistical informations, current block Y-component can be obtained in five kinds of EO_0, EO_1, EO_2, EO_3, BO
Respective 4 offsets under pattern, have 20 offsets altogether；Cb and Cr components are respectively in five kinds of EO_0, EO_1, EO_2, EO_3, BO
It is each under pattern to have 4 offsets by oneself.
（1）.
Wherein, Distortion（Distortion）For the distortion between a certain pattern hypograph and original image, λ（Lambda）
As Lagrange multiplier, Bitrate bit rates are the required bit rate of deviant transmitted under the pattern and the pattern,
Cost is the cost value under a certain pattern.
First, Y-component can compare the component under EO_0, EO_1, EO_2, EO_3, BO this 5 kinds of patterns, any pattern
The Cost drawn is minimum, i.e. Y-component selection changes 4 offsets under pattern.Under normal conditions, formula（2）In lambda
λY, pass through formula（3）It can be calculated, but such calculation is slow in hardware design medium velocity, and the present invention uses what is tabled look-up by table 1
Mode can quickly obtain lambda lambdaYValue, input when tabling look-up at this time is QP.At the same time so that formula（2）In multiplier fortune
Calculation becomes simple.In this way, pass through formula（2）Can obtain Y-component optimal mode and the pattern under 4 offsets.
（2）
（3）.
Secondly, formula is passed through（4）Mode adjudging selects 4 offsets under the optimization model and the pattern of Cb components.Logical
In the case of often, formula（5）In lambda lambdaCb&Cr, pass through formula（5）It can be calculated, but such calculation is in hardware design middling speed
Degree is slow, and the present invention can quickly obtain lambda lambda table 1 with by way of tabling look-upCb&CrValue, input when tabling look-up at this time is
QPchroma, QPchromaPass through 2 acquisitions of tabling look-up.At the same time so that formula（4）In multiplier computation become simple.In this way, pass through formula（4）
Can obtain Cb components optimal mode and the pattern under 4 offsets.Similarly, the optimal mode and the mould of Cb components are obtained
4 offsets under formula；4 offsets under the optimal mode of Cr components and the pattern, can be obtained with similar method.
（4）
（5）.
Obtain 4 offsets under current Y-component, Cb components and the respective optimization model of Cr components and optimization model
Afterwards, it is also necessary to and merging model comparisions, merging patterns are current Y-component, Cb components and Cr components multiplexing left side block
Or the offset under the pattern and the pattern of top block.The judgement general-purpose type（6）Make decisions, its acquisition modes neutralized is led to
Cross table 1 to obtain, finally choose optimization model.
（6）
1. lambda lambda of tableYAnd λCb&CrValue table
2. QP of tablechromaValue table
。
The present invention can be rapidly performed by obtaining the value of Lagrange multiplier during mode adjudging in SAO modules, can simplify
Multiplier computation during mode adjudging, reduces the expense of hardware, while also can significantly improve the working frequency of hardware.
Brief description of the drawings
Fig. 1：HEVC video encoder architecture figures.
Fig. 2：Four kinds of EO patterns.
Embodiment
Using method provided by the invention, the Lagrange multiplier value detailed process for carrying out mode adjudging is as follows：
The mode adjudging of 1.Y components
Y-component can compare the component under EO_0, EO_1, EO_2, EO_3, BO this 5 kinds of patterns, and any pattern is drawn
Cost it is minimum, i.e., Y-component selects to change 4 offsets under pattern.Under normal conditions, formula（2）In lambda lambdaY, pass through
Formula（3）Can be calculated, but such calculation is slow in hardware design medium velocity, the present invention table 1 with by way of tabling look-up i.e.
Lambda lambda can quickly be obtainedYValue, input when tabling look-up at this time is QP.At the same time so that formula（2）In multiplier computation become
Simply.In this way, pass through formula（2）Can obtain Y-component optimal mode and the pattern under 4 offsets.
The mode adjudging of 2.Cb and Cr components
Pass through formula（4）Mode adjudging selects 4 offsets under the optimization model and the pattern of Cb components.In normal conditions
Under, formula（5）In lambda lambdaCb&Cr, pass through formula（5）It can be calculated, but such calculation is slow in hardware design medium velocity,
The present invention can quickly obtain lambda lambda table 1 with by way of tabling look-upCb&CrValue, input when tabling look-up at this time is
QPchroma, QPchromaPass through 2 acquisitions of tabling look-up.At the same time so that formula（4）In multiplier computation become simple.In this way, pass through formula（4）
Can obtain Cb components optimal mode and the pattern under 4 offsets.Similarly, the optimal mode and the mould of Cb components are obtained
4 offsets under formula；4 offsets under the optimal mode of Cr components and the pattern, can be obtained with similar method.
3. the judgement of current optimization model and merging patterns
Obtain 4 offsets under current Y-component, Cb components and the respective optimization model of Cr components and optimization model
Afterwards, it is also necessary to and merging model comparisions, merging patterns are current Y-component, Cb components and Cr components multiplexing left side block
Or the offset under the pattern and the pattern of top block.The judgement general-purpose type（6）Make decisions, its acquisition modes neutralized is led to
Cross table 1 to obtain, finally choose optimization model.
The present invention can be rapidly performed by obtaining the value of lambda during mode adjudging in SAO modules, can be sentenced with the simplified mode
Multiplier computation when certainly, reduces the expense of hardware, while also can significantly improve the working frequency of hardware.
Claims (1)
1. a kind of Lagrange multiplier obtaining value method of the quick SAO mode adjudgings suitable for the encoder of HEVC standard, its
It is characterized in that concretely comprising the following steps：
When carrying out Y-component mode adjudging, optimization model is ruled out by formula (1)；Wherein, Distortion is in a certain pattern
Distortion between hypograph and original image, λYFor the Lagrange multiplier under Y-component, Bitrate for transmit the mode value and
The required bit rate of deviant under the pattern, Cost are cost value in this mode；λYBy using QP as input inquiry
Table 1 can obtain, and QP is the quantization step value of present component；
When carrying out the judgement of Cb and Cr component modes, optimization model is ruled out by formula (2)；Wherein, Distortion is at certain
Distortion between one pattern hypograph and original image, λCb&CrFor the Lagrange multiplier under Cb and Cr components, Bitrate is biography
The required bit rate of deviant under the defeated mode value and the pattern, Cost are cost value in this mode；λCb&CrPass through
With QPchromaObtained for input inquiry table 1, and QPchromaBy being obtained by input inquiry table 2 of QP, QP is the amount of present component
Change step value；
Wherein, Y is the luminance component of image, and Cb, Cr are respectively corresponding two chromatic components of Y；
Cost=Distortion+ λY*Bitrate (1)
Cost=Distortion+ λCb&Cr*Bitrate (2)
1. lambda lambda of tableYAnd λCb&CrValue table
Table 2.QPchromaValue table
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| CN103220510A (en) * | 2012-01-20 | 2013-07-24 | 索尼公司 | Flexible band offset mode in sample adaptive offset in HEVC |
| CN103248888A (en) * | 2012-02-10 | 2013-08-14 | 美国博通公司 | Sample adaptive offset (SAO) in accordance with video coding |
| EP2627087A1 (en) * | 2012-02-10 | 2013-08-14 | Broadcom Corporation | Frequency domain sample adaptive offset (SAO) using spectral band replication (SBR) |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103220510A (en) * | 2012-01-20 | 2013-07-24 | 索尼公司 | Flexible band offset mode in sample adaptive offset in HEVC |
| CN103248888A (en) * | 2012-02-10 | 2013-08-14 | 美国博通公司 | Sample adaptive offset (SAO) in accordance with video coding |
| EP2627087A1 (en) * | 2012-02-10 | 2013-08-14 | Broadcom Corporation | Frequency domain sample adaptive offset (SAO) using spectral band replication (SBR) |
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| High efficiency video coding (HEVC) text specification draft 8;Benjamin Bross;《JCTVC-J1003_d7》;20120720;全文 * |
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