CN103441961A - Method and device for achieving high-speed broadband based on multiple processing logic lines - Google Patents
Method and device for achieving high-speed broadband based on multiple processing logic lines Download PDFInfo
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- CN103441961A CN103441961A CN2013102901101A CN201310290110A CN103441961A CN 103441961 A CN103441961 A CN 103441961A CN 2013102901101 A CN2013102901101 A CN 2013102901101A CN 201310290110 A CN201310290110 A CN 201310290110A CN 103441961 A CN103441961 A CN 103441961A
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Abstract
The invention discloses a method and device for achieving high-speed broadband based on multiple processing logic lines. Messages enter a chip from physical layer ports of the chip and undergo analysis of processing engines and forwarding of forwarding managing modules in the entering direction of the processing logic lines, undergo editing of the processing engines in the exiting direction of the processing logic lines and are outputted from the chip physical layer ports. A connection channel is arranged between the forwarding managing modules of every two processing logic lines to process messages by spanning the processing logic lines. According to the method and device for achieving high-speed broadband based on multiple processing logic lines, messages can be processed by the processing logic lines at the same time; meanwhile, messages can be processed by spanning the processing logic lines, the speed in processing the messages by the chip is greatly improved, the gradually higher requirement for band width is met, the development cost of the chip is low, the practicability is high and popularization and use of the method and device for achieving high-speed broadband based on the processing logic lines are convenient to perform.
Description
Technical field
The present invention relates to network communications technology field, especially relate to a kind of by chip internal, increasing the method and apparatus that the processing logic line is realized the high speed bandwidth.
Background technology
Along with the fast development of network, and the application of packet processing chip is more and more, also thereupon more and more higher to the requirement of packet processing chip.Especially burning hot cloud computing technology, the data center's technology of development in recent years, require the Ethernet switch bandwidth to reach even thousand Gbps of hundred Gbps usually, and this just requires the core component one bag processing and exchanging chip of Ethernet switch that higher bandwidth can be provided.
Current bag processing and exchanging chip adopts asic technology, as far as possible complicated processing forward logical set is formed in to chip internal, by the chip hardware deal with data, thereby has greatly improved processing speed.Yet traditional bag processing forward chip internal generally only has a processing logic line, and bandwidth often is limited by manufacturing process, so the processing speed of chip is affected too, the speed-raising limited space.
Summary of the invention
The object of the invention is to overcome the defect of prior art, a kind of method and apparatus of realizing high-speed wideband based on many processing logic lines is provided, by at chip internal, increasing the processing logic line, realize that many processing logic lines process the message of receiving simultaneously, realize the high speed bandwidth, greatly improved message processing speed.
For achieving the above object, the present invention proposes following technical scheme: a kind of method that realizes high-speed wideband based on many processing logic lines, at at least two logical process lines of chip internal setting and for connecting the interface channel of logical process line, message is from the chip physical layer port enters into chip internal, after the parallel processing of logical process line or sequential processes of chip internal, from the chip physical layer port, export.
Preferably, the message processing procedure of every logical process line is identical.
The processing procedure of described logical process line to message: after message enters the Inbound processing engine by passage, the Inbound processing engine is resolved message, obtain message attribute, search to transmit according to message attribute and determine the message outlet, message with outlet information is forwarded to the outgoing direction processing engine through forwarding administration module, and the outgoing direction processing engine carries out after editing and processing, message being sent from physical layer port to message according to message outlet information.
The processing procedure of described logical process line to message: after message enters the Inbound processing engine by passage, the Inbound processing engine is resolved message, obtain message attribute, search to transmit according to message attribute and determine the message outlet, message with outlet information is forwarded to the outgoing direction processing engine through forwarding administration module, and the outgoing direction processing engine carries out after editing and processing, message being sent from physical layer port to message according to message outlet information.
The present invention has also disclosed a kind of device of realizing high-speed wideband based on many processing logic lines, and chip internal comprises two or more processing logic line, between every two processing logic lines, by interface channel, is connected.
Preferably, the message processing procedure of every processing logic line is identical.
Every the processing logic line includes direction processing engine module, outgoing direction processing engine module and forwards administration module, described message obtains message outlet information through Inbound processing engine module parses, be forwarded to outgoing direction processing engine module through forwarding administration module again, outgoing direction processing engine module carries out after editing and processing, it being sent from physical layer port to message.
Be provided with interface channel between the forwarding administration module of every two processing logic lines.
Beneficial effect of the present invention is: (1) chip internal adopts many processing logic lines designs, can greatly improve the chip processing speed in the situation that do not improve manufacturing process, meets growing bandwidth requirement; (2) between the processing logic line, interface channel is set, realizes across logic line, message being processed, also further improved the chip processing speed, improved the flexibility ratio that chip is processed message; (3) cost at chip internal increase processing logic line is low, and practicality is high, is convenient to be promoted the use of.
The accompanying drawing explanation
Fig. 1 is the chip structure schematic diagram of wall scroll processing logic line;
Fig. 2 the present invention is based on the schematic flow sheet that many processing logic lines are realized the method for high-speed wideband;
Fig. 3 is the schematic flow sheet of logical process line to the message processing procedure;
Fig. 4 is the chip structure schematic diagram of two processing logic lines in the embodiment of the present invention 1;
Fig. 5 is the chip structure schematic diagram of many processing logic lines in the embodiment of the present invention 2.
Embodiment
Below in conjunction with accompanying drawing of the present invention, the technical scheme of the embodiment of the present invention is carried out to clear, complete description.
The disclosed method and apparatus of realizing high-speed wideband based on many processing logic lines, increase the processing logic line at chip internal, realize that many processing logic lines process the message of receiving simultaneously, significantly improved the chip bandwidth, greatly reduce chip cost.
As shown in Figure 1, wall scroll logical process line comprises network receiver module, Inbound processing engine module, forwarding administration module, outgoing direction processing engine module and the network delivery module of series winding.Shown in Fig. 2, message enters the network receiver module through physical layer, and the message that the network receiver module will enter from the chip exterior physical port is sent into the passage be connected with Inbound processing engine module; Inbound processing engine module receives message and message is resolved from described passage, resolve the attribute that obtains message place port (Port), VLAN (Vlan) or interface (Interface) from message, search and transmit according to message attribute, determine the message outlet, after having resolved, will send into the forwarding administration module with the message of result; Forwarding administration module forwards the packet to outgoing direction processing engine module according to message outlet information; Outgoing direction processing engine module is edited message according to process information, and the message after editor is sent to physical layer port through the network delivery module.
The present invention is in chip internal addition processing logic line, shown in the embodiment 1 of Fig. 1 and Fig. 2, in embodiment 1, adopt two processing logic lines to process the message entered from the chip physical port simultaneously, message enters respectively the physical layer of two processing logic lines from the physical port of chip, thereby and is advanced into two processing logic lines and carries out the message processing.Article two, between the forwarding administration module of processing logic line, with interface channel, connected, therefore message can enter from the physical layer of a processing logic line, after resolving, the Inbound processing engine enters the forwarding administration module, the forwarding administration module that enters another processing logic line by interface channel is forwarded, output to the chip exterior physical outlet from physical layer after outgoing direction processing engine editor finally by another processing logic line, realize carrying out the message processing across the processing logic line.
The present invention is incessantly at two processing logic lines of chip internal equipment, as required, can set up the processing logic line more than two, as shown in Figure 5, message processing procedure on every logic line is identical, and connect with interface channel equally between the forwarding administration module of every two logic line, realize that many logic line are processed message simultaneously, greatly improved message processing speed.
Technology contents of the present invention and technical characterictic have disclosed as above; yet those of ordinary skill in the art still may be based on teaching of the present invention and announcements and are done all replacement and modifications that does not deviate from spirit of the present invention; therefore; protection range of the present invention should be not limited to the content that embodiment discloses; and should comprise various do not deviate from replacement of the present invention and modifications, and contained by the present patent application claim.
Claims (9)
1. realize the method for high-speed wideband based on many processing logic lines, it is characterized in that: at least two logical process lines of chip internal setting and for connecting the interface channel of logical process line, message is from the chip physical layer port enters into chip internal, after the parallel processing of logical process line or sequential processes of chip internal, from the chip physical layer port, export.
2. the method that realizes high-speed wideband based on many processing logic lines according to claim 1, is characterized in that, the message processing procedure of every logical process line is identical.
3. the method that realizes high-speed wideband based on many processing logic lines according to claim 2, it is characterized in that, the processing procedure of described logical process line to message: after message enters the Inbound processing engine by passage, the Inbound processing engine is resolved message, obtain message attribute, search to transmit according to message attribute and determine the message outlet, message with outlet information is forwarded to the outgoing direction processing engine through forwarding administration module, and the outgoing direction processing engine carries out after editing and processing, message being sent from physical layer port to message according to message outlet information.
4. the method that realizes high-speed wideband based on many processing logic lines according to claim 3, is characterized in that, described interface channel is arranged between the forwarding administration module of every two logical process lines, realizes the message repeating across the logical process line.
5. the method that realizes high-speed wideband based on many processing logic lines according to claim 4, it is characterized in that, described logical process line comprises the sequential processes of message: message is through the Inbound processing engine on a logical process line with after forwarding the administration module processing, enter into forwarding administration module and the outgoing direction processing engine on another adjacent logical process line by interface channel, continue to process.
6. realize the device of high-speed wideband based on many processing logic lines, it is characterized in that, chip internal comprises two or more processing logic line, between every two processing logic lines, by interface channel, is connected.
7. the device of realizing high-speed wideband based on many processing logic lines according to claim 6, is characterized in that, the message processing procedure of every processing logic line is identical.
8. the device of realizing high-speed wideband based on many processing logic lines according to claim 7, it is characterized in that, every the processing logic line includes direction processing engine module, outgoing direction processing engine module and forwards administration module, described message obtains message outlet information through Inbound processing engine module parses, be forwarded to outgoing direction processing engine module through forwarding administration module again, outgoing direction processing engine module carries out after editing and processing, it being sent from physical layer port to message.
9. the device of realizing high-speed wideband based on many processing logic lines according to claim 8, is characterized in that, between the forwarding administration module of every two processing logic lines, is provided with interface channel.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101170484A (en) * | 2006-10-23 | 2008-04-30 | 深圳市吉孚通信科技有限公司 | A switching chip and switching device based on non compression transmission protocol |
| CN101572673A (en) * | 2009-06-19 | 2009-11-04 | 杭州华三通信技术有限公司 | Distributed packet switching system and distributed packet switching method of expanded switching bandwidth |
| WO2012010868A1 (en) * | 2010-07-19 | 2012-01-26 | Gnodal Limited | Ethernet switch and method for routing ethernet data packets |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101170484A (en) * | 2006-10-23 | 2008-04-30 | 深圳市吉孚通信科技有限公司 | A switching chip and switching device based on non compression transmission protocol |
| CN101572673A (en) * | 2009-06-19 | 2009-11-04 | 杭州华三通信技术有限公司 | Distributed packet switching system and distributed packet switching method of expanded switching bandwidth |
| WO2012010868A1 (en) * | 2010-07-19 | 2012-01-26 | Gnodal Limited | Ethernet switch and method for routing ethernet data packets |
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Application publication date: 20131211 |