CN103426733A - Ultra-low-K dielectric layer treatment method - Google Patents
Ultra-low-K dielectric layer treatment method Download PDFInfo
- Publication number
- CN103426733A CN103426733A CN2012101608049A CN201210160804A CN103426733A CN 103426733 A CN103426733 A CN 103426733A CN 2012101608049 A CN2012101608049 A CN 2012101608049A CN 201210160804 A CN201210160804 A CN 201210160804A CN 103426733 A CN103426733 A CN 103426733A
- Authority
- CN
- China
- Prior art keywords
- dielectric layer
- ultralow
- processing method
- ion
- layer processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention provides an ultra-low-K dielectric layer treatment method. The method includes the steps that a semiconductor substrate is provided, wherein the an ultra-low-K dielectric layer is formed on the semiconductor substrate, and the surface film of the ultra-low-K dielectric layer contains OH-ions; the ultra-low-K dielectric layer is treated by using neutral particle beams, and H ions in the OH-ions contained in the surface film of the ultra-low-K dielectric layer are replaced by groups containing C and H. According to the method, the ultra-low-K dielectric layer is treated by using the neutral particle beams, the H ions in the OH-ions contained in the surface film of the ultra-low-K dielectric layer are replaced by the groups containing C and H, therefore, the problem that other films in a device are damaged when a protective film is formed on the surface of the ultra-low-K dielectric layer is solved, process reliability is improved, and the quality of the formed device is improved.
Description
Technical field
The present invention relates to field of IC technique, particularly a kind of ultralow K dielectric layer processing method.
Background technology
In existing semiconductor applications, semiconductor circuit has developed into the integrated circuit (integrated circuit, IC) with multilayer interconnection.In the IC of multilayer interconnection, the electric conducting material on interconnection layer need to carry out electric insulation by the electric conducting material on dielectric layer and another interconnection layer.
But in the IC of single or multiple lift interconnection, between the electric conducting material separated with dielectric layer, all can form electric capacity, the electric capacity that this interconnection forms is not needed in design process.Because the speed of IC is inversely proportional to the interconnection resistance (R) of IC and the product of the electric capacity (C) of interconnection, the product of described RC, the RC constant must be as far as possible little, in order to promote suitable signal transmission and switching speed, and reduces as far as possible signal cross-talk.Along with to the more growing requirement of high integration and miniaturization of components of IC, to a key constraints of system speed, be the RC constant restriction in IC.Therefore, reducing the resistance of IC interconnection and electric capacity improves and plays an important role the performance of IC.
A kind of to reduce the method for electric capacity between interconnection layer be the distance increased between interconnection layer, but the interval between interconnection layer increases and can produce adverse influence, for example causes area change and corresponding manufacturing cost to increase.Simultaneously, the interval increased between interconnection line can increase physical size, and therefore increases the cost of integrated circuit.
It is to use low K dielectric layer that another kind reduces the method for electric capacity between interconnection layer, uses low-K material as the rete of realizing electric insulation between interconnection layer.Described low-K material is for example: the Si oxide of organic polymer, amorphous chlorination carbon, microminiature foamed plastics, the silica-based insulator that includes organic polymer, the carbon that adulterated and the Si oxide of the chlorine that adulterated.Wherein, K means dielectric coefficient, and high and low is that the dielectric coefficient of described silicon dioxide is generally 3.9 for the dielectric coefficient of silicon dioxide.
And, along with to the improving constantly of requirement on devices, further proposed to use the K value ultralow K dielectric layer lower than low K dielectric layer, wherein, the K value of ultralow K dielectric layer is generally 2.7.Described ultralow K dielectric layer can be achieved by increase the modes such as loose hole on the basis of low K dielectric layer.Ultralow K dielectric layer can reduce the electric capacity between interconnection layer more significantly, thereby improves the performance of device.
But it also is faced with a very serious problem simultaneously, and ultralow K dielectric layer very easily is subject to the injury of etching technics.Through after etching technics, ultralow K dielectric layer has often become hydrophily by original hydrophobicity.Ultralow K dielectric layer has become hydrophilic main cause by original hydrophobicity and has been: by ultralow K dielectric layer surface after etching technics, formed the ionic bond (Si-OH) between silicon and hydroxyl, and due to the existence of OH radical ion, very easily absorb the H ion and form hydrone, make ultralow K dielectric layer become hydrophily by original hydrophobicity.And the change of this performance of ultralow K dielectric layer also will make its K value become large, and then increase the electric capacity between interconnection layer.
For this reason, in existing technique, proposed again the H ion exchange in the OH radical ion is become to CH
3Base, processed ultralow K dielectric layer, on ultralow K dielectric layer surface, to form one deck Si-OCH
3Diaphragm.Please refer to Fig. 1 a~1b, its structural representation that is device in ultralow K dielectric layer processing procedure.As shown in Figure 1a, through after etching technics, ultralow K dielectric layer 10 surfaces have formed the OH radical ion.Then, as shown in Figure 1 b, utilize plasma process to be processed described ultralow K dielectric layer 10, the H ion exchange in the OH radical ion is become to CH
3Base, so that ultralow K dielectric layer surface forms the ultralow K dielectric layer of one deck diaphragm.
Above-mentioned technique can be to a certain degree the ultralow K dielectric layer of protection, still, because it has utilized plasma process, utilized charged ion, charged ion is easy to cause the material injury, special, causes the injury of the lower floor's copper interconnecting line formed.
Summary of the invention
The object of the present invention is to provide a kind of ultralow K dielectric layer processing method, the problem damaged with other retes in solving in existing technique when ultralow K dielectric layer surface forms diaphragm for device.
For solving the problems of the technologies described above, the invention provides a kind of ultralow K dielectric layer processing method, comprising:
Semiconductor substrate is provided, is formed with ultralow K dielectric layer on described Semiconductor substrate, in described ultralow K dielectric layer superficial film, contain the OH radical ion;
Utilize eutral particle beam to be processed described ultralow K dielectric layer, the H ion exchange in the OH radical ion contained in described ultralow K dielectric layer superficial film is become to the group containing C and H.
Optionally, in described ultralow K dielectric layer processing method, described eutral particle beam is for removing the inert ion of electric charge.
Optionally, in described ultralow K dielectric layer processing method, the inert ion of described removal electric charge comprises one or more in argon gas ion and helium ion.
Optionally, in described ultralow K dielectric layer processing method, the energy of described eutral particle beam is 10eV~50eV.
Optionally, in described ultralow K dielectric layer processing method, the described group containing C and H comprises: one or more in methyl, ethyl and propyl group.
Optionally, in described ultralow K dielectric layer processing method, utilize reactant DMOTMDS to be processed described ultralow K dielectric layer.
Optionally, in described ultralow K dielectric layer processing method, the process conditions that described ultralow K dielectric layer is processed are:
DMOTMDS flow: 1000sccm~3000sccm;
Radio-frequency power: 500watt~1500watt;
Pressure: 20mTorr~100mTorr.
Optionally, in described ultralow K dielectric layer processing method, utilize the burst length modulation process to be processed described ultralow K dielectric layer.
Optionally, in described ultralow K dielectric layer processing method, the opening time of described burst length modulation process is 50 microseconds~150 microseconds; Shut-in time is 50 microseconds~150 microseconds.
In ultralow K dielectric layer processing method provided by the invention; utilize eutral particle beam to be processed ultralow K dielectric layer; H ion exchange in the OH radical ion contained in described ultralow K dielectric layer superficial film is become to the group containing C and H; the problem that in having avoided thus when ultralow K dielectric layer surface forms diaphragm for device, other retes damage, improved the reliability of technique and the quality of formed device.
The accompanying drawing explanation
Fig. 1 a~1b is the structural representation of device in the forming process of ultralow K dielectric layer diaphragm;
Fig. 2 is the schematic flow sheet of the ultralow K dielectric layer processing method of the embodiment of the present invention;
Fig. 3 is the device structure schematic diagram used in the ultralow K dielectric layer processing method of the embodiment of the present invention;
Fig. 4 is the chemical structural formula of reactant DMOTMDS.
Embodiment
Ultralow K dielectric layer processing method the present invention proposed below in conjunction with the drawings and specific embodiments is described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the purpose of the aid illustration embodiment of the present invention lucidly.
In existing technique, usually utilize plasma process to form semiconductor film, for example, described in background technology, utilize plasma process to be processed described ultralow K dielectric layer, the H ion exchange by it in surperficial OH radical ion becomes CH
3Base, so that ultralow K dielectric layer surface forms the ultralow K dielectric layer of one deck diaphragm.This is a kind of processing mode of routine, but, in the processing procedure to ultralow K dielectric layer, the electric charge in plasma process will bring obvious injury to established lower floor copper interconnecting line, and such injury will bring obvious impact to the performance of semiconductor device.Existing technique is helpless to this.
For this reason; the application proposes a kind of ultralow K dielectric layer processing method; it is different from the conventional mode of utilizing plasma process and forms semiconductive thin film; but utilize uncharged eutral particle beam to be processed ultralow K dielectric layer; H ion exchange in the OH radical ion contained in described ultralow K dielectric layer superficial film is become to the group containing C and H; the problem that in having avoided thus when ultralow K dielectric layer surface forms diaphragm for device, other retes (particularly lower floor's copper interconnecting line) damage, improved the reliability of technique and the quality of formed device.
Please refer to Fig. 2, the schematic flow sheet of its ultralow K dielectric layer processing method that is the embodiment of the present invention.As shown in Figure 2, described ultralow K dielectric layer processing method comprises the steps:
S20: Semiconductor substrate is provided, is formed with ultralow K dielectric layer on described Semiconductor substrate, in described ultralow K dielectric layer superficial film, contain the OH radical ion;
S21: utilize eutral particle beam to be processed described ultralow K dielectric layer, the H ion exchange in the OH radical ion contained in described ultralow K dielectric layer superficial film is become to the group containing C and H.
Concrete, please refer to Fig. 3, the device structure schematic diagram used in its ultralow K dielectric layer processing method for the embodiment of the present invention.
As shown in Figure 3, at first, Semiconductor substrate 40 is put into to the reaction chamber 30 of equipment, at this, be placed on the plummer 38 of reaction chamber 30.Wherein, be formed with ultralow K dielectric layer on described Semiconductor substrate 40, contain OH radical ion (can be corresponding to figure 1a) in described ultralow K dielectric layer superficial film.Further, on described Semiconductor substrate 40, also be formed with lower floor's copper interconnecting line, described ultralow K dielectric layer (in opening) exposes described lower floor copper interconnecting line.
After Semiconductor substrate 40 is put into to reaction chamber 30, pass into the compound of groups such as containing methyl, ethyl, propyl group to described reaction chamber 30, at this, pass into reactant DMOTMDS, as shown in Figure 4, described reactant DMOTMDS passes in described reaction chamber 30 by the first entrance 33 its chemical structural formula.Preferably, the flow of described DMOTMDS is 1000sccm~3000sccm, makes before carrying out subsequent technique, and described Semiconductor substrate 40 is immersed in described DMOTMDS atmosphere.
Then, to the ionization chamber 31 of equipment, pass into inert gas, preferred, described inert gas is one or more in argon gas or helium, and described inert gas enters described ionization chamber 31 by the second entrance 32.Become charged ion 34 after the electric pole plate 36 of described inert gas by described ionization chamber 31, become charged argon gas ion or helium ion.Preferably, the radio-frequency power that described ionization chamber 31 utilizes is 500watt~1500watt, such as: 700watt, 900watt, 1100watt, 1300watt etc.Concrete, can be achieved by high frequency (HF) radiological unit and low frequency (LF) radiological unit, wherein, the radio-frequency power of high frequency radiological unit is 500watt~1500watt, the radio-frequency power of low frequency radiological unit is 500watt~1500watt, the cooperation of the radio-frequency power by this high frequency (HF) radiological unit and low frequency (LF) radiological unit produces inert ion and controls the direction of the inert ion produced, and this is prior art, and the application repeats no more this.
Then, charged inert ion 34 is removed electric charge by lower electrode plate 37, becomes eutral particle beam 35.Described eutral particle beam 35 enters reaction chamber 30, reactant DMOTMDS in reaction chamber 30 is bombarded, make reactant DMOTMDS react with Semiconductor substrate 40, H ion exchange in the OH radical ion that is about to contain in the ultralow K dielectric layer superficial film on described Semiconductor substrate 40 becomes the group containing C and H, at this, be about to the H ion exchange and become methyl (CH
3).In other embodiments of the invention, also the H ion exchange in the OH radical ion can be become to ethyl, propyl group etc.Become the group containing C and H by the H ion exchange by the OH radical ion, can avoid ultralow K dielectric layer to become hydrophily and the problem of K value increase, improved the quality of device.Simultaneously; owing to having utilized 35 pairs of described ultralow K dielectric layers of eutral particle beam, processed; the problem that in having avoided when ultralow K dielectric layer surface forms diaphragm for device, other retes damage, improved the reliability of technique and the quality of formed device.
Remove electric charge at charged inert ion 34 by lower electrode plate 37, become in the process of eutral particle beam 35, can the electric charge in inert ion 34 be removed by the negativity electronics.Also can by other means the electric charge in inert ion 34 be removed, form eutral particle beam 35, this is prior art, and the application repeats no more this.
Wherein, in the process that described ultralow K dielectric layer is processed, the process conditions of processing are: the energy of described eutral particle beam 35 is 10eV~50eV; The radio-frequency power that equipment is used is 500watt~1500watt; Pressure in equipment is 20mTorr~100mTorr.
Preferably, in the present embodiment, utilize burst length modulation (pulse-time-modulated) technique to be processed described ultralow K dielectric layer (Semiconductor substrate 40).At the dwell period of burst length modulation process, make Semiconductor substrate 40 be immersed in the DMOTMDS atmosphere; And in the open stage of burst length modulation process; form eutral particle beam 35; and utilize 35 pairs of described ultralow K dielectric layers of described eutral particle beam to be processed, on described ultralow K dielectric layer surface, to form diaphragm (the H ion exchange in being about to the OH radical ion becomes the group containing C and H).Thus, the cpable of lowering power loss, and then reduce production costs.In the present embodiment, the opening time of modulation process of described burst length is 50 microseconds~150 microseconds; Shut-in time is 50 microseconds~150 microseconds.The selection of opening time and shut-in time by above-mentioned burst length modulation process, both can make Semiconductor substrate 40 be immersed in the DMOTMDS atmosphere, and utilize eutral particle beam 35 to complete the processing to ultralow K dielectric layer, can avoid again the waste of process time.
Foregoing description is only the description to preferred embodiment of the present invention, and not to any restriction of the scope of the invention, any change, modification that the those of ordinary skill in field of the present invention is done according to above-mentioned disclosure, all belong to the protection range of claims.
Claims (9)
1. a ultralow K dielectric layer processing method, is characterized in that, comprising:
Semiconductor substrate is provided, is formed with ultralow K dielectric layer on described Semiconductor substrate, in described ultralow K dielectric layer superficial film, contain the OH radical ion;
Utilize eutral particle beam to be processed described ultralow K dielectric layer, the H ion exchange in the OH radical ion contained in described ultralow K dielectric layer superficial film is become to the group containing C and H.
2. ultralow K dielectric layer processing method as claimed in claim 1, is characterized in that, described eutral particle beam is for removing the inert ion of electric charge.
3. ultralow K dielectric layer processing method as claimed in claim 2, is characterized in that, the inert ion of described removal electric charge comprises one or more in argon gas ion and helium ion.
4. ultralow K dielectric layer processing method as claimed in claim 1, is characterized in that, the energy of described eutral particle beam is 10eV~50eV.
5. ultralow K dielectric layer processing method as described as any one in claim 1 to 4, is characterized in that, the described group containing C and H comprises: one or more in methyl, ethyl and propyl group.
6. ultralow K dielectric layer processing method as described as any one in claim 1 to 4, is characterized in that, utilizes reactant DMOTMDS to be processed described ultralow K dielectric layer.
7. ultralow K dielectric layer processing method as claimed in claim 6, is characterized in that, the process conditions that described ultralow K dielectric layer is processed are:
DMOTMDS flow: 1000sccm~3000sccm;
Radio-frequency power: 500watt~1500watt;
Pressure: 20mTorr~100mTorr.
8. ultralow K dielectric layer processing method as claimed in claim 7, is characterized in that, utilizes the burst length modulation process to be processed described ultralow K dielectric layer.
9. ultralow K dielectric layer processing method as claimed in claim 8, is characterized in that, the opening time of described burst length modulation process is 50 microseconds~150 microseconds; Shut-in time is 50 microseconds~150 microseconds.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101608049A CN103426733A (en) | 2012-05-17 | 2012-05-17 | Ultra-low-K dielectric layer treatment method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2012101608049A CN103426733A (en) | 2012-05-17 | 2012-05-17 | Ultra-low-K dielectric layer treatment method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN103426733A true CN103426733A (en) | 2013-12-04 |
Family
ID=49651312
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2012101608049A Pending CN103426733A (en) | 2012-05-17 | 2012-05-17 | Ultra-low-K dielectric layer treatment method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103426733A (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1741254A (en) * | 2004-08-27 | 2006-03-01 | 印芬龙科技股份有限公司 | Repair of carbon depletion in low-k dielectric films |
US7250370B2 (en) * | 2003-09-19 | 2007-07-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties |
CN101048857A (en) * | 2004-10-27 | 2007-10-03 | 国际商业机器公司 | Recovery of hydrophobicity of low-K and ultra low-K organosilicate films used as inter metal dielectrics |
JP2009290026A (en) * | 2008-05-29 | 2009-12-10 | Tohoku Univ | Film forming method of semiconductor device which uses neutral particle |
CN102122632A (en) * | 2010-01-08 | 2011-07-13 | 中芯国际集成电路制造(上海)有限公司 | Method for forming dielectric film with low k-value |
-
2012
- 2012-05-17 CN CN2012101608049A patent/CN103426733A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7250370B2 (en) * | 2003-09-19 | 2007-07-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties |
CN1741254A (en) * | 2004-08-27 | 2006-03-01 | 印芬龙科技股份有限公司 | Repair of carbon depletion in low-k dielectric films |
CN101048857A (en) * | 2004-10-27 | 2007-10-03 | 国际商业机器公司 | Recovery of hydrophobicity of low-K and ultra low-K organosilicate films used as inter metal dielectrics |
JP2009290026A (en) * | 2008-05-29 | 2009-12-10 | Tohoku Univ | Film forming method of semiconductor device which uses neutral particle |
CN102122632A (en) * | 2010-01-08 | 2011-07-13 | 中芯国际集成电路制造(上海)有限公司 | Method for forming dielectric film with low k-value |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109994380A (en) | Method for the etch features in stack layer | |
CA3006284C (en) | Non-oxide based dielectrics for superconductor devices | |
KR101889107B1 (en) | FORMATION OF SiOCl-CONTAINING LAYER ON EXPOSED LOW-K SURFACES TO REDUCE LOW-K DAMAGE | |
US6583067B2 (en) | Method of avoiding dielectric layer deterioration with a low dielectric constant | |
TWI651805B (en) | Method for forming self-aligned contacts/ vias with high corner selectivity | |
JP2010503207A (en) | Selective chemical etching and related structures to form high aspect ratio features | |
CN101409222A (en) | Method for manufacturing SOI substrate | |
JP2010503207A5 (en) | ||
KR20130102505A (en) | Sidewall and chamfer protection during hard mask removal for interconnect patterning | |
KR20120099220A (en) | Method for tunably repairing low-k dielectric damage | |
WO2006020344A1 (en) | Method for stripping photoresist from etched wafer | |
CN110249412A (en) | Dielectric contact etching | |
CN102054745B (en) | Method for forming contact hole | |
JP2011181718A (en) | Method of manufacturing semiconductor device | |
KR20040055596A (en) | Semiconductor device and manufacturing method for the same | |
CN103426733A (en) | Ultra-low-K dielectric layer treatment method | |
CN101681826B (en) | Dry etching method | |
JPH07297276A (en) | Formation of semiconductor integrated circuit | |
CN104134630A (en) | Method for reducing damage to side wall of ultralow-dielectric-constant thin film | |
CN102903667A (en) | Method for forming semiconductor device | |
TWI512826B (en) | Dry etching method | |
CN103107125A (en) | Semiconductor device and forming method thereof | |
KR100909175B1 (en) | How to form a dual damascene pattern | |
TW202015129A (en) | Method utilizing thermal decomposition material to relax queue time control | |
CN105206598B (en) | Semiconductor devices and forming method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20131204 |