CN103425561A - VGA interface test device - Google Patents
VGA interface test device Download PDFInfo
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- CN103425561A CN103425561A CN201210165550XA CN201210165550A CN103425561A CN 103425561 A CN103425561 A CN 103425561A CN 201210165550X A CN201210165550X A CN 201210165550XA CN 201210165550 A CN201210165550 A CN 201210165550A CN 103425561 A CN103425561 A CN 103425561A
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- vga interface
- chip microcomputer
- electronic switch
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Abstract
A VGA interface test device comprises a first VGA interface, a second VGA interface, a single-chip microcomputer, first to third relays, first to third electronic switches, and first to third load resistors. When the second VGA interface is connected to a display, third to fifth output pins of the single-chip microcomputer output level signals to switch off the first and second ends of the first to third electronic switches, so that the first to third relays are switched off and the first to third load resistors are switched off. The VGA interface test device has the advantages that test errors in simultaneous loading of input actual impedance of the external display and loading of a load can be avoided.
Description
Technical field
The present invention relates to a kind of VGA interface test device.
Background technology
When the VGA interface of mainboard is carried out to functional test, what on production line, use is a special measurement jig.This measurement jig respectively is connected to the 75ohm pull-up resistor on tri-signal ends of the RGB of VGA interface, to simulate actual display, is access in., when needing to access display when the VGA interface goes wrong, test carrys out the observation test state.Now, actual input impedance and fictitious load due to the external display access being arranged simultaneously, will cause the voltage tester result of tri-signal ends of RGB inaccurate.
Summary of the invention
In view of above content, be necessary to provide a kind of can be when VGA interface access display the VGA interface test device of automatic cutout fictitious load.
A kind of VGA interface test device comprises:
One the one VGA interface, for being connected with a VGA interface to be measured;
One the 2nd VGA interface, for being connected with a display, the pin correspondence of a described VGA interface is connected with the pin of the 2nd VGA interface;
One single-chip microcomputer, first and second input pin of described single-chip microcomputer is controlled pin with the double bus of the 2nd VGA interface respectively and is connected, also by first and second resistance, with a voltage, be connected respectively, the the 3rd to the 7th input pin of described single-chip microcomputer is connected with vertical synchronizing signal pin, line synchronizing signal pin, blue primary pin, green primary pin and the red primary pin of a VGA interface respectively, and first and second output pin of described single-chip microcomputer is for outputing test result;
One output interface, the data pin of described output interface is connected with first and second output pin of single-chip microcomputer, to receive test result;
The first to the 3rd relay, the first end of the described first coil to the 3rd relay all is connected with a voltage, and the first end of the described first switch to the 3rd relay is connected with blue primary pin, green primary pin and the red primary pin of a VGA interface respectively;
The first to the 3rd electronic switch, the the 3rd to the 5th output pin of described single-chip microcomputer is connected with the first control end to the 3rd electronic switch respectively, the described first first end to the 3rd electronic switch is connected with the second end of the first coil to the 3rd relay respectively, the equal ground connection of the second end of the described first to the 3rd electronic switch; And
The first to the 3rd pull-up resistor, the second end of the described first switch to the 3rd relay is respectively by the first to the 3rd pull-up resistor ground connection;
When described the 2nd VGA interface is connected with display, the 3rd to the 5th output pin outputs level signals of described single-chip microcomputer is so that the first first end to the 3rd electronic switch and the second end disconnect, and then makes the switch of the first to the 3rd relay disconnect;
When described the 2nd VGA interface is not connected with display, the 3rd to the 5th output pin outputs level signals of described single-chip microcomputer is so that the first first end to the 3rd electronic switch and the second end conducting, and then makes the switch closure of the first to the 3rd relay.
Above-mentioned VGA interface test device judges by single-chip microcomputer whether the 2nd VGA interface has the connection display, when being connected with display, the 2nd VGA interface by the first to the 3rd electronic switch and the first to the 3rd relay, disconnects three pull-up resistors, the test error brought with the actual input impedance of avoiding loading the external display access and fictitious load simultaneously.
The accompanying drawing explanation
Fig. 1 is the circuit diagram of the better embodiment of VGA interface test device of the present invention.
The main element symbol description
| The VGA interface | 1、2 |
| Single- |
3 |
| Field effect transistor | Q1-Q3 |
| Relay | K1-K3 |
| Coil | L1- |
| USB interface | |
| 5 | |
| Pull-up resistor | R21-R23 |
| Resistance | R1-R5 |
| Electric capacity | C1 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Below in conjunction with accompanying drawing and better embodiment, the present invention is described in further detail:
Please refer to Fig. 1, the better embodiment of VGA proving installation of the present invention comprises two VGA interfaces 1,2, a single-chip microcomputer 3, three field effect transistor Q1-Q3, three relay K 1-K3, three pull-up resistor R21-R23 and a USB interface 5.
Described two VGA interfaces 1 and 2 include 15 pins, and it is identical with 15 mouthfuls of present VGA interfaces, does not repeat them here.Described two VGA interfaces 1 and all pins of 2 are corresponding being connected all.Wherein, described VGA interface 1 is for being connected with a VGA interface to be measured, and described VGA interface 2 is connected with an external display in needs.
Total line traffic control pin SCL of described VGA interface 1 and SDA also are connected with input pin P0.0 and the P0.1 of single-chip microcomputer 3.The input pin P0.2-P0.6 of described single-chip microcomputer 3 is connected with vertical synchronizing signal pin VSYNC, line synchronizing signal pin HSYNC, blue primary pin B, green primary pin G and the red primary pin R of VGA interface 1 respectively.The grounding pin VSS ground connection of described single-chip microcomputer 3, power pins Vcc is connected with voltage VCC, and described voltage VCC is also by capacitor C 1 ground connection.The output pin P1.0 of described single-chip microcomputer 3 and P1.1 are connected with D-with two data pin D+ of USB interface 5, and the output pin P1.2-P1.4 of described single-chip microcomputer 3 is connected with the grid of field effect transistor Q1-Q3 by resistance R 1-R3 respectively.The input pin P0.0 of described single-chip microcomputer 3 also is connected with voltage VCC by resistance R 4, and the input pin P0.1 of described single-chip microcomputer 3 also is connected with voltage VCC by resistance R 5.
The drain electrode of described field effect transistor Q1 is connected with an end of the coil of relay K 1, and the other end of described coil is connected with voltage VCC.One end of the switch of described relay K 1 is connected with the red primary pin R of VGA interface 1, and the other end is by pull-up resistor R21 ground connection.The drain electrode of described field effect transistor Q2 is connected with an end of the coil of relay K 2, and the other end of described coil is connected with voltage VCC.One end of the switch of described relay K 2 is connected with the green primary pin G of VGA interface 1, and the other end is by pull-up resistor R22 ground connection.The drain electrode of described field effect transistor Q3 is connected with an end of the coil of relay K 3, and the other end of described coil is connected with voltage VCC.One end of the switch of described relay K 3 is connected with the blue primary pin B of VGA interface 1, and the other end is by pull-up resistor R23 ground connection.
Below will the principle of work of above-mentioned VGA interface test device be described:
During test, VGA interface 1 is connected with the VGA interface to be measured on mainboard, 2, VGA interface is vacant.After opening mainboard, because VGA interface 2 is not connected with display, so total line traffic control pin SCL of VGA interface 2 and SDA will can not export high level signal, and the input pin P0.0 of single-chip microcomputer 3 and P0.1 will receive high level signal.After single-chip microcomputer 3 is processed, output pin P1.2, P1.3 and the P1.4 of described single-chip microcomputer 3 all export high level signal.Described field effect transistor Q1-Q3 all is able to conducting, and the coil of described relay K 1-K3 obtains electric, and the switch of described relay K 1-K3 closes, and makes pull-up resistor R21-R23 be access in.
Now, the signal on VGA interface to be measured will transfer to by red primary pin R, green primary pin G, blue primary pin B, line synchronizing signal pin HSYNC and the vertical synchronizing signal pin VSYNC of coupled VGA interface 1 input pin P0.6, P0.5, P0.4, P0.3 and the P0.2 of single-chip microcomputer 3.After the test procedure of single-chip microcomputer 3 inside is processed, test result will export USB interface 5 to through output pin P1.0 and the P1.1 of single-chip microcomputer 3.The tester can the observation test result by display device is connected with USB interface 5.Certainly, in other embodiments, described USB interface 5 is also replaceable is other output interfaces.
If need external-connection displayer in test process, VGA interface 2 is connected with display, now, total line traffic control pin SCL and the SDA of described VGA interface 2 will export square-wave signal, alternately export the low and high level signal, the input pin P0.0 of single-chip microcomputer 3 and P0.1 can alternately receive the low and high level signal.After single-chip microcomputer 3 is processed, output pin P1.2, the P1.3 of described single-chip microcomputer 3 and P1.4 be equal output low level signal.Described field effect transistor Q1-Q3 all is disconnected, the coil losing electricity of described relay K 1-K3, the switch of described relay K 1-K3 disconnects, make pull-up resistor R21-R23 not be access in, the test error brought with the actual input impedance of avoiding loading the external display access and fictitious load simultaneously.
Above-mentioned VGA interface test device judges by single-chip microcomputer 3 whether VGA interface 2 has the connection display, when VGA interface 2 is connected with display by field effect transistor Q1-Q3 and relay K 1-K3 disconnecting consumers resistance R 21-R23, the test error brought with the actual input impedance of avoiding loading the external display access and fictitious load simultaneously.
From foregoing description, can find out, described field effect transistor Q1-Q3 all plays the effect of electronic switch, therefore in other embodiments, described field effect transistor Q1-Q3 can substitute with other electronic switches, such as triode, the base stage of the corresponding triode of the control end of electronic switch wherein, the collector of the corresponding triode of the first end of electronic switch, the emitter of the corresponding triode of the second end of electronic switch.
Claims (5)
1. a VGA interface test device comprises:
One the one VGA interface, for being connected with a VGA interface to be measured;
One the 2nd VGA interface, for being connected with a display, the pin correspondence of a described VGA interface is connected with the pin of the 2nd VGA interface;
One single-chip microcomputer, first and second input pin of described single-chip microcomputer is controlled pin with the double bus of the 2nd VGA interface respectively and is connected, also by first and second resistance, with a voltage, be connected respectively, the the 3rd to the 7th input pin of described single-chip microcomputer is connected with vertical synchronizing signal pin, line synchronizing signal pin, blue primary pin, green primary pin and the red primary pin of a VGA interface respectively, and first and second output pin of described single-chip microcomputer is for outputing test result;
One output interface, the data pin of described output interface is connected with first and second output pin of single-chip microcomputer, to receive test result;
The first to the 3rd relay, the first end of the described first coil to the 3rd relay all is connected with a voltage, and the first end of the described first switch to the 3rd relay is connected with blue primary pin, green primary pin and the red primary pin of a VGA interface respectively;
The first to the 3rd electronic switch, the the 3rd to the 5th output pin of described single-chip microcomputer is connected with the first control end to the 3rd electronic switch respectively, the described first first end to the 3rd electronic switch is connected with the second end of the first coil to the 3rd relay respectively, the equal ground connection of the second end of the described first to the 3rd electronic switch; And
The first to the 3rd pull-up resistor, the second end of the described first switch to the 3rd relay is respectively by the first to the 3rd pull-up resistor ground connection;
When described the 2nd VGA interface is connected with display, the 3rd to the 5th output pin outputs level signals of described single-chip microcomputer is so that the first first end to the 3rd electronic switch and the second end disconnect, and then makes the switch of the first to the 3rd relay disconnect;
When described the 2nd VGA interface is not connected with display, the 3rd to the 5th output pin outputs level signals of described single-chip microcomputer is so that the first first end to the 3rd electronic switch and the second end conducting, and then makes the switch closure of the first to the 3rd relay.
2. VGA interface test device as claimed in claim 1, it is characterized in that: described the first electronic switch is a field effect transistor, the control end of described the first electronic switch, first end and the second end be grid, drain electrode and the source electrode of corresponding field effect transistor respectively.
3. VGA interface test device as claimed in claim 1, it is characterized in that: described the second electronic switch is a field effect transistor, the control end of described the second electronic switch, first end and the second end be grid, drain electrode and the source electrode of corresponding field effect transistor respectively.
4. VGA interface test device as claimed in claim 1, it is characterized in that: described the 3rd electronic switch is a field effect transistor, the control end of described the 3rd electronic switch, first end and the second end be grid, drain electrode and the source electrode of corresponding field effect transistor respectively.
5. VGA interface test device as claimed in claim 1, it is characterized in that: described output interface is a USB interface, described USB interface is for being connected with a display device, two data pin of described USB interface are connected with first and second output pin of single-chip microcomputer respectively, with the test result by single-chip microcomputer, are shown in display device.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210165550XA CN103425561A (en) | 2012-05-25 | 2012-05-25 | VGA interface test device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210165550XA CN103425561A (en) | 2012-05-25 | 2012-05-25 | VGA interface test device |
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| CN103425561A true CN103425561A (en) | 2013-12-04 |
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| CN201210165550XA Pending CN103425561A (en) | 2012-05-25 | 2012-05-25 | VGA interface test device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104252324A (en) * | 2013-06-25 | 2014-12-31 | 研祥智能科技股份有限公司 | System and method for dynamically simulating VGA (Video Graphic Array) signals |
| CN106713904A (en) * | 2016-12-20 | 2017-05-24 | 郑州云海信息技术有限公司 | VGA interface test method, apparatus and system |
| CN107293270A (en) * | 2016-04-05 | 2017-10-24 | 深圳市亿威尔信息技术股份有限公司 | The sustainable display system normally shown of VGA signals |
| CN110376456A (en) * | 2019-06-27 | 2019-10-25 | 苏州浪潮智能科技有限公司 | A kind of VGA signal testing jig |
-
2012
- 2012-05-25 CN CN201210165550XA patent/CN103425561A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104252324A (en) * | 2013-06-25 | 2014-12-31 | 研祥智能科技股份有限公司 | System and method for dynamically simulating VGA (Video Graphic Array) signals |
| CN104252324B (en) * | 2013-06-25 | 2019-01-04 | 研祥智能科技股份有限公司 | The system and method for dynamic analog Video Graphics Array signal |
| CN107293270A (en) * | 2016-04-05 | 2017-10-24 | 深圳市亿威尔信息技术股份有限公司 | The sustainable display system normally shown of VGA signals |
| CN106713904A (en) * | 2016-12-20 | 2017-05-24 | 郑州云海信息技术有限公司 | VGA interface test method, apparatus and system |
| CN110376456A (en) * | 2019-06-27 | 2019-10-25 | 苏州浪潮智能科技有限公司 | A kind of VGA signal testing jig |
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Application publication date: 20131204 |